1; RUN: llc < %s -mtriple=thumbv8m.base   | FileCheck %s
2; RUN: llc < %s -mtriple=thumbebv8m.base | FileCheck %s
3
4define i32 @test_tt(i8* readnone %p) #0 {
5entry:
6  %0 = tail call i32 @llvm.arm.cmse.tt(i8* %p)
7  ret i32 %0
8}
9; CHECK-LABEL: test_tt:
10; CHECK: tt r{{[0-9]+}}, r{{[0-9]+}}
11
12declare i32 @llvm.arm.cmse.tt(i8*) #1
13
14define i32 @test_ttt(i8* readnone %p) #0 {
15entry:
16  %0 = tail call i32 @llvm.arm.cmse.ttt(i8* %p)
17  ret i32 %0
18}
19; CHECK-LABEL: test_ttt:
20; CHECK: ttt r{{[0-9]+}}, r{{[0-9]+}}
21
22declare i32 @llvm.arm.cmse.ttt(i8*) #1
23
24define i32 @test_tta(i8* readnone %p) #0 {
25entry:
26  %0 = tail call i32 @llvm.arm.cmse.tta(i8* %p)
27  ret i32 %0
28}
29; CHECK-LABEL: test_tta:
30; CHECK: tta r{{[0-9]+}}, r{{[0-9]+}}
31
32declare i32 @llvm.arm.cmse.tta(i8*) #1
33
34define i32 @test_ttat(i8* readnone %p) #0 {
35entry:
36  %0 = tail call i32 @llvm.arm.cmse.ttat(i8* %p)
37  ret i32 %0
38}
39; CHECK-LABEL: test_ttat:
40; CHECK: ttat r{{[0-9]+}}, r{{[0-9]+}}
41
42declare i32 @llvm.arm.cmse.ttat(i8*) #1
43
44attributes #0 = { nounwind readnone "target-features"="+8msecext"}
45attributes #1 = { nounwind readnone }
46