1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK-LE
3; RUN: llc -mtriple=armeb-eabi %s -o - | FileCheck %s -check-prefix=CHECK-BE
4
5define i64 @f0(i64 %A, i64 %B) {
6; CHECK-LE-LABEL: f0:
7; CHECK-LE:       @ %bb.0:
8; CHECK-LE-NEXT:    lsrs r3, r3, #1
9; CHECK-LE-NEXT:    rrx r2, r2
10; CHECK-LE-NEXT:    subs r0, r0, r2
11; CHECK-LE-NEXT:    sbc r1, r1, r3
12; CHECK-LE-NEXT:    mov pc, lr
13;
14; CHECK-BE-LABEL: f0:
15; CHECK-BE:       @ %bb.0:
16; CHECK-BE-NEXT:    lsrs r2, r2, #1
17; CHECK-BE-NEXT:    rrx r3, r3
18; CHECK-BE-NEXT:    subs r1, r1, r3
19; CHECK-BE-NEXT:    sbc r0, r0, r2
20; CHECK-BE-NEXT:    mov pc, lr
21
22  %tmp = bitcast i64 %A to i64
23  %tmp2 = lshr i64 %B, 1
24  %tmp3 = sub i64 %tmp, %tmp2
25  ret i64 %tmp3
26}
27
28define i32 @f1(i64 %x, i64 %y) {
29; CHECK-LE-LABEL: f1:
30; CHECK-LE:       @ %bb.0:
31; CHECK-LE-NEXT:    lsl r0, r0, r2
32; CHECK-LE-NEXT:    subs r1, r2, #32
33; CHECK-LE-NEXT:    movpl r0, #0
34; CHECK-LE-NEXT:    mov pc, lr
35;
36; CHECK-BE-LABEL: f1:
37; CHECK-BE:       @ %bb.0:
38; CHECK-BE-NEXT:    lsl r0, r1, r3
39; CHECK-BE-NEXT:    subs r1, r3, #32
40; CHECK-BE-NEXT:    movpl r0, #0
41; CHECK-BE-NEXT:    mov pc, lr
42
43  %a = shl i64 %x, %y
44  %b = trunc i64 %a to i32
45  ret i32 %b
46}
47
48define i32 @f2(i64 %x, i64 %y) {
49; CHECK-LE-LABEL: f2:
50; CHECK-LE:       @ %bb.0:
51; CHECK-LE-NEXT:    rsb r3, r2, #32
52; CHECK-LE-NEXT:    lsr r0, r0, r2
53; CHECK-LE-NEXT:    subs r2, r2, #32
54; CHECK-LE-NEXT:    orr r0, r0, r1, lsl r3
55; CHECK-LE-NEXT:    asrpl r0, r1, r2
56; CHECK-LE-NEXT:    mov pc, lr
57;
58; CHECK-BE-LABEL: f2:
59; CHECK-BE:       @ %bb.0:
60; CHECK-BE-NEXT:    rsb r2, r3, #32
61; CHECK-BE-NEXT:    lsr r1, r1, r3
62; CHECK-BE-NEXT:    orr r1, r1, r0, lsl r2
63; CHECK-BE-NEXT:    subs r2, r3, #32
64; CHECK-BE-NEXT:    asrpl r1, r0, r2
65; CHECK-BE-NEXT:    mov r0, r1
66; CHECK-BE-NEXT:    mov pc, lr
67
68  %a = ashr i64 %x, %y
69  %b = trunc i64 %a to i32
70  ret i32 %b
71}
72
73define i32 @f3(i64 %x, i64 %y) {
74; CHECK-LE-LABEL: f3:
75; CHECK-LE:       @ %bb.0:
76; CHECK-LE-NEXT:    rsb r3, r2, #32
77; CHECK-LE-NEXT:    lsr r0, r0, r2
78; CHECK-LE-NEXT:    subs r2, r2, #32
79; CHECK-LE-NEXT:    orr r0, r0, r1, lsl r3
80; CHECK-LE-NEXT:    lsrpl r0, r1, r2
81; CHECK-LE-NEXT:    mov pc, lr
82;
83; CHECK-BE-LABEL: f3:
84; CHECK-BE:       @ %bb.0:
85; CHECK-BE-NEXT:    rsb r2, r3, #32
86; CHECK-BE-NEXT:    lsr r1, r1, r3
87; CHECK-BE-NEXT:    orr r1, r1, r0, lsl r2
88; CHECK-BE-NEXT:    subs r2, r3, #32
89; CHECK-BE-NEXT:    lsrpl r1, r0, r2
90; CHECK-BE-NEXT:    mov r0, r1
91; CHECK-BE-NEXT:    mov pc, lr
92
93  %a = lshr i64 %x, %y
94  %b = trunc i64 %a to i32
95  ret i32 %b
96}
97