1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s -check-prefix=CHECK-7A
2; RUN: llc < %s -mtriple=thumbv6m -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-6M
3
4define void @t1(i8* nocapture %c) nounwind optsize {
5entry:
6; CHECK-7A-LABEL: t1:
7; CHECK-7A: movs r1, #0
8; CHECK-7A: strd r1, r1, [r0]
9; CHECK-7A: str r1, [r0, #8]
10; CHECK-6M-LABEL: t1:
11; CHECK-6M: movs r1, #0
12; CHECK-6M: str r1, [r0]
13; CHECK-6M: str r1, [r0, #4]
14; CHECK-6M: str r1, [r0, #8]
15  call void @llvm.memset.p0i8.i64(i8* align 8 %c, i8 0, i64 12, i1 false)
16  ret void
17}
18
19define void @t2() nounwind ssp {
20entry:
21; CHECK-7A-LABEL: t2:
22; CHECK-7A: vmov.i32 {{q[0-9]+}}, #0x0
23; CHECK-7A: movs r1, #10
24; CHECK-7A: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r2], r1
25; CHECK-7A: vst1.16 {d{{[0-9]+}}, d{{[0-9]+}}}, [r2]
26; CHECK-6M-LABEL: t2:
27; CHECK-6M: movs [[REG:r[0-9]+]], #0
28; CHECK-6M-DAG: str  [[REG]], [sp, #20]
29; CHECK-6M-DAG: str  [[REG]], [sp, #16]
30; CHECK-6M-DAG: str  [[REG]], [sp, #12]
31; CHECK-6M-DAG: str  [[REG]], [sp, #8]
32; CHECK-6M-DAG: str  [[REG]], [sp, #4]
33; CHECK-6M-DAG: str  [[REG]], [sp]
34  %buf = alloca [26 x i8], align 1
35  %0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0
36  call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i1 false)
37  call void @something(i8* %0) nounwind
38  ret void
39}
40
41define void @t3(i8* %p) {
42entry:
43; CHECK-7A-LABEL: t3:
44; CHECK-7A: muls [[REG:r[0-9]+]],
45; CHECK-7A: str  [[REG]],
46; CHECK-6M-LABEL: t3:
47; CHECK-6M-NOT: muls
48; CHECK-6M: strb [[REG:r[0-9]+]],
49; CHECK-6M: strb [[REG]],
50; CHECK-6M: strb [[REG]],
51; CHECK-6M: strb [[REG]],
52  br label %for.body
53
54for.body:
55  %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
56  %0 = trunc i32 %i to i8
57  call void @llvm.memset.p0i8.i32(i8* %p, i8 %0, i32 4, i1 false)
58  call void @something(i8* %p)
59  %inc = add nuw nsw i32 %i, 1
60  %exitcond = icmp eq i32 %inc, 255
61  br i1 %exitcond, label %for.end, label %for.body
62
63for.end:
64  ret void
65}
66
67define void @t4(i8* %p) {
68entry:
69; CHECK-7A-LABEL: t4:
70; CHECK-7A: muls [[REG:r[0-9]+]],
71; CHECK-7A: str  [[REG]],
72; CHECK-6M-LABEL: t4:
73; CHECK-6M: muls [[REG:r[0-9]+]],
74; CHECK-6M: strh [[REG]],
75; CHECK-6M: strh [[REG]],
76  br label %for.body
77
78for.body:
79  %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
80  %0 = trunc i32 %i to i8
81  call void @llvm.memset.p0i8.i32(i8* align 2 %p, i8 %0, i32 4, i1 false)
82  call void @something(i8* %p)
83  %inc = add nuw nsw i32 %i, 1
84  %exitcond = icmp eq i32 %inc, 255
85  br i1 %exitcond, label %for.end, label %for.body
86
87for.end:
88  ret void
89}
90
91declare void @something(i8*) nounwind
92declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
93declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
94