1; REQUIRES: asserts
2; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -debug-only=machine-scheduler,post-RA-sched -print-before=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
3
4; CHECK-LABEL: test_misched
5; Pre and post ra machine scheduling
6; CHECK:  ********** MI Scheduling **********
7; CHECK:  t2LDRi12
8; CHECK:  Latency            : 2
9; CHECK:  ********** MI Scheduling **********
10; CHECK:  t2LDRi12
11; CHECK:  Latency            : 2
12
13define i32 @test_misched(i32* %ptr) "target-cpu"="cortex-m33" {
14entry:
15  %l = load i32, i32* %ptr
16  store i32 0, i32* %ptr
17  ret i32 %l
18}
19
20; CHECK-LABEL: test_rasched
21; CHECK: Subtarget disables post-MI-sched.
22; CHECK: ********** List Scheduling **********
23
24define i32 @test_rasched(i32* %ptr) {
25entry:
26  %l = load i32, i32* %ptr
27  store i32 0, i32* %ptr
28  ret i32 %l
29}
30
31