1; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -show-mc-encoding -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
2; RUN: llc -mtriple=armeb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
3; RUN: llc -mtriple=thumbv6m %s -o - | FileCheck %s --check-prefix=CHECK-V6M
4; RUN: llc -mtriple=thumbv8m.base -show-mc-encoding %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8M
5; RUN: llc -mtriple=thumbv8m.main -show-mc-encoding %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8M
6
7; 171 = 0x000000ab
8define i64 @f1(i64 %a) {
9; CHECK-LABEL: f1
10; CHECK-LE: subs{{.*}} r0, #171
11; CHECK-LE: sbc r1, r1, #0
12; CHECK-BE: subs r1, r1, #171
13; CHECK-BE: sbc r0, r0, #0
14    %tmp = sub i64 %a, 171
15    ret i64 %tmp
16}
17
18; 66846720 = 0x03fc0000
19define i64 @f2(i64 %a) {
20; CHECK-LABEL: f2
21; CHECK-LE: subs{{.*}} r0, r0, #66846720
22; CHECK-LE: sbc r1, r1, #0
23; CHECK-BE: subs r1, r1, #66846720
24; CHECK-BE: sbc r0, r0, #0
25    %tmp = sub i64 %a, 66846720
26    ret i64 %tmp
27}
28
29; 734439407618 = 0x000000ab00000002
30define i64 @f3(i64 %a) {
31; CHECK-LABEL: f3
32; CHECK-LE: subs{{.*}} r0, #2
33; CHECK-LE: sbc r1, r1, #171
34; CHECK-BE: subs r1, r1, #2
35; CHECK-BE: sbc r0, r0, #171
36   %tmp = sub i64 %a, 734439407618
37   ret i64 %tmp
38}
39
40define i32 @f4(i32 %x) {
41entry:
42; CHECK-LABEL: f4
43; CHECK-LE: rsbs
44; CHECK-BE: rsbs
45  %sub = sub i32 1, %x
46  %cmp = icmp ugt i32 %sub, 0
47  %sel = select i1 %cmp, i32 1, i32 %sub
48  ret i32 %sel
49}
50
51define i32 @f5(i32 %x) {
52entry:
53; CHECK-LABEL: f5:
54; CHECK-LE:  movw r1, #65535 @ encoding: [0xff,0x1f,0x0f,0xe3]
55; CHECK-V8M: movw r1, #65535 @ encoding: [0x4f,0xf6,0xff,0x71]
56; CHECK-NOT: movt
57; CHECK-NOT: add
58; CHECK: sub{{.*}} r0, r0, r1
59
60; CHECK-V6M-LABEL: f5
61; CHECK-V6M: ldr [[NEG:r[0-1]+]], [[CONST:.[A-Z0-9_]+]]
62; CHECK-V6M: add{{.*}} r0, [[NEG]]
63; CHECK-V6M: [[CONST]]
64; CHECK-V6M: .long   4294901761
65  %sub = add i32 %x, -65535
66  ret i32 %sub
67}
68
69define i32 @f6(i32 %x) {
70entry:
71; CHECK-LABEL: f6:
72; CHECK-LE:  movw r1, #65535 @ encoding: [0xff,0x1f,0x0f,0xe3]
73; CHECK-V8M: movw r1, #65535 @ encoding: [0x4f,0xf6,0xff,0x71]
74; CHECK-NOT: movt
75; CHECK-NOT: sub
76; CHECK: add{{.*}} r0, r1
77
78; CHECK-V6M-LABEL: f6
79; CHECK-V6M: ldr [[NEG:r[0-1]+]], [[CONST:.[A-Z0-9_]+]]
80; CHECK-V6M: add{{.*}} r0, [[NEG]]
81; CHECK-V6M: [[CONST]]
82; CHECK-V6M: .long 65535
83  %sub = sub i32 %x, -65535
84  ret i32 %sub
85}
86