1; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o - | FileCheck %s --check-prefix=CHECK-V6
2; RUN: llc -mtriple=arm-eabi -mattr=+v7 %s -o - | FileCheck %s --check-prefix=CHECK-V7
3
4define i32 @test0(i8 %A) {
5; CHECK-LABEL: test0
6; CHECK-V6: sxtb r0, r0
7; CHECK-V7: sxtb r0, r0
8  %B = sext i8 %A to i32
9  ret i32 %B
10}
11
12define signext i8 @test1(i32 %A) {
13; CHECK-LABEL: test1
14; CHECK-V6: lsr r0, r0, #8
15; CHECK-V6: sxtb r0, r0
16; CHECK-V6-NOT: sbfx
17; CHECk-V7: sbfx r0, r0, #8, #8
18  %B = lshr i32 %A, 8
19  %C = shl i32 %A, 24
20  %D = or i32 %B, %C
21  %E = trunc i32 %D to i8
22  ret i8 %E
23}
24
25define signext i32 @test2(i32 %A, i32 %X) {
26; CHECK-LABEL: test2
27; CHECK-V6: sxtab r0, r1, r0, ror #8
28; CHECK-V7: sxtab r0, r1, r0, ror #8
29  %B = lshr i32 %A, 8
30  %C = shl i32 %A, 24
31  %D = or i32 %B, %C
32  %E = trunc i32 %D to i8
33  %F = sext i8 %E to i32
34  %G = add i32 %F, %X
35  ret i32 %G
36}
37
38define signext i32 @test3(i32 %A, i32 %X) {
39; CHECK-LABEL: test3
40; CHECK-V6: sxtab r0, r1, r0, ror #16
41; CHECK-V7: sxtab r0, r1, r0, ror #16
42  %B = lshr i32 %A, 16
43  %C = shl i32 %A, 16
44  %D = or i32 %B, %C
45  %E = trunc i32 %D to i8
46  %F = sext i8 %E to i32
47  %G = add i32 %F, %X
48  ret i32 %G
49}
50
51define signext i32 @test4(i32 %A, i32 %X) {
52; CHECK-LABEL: test4
53; CHECK-V6: sxtah r0, r1, r0, ror #8
54; CHECK-V7: sxtah r0, r1, r0, ror #8
55  %B = lshr i32 %A, 8
56  %C = shl i32 %A, 24
57  %D = or i32 %B, %C
58  %E = trunc i32 %D to i16
59  %F = sext i16 %E to i32
60  %G = add i32 %F, %X
61  ret i32 %G
62}
63
64define signext i32 @test5(i32 %A, i32 %X) {
65; CHECK-LABEL: test5
66; CHECK-V6: sxtah r0, r1, r0, ror #24
67; CHECK-V7: sxtah r0, r1, r0, ror #24
68  %B = lshr i32 %A, 24
69  %C = shl i32 %A, 8
70  %D = or i32 %B, %C
71  %E = trunc i32 %D to i16
72  %F = sext i16 %E to i32
73  %G = add i32 %F, %X
74  ret i32 %G
75}
76
77define i32 @test6(i8 %A, i32 %X) {
78; CHECK-LABEL: test6
79; CHECK-V6: sxtab r0, r1, r0
80; CHECK-V7: sxtab r0, r1, r0
81  %sext = sext i8 %A to i32
82  %add = add i32 %X, %sext
83  ret i32 %add
84}
85
86define i32 @test7(i32 %A, i32 %X) {
87; CHECK-LABEL: test7
88; CHECK-V6: sxtab r0, r1, r0
89; CHECK-V7: sxtab r0, r1, r0
90  %shl = shl i32 %A, 24
91  %shr = ashr i32 %shl, 24
92  %add = add i32 %X, %shr
93  ret i32 %add
94}
95
96define i32 @test8(i16 %A, i32 %X) {
97; CHECK-LABEL: test8
98; CHECK-V6: sxtah r0, r1, r0
99; CHECK-V7: sxtah r0, r1, r0
100  %sext = sext i16 %A to i32
101  %add = add i32 %X, %sext
102  ret i32 %add
103}
104
105define i32 @test9(i32 %A, i32 %X) {
106; CHECK-LABEL: test9
107; CHECK-V6: sxtah r0, r1, r0
108; CHECK-V7: sxtah r0, r1, r0
109  %shl = shl i32 %A, 16
110  %shr = ashr i32 %shl, 16
111  %add = add i32 %X, %shr
112  ret i32 %add
113}
114