1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; Check that this compiles successfully.
4; CHECK: vunpack
5
6target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
7target triple = "hexagon"
8
9define void @fred(<64 x i8>* %a0, <64 x i8>* %a1) #0 {
10b0:
11  %v1 = load <64 x i8>, <64 x i8>* %a0, align 1
12  %v2 = sext <64 x i8> %v1 to <64 x i32>
13  %v3 = load <64 x i8>, <64 x i8>* %a1, align 1
14  %v4 = sext <64 x i8> %v3 to <64 x i32>
15  %v5 = mul nsw <64 x i32> %v4, %v2
16  %v6 = add nsw <64 x i32> %v5, zeroinitializer
17  %v7 = shl <64 x i32> %v6, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
18  %v8 = ashr exact <64 x i32> %v7, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
19  %v9 = mul nsw <64 x i32> %v8, %v8
20  %v10 = trunc <64 x i32> %v9 to <64 x i8>
21  store <64 x i8> %v10, <64 x i8>* %a0, align 1
22  ret void
23}
24
25attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
26