1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; --- Byte
4
5; CHECK-LABEL: test_00:
6; CHECK: q[[Q000:[0-3]]] = vcmp.eq(v0.b,v1.b)
7; CHECK: v0 = vmux(q[[Q000]],v1,v2)
8define <64 x i8> @test_00(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
9  %t0 = icmp eq <64 x i8> %v0, %v1
10  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
11  ret <64 x i8> %t1
12}
13
14; CHECK-LABEL: test_01:
15; CHECK: q[[Q010:[0-3]]] = vcmp.eq(v0.b,v1.b)
16; CHECK: v0 = vmux(q[[Q010]],v2,v1)
17define <64 x i8> @test_01(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
18  %t0 = icmp ne <64 x i8> %v0, %v1
19  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
20  ret <64 x i8> %t1
21}
22
23; CHECK-LABEL: test_02:
24; CHECK: q[[Q020:[0-3]]] = vcmp.gt(v1.b,v0.b)
25; CHECK: v0 = vmux(q[[Q020]],v1,v2)
26define <64 x i8> @test_02(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
27  %t0 = icmp slt <64 x i8> %v0, %v1
28  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
29  ret <64 x i8> %t1
30}
31
32; CHECK-LABEL: test_03:
33; CHECK: q[[Q030:[0-3]]] = vcmp.gt(v0.b,v1.b)
34; CHECK: v0 = vmux(q[[Q030]],v2,v1)
35define <64 x i8> @test_03(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
36  %t0 = icmp sle <64 x i8> %v0, %v1
37  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
38  ret <64 x i8> %t1
39}
40
41; CHECK-LABEL: test_04:
42; CHECK: q[[Q040:[0-3]]] = vcmp.gt(v0.b,v1.b)
43; CHECK: v0 = vmux(q[[Q040]],v1,v2)
44define <64 x i8> @test_04(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
45  %t0 = icmp sgt <64 x i8> %v0, %v1
46  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
47  ret <64 x i8> %t1
48}
49
50; CHECK-LABEL: test_05:
51; CHECK: q[[Q050:[0-3]]] = vcmp.gt(v1.b,v0.b)
52; CHECK: v0 = vmux(q[[Q050]],v2,v1)
53define <64 x i8> @test_05(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
54  %t0 = icmp sge <64 x i8> %v0, %v1
55  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
56  ret <64 x i8> %t1
57}
58
59; CHECK-LABEL: test_06:
60; CHECK: q[[Q060:[0-3]]] = vcmp.gt(v1.ub,v0.ub)
61; CHECK: v0 = vmux(q[[Q060]],v1,v2)
62define <64 x i8> @test_06(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
63  %t0 = icmp ult <64 x i8> %v0, %v1
64  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
65  ret <64 x i8> %t1
66}
67
68; CHECK-LABEL: test_07:
69; CHECK: q[[Q070:[0-3]]] = vcmp.gt(v0.ub,v1.ub)
70; CHECK: v0 = vmux(q[[Q070]],v2,v1)
71define <64 x i8> @test_07(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
72  %t0 = icmp ule <64 x i8> %v0, %v1
73  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
74  ret <64 x i8> %t1
75}
76
77; CHECK-LABEL: test_08:
78; CHECK: q[[Q080:[0-3]]] = vcmp.gt(v0.ub,v1.ub)
79; CHECK: v0 = vmux(q[[Q080]],v1,v2)
80define <64 x i8> @test_08(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
81  %t0 = icmp ugt <64 x i8> %v0, %v1
82  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
83  ret <64 x i8> %t1
84}
85
86; CHECK-LABEL: test_09:
87; CHECK: q[[Q090:[0-3]]] = vcmp.gt(v1.ub,v0.ub)
88; CHECK: v0 = vmux(q[[Q090]],v2,v1)
89define <64 x i8> @test_09(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
90  %t0 = icmp uge <64 x i8> %v0, %v1
91  %t1 = select <64 x i1> %t0, <64 x i8> %v1, <64 x i8> %v2
92  ret <64 x i8> %t1
93}
94
95; CHECK-LABEL: test_0a:
96; CHECK: q[[Q0A0:[0-3]]] &= vcmp.eq(v0.b,v1.b)
97; CHECK: v0 = vmux(q[[Q0A0]],v0,v1)
98define <64 x i8> @test_0a(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
99  %q0 = icmp eq <64 x i8> %v0, %v1
100  %q1 = trunc <64 x i8> %v2 to <64 x i1>
101  %q2 = and <64 x i1> %q0, %q1
102  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
103  ret <64 x i8> %t1
104}
105
106; CHECK-LABEL: test_0b:
107; CHECK: q[[Q0B0:[0-3]]] |= vcmp.eq(v0.b,v1.b)
108; CHECK: v0 = vmux(q[[Q0B0]],v0,v1)
109define <64 x i8> @test_0b(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
110  %q0 = icmp eq <64 x i8> %v0, %v1
111  %q1 = trunc <64 x i8> %v2 to <64 x i1>
112  %q2 = or <64 x i1> %q0, %q1
113  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
114  ret <64 x i8> %t1
115}
116
117; CHECK-LABEL: test_0c:
118; CHECK: q[[Q0C0:[0-3]]] ^= vcmp.eq(v0.b,v1.b)
119; CHECK: v0 = vmux(q[[Q0C0]],v0,v1)
120define <64 x i8> @test_0c(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
121  %q0 = icmp eq <64 x i8> %v0, %v1
122  %q1 = trunc <64 x i8> %v2 to <64 x i1>
123  %q2 = xor <64 x i1> %q0, %q1
124  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
125  ret <64 x i8> %t1
126}
127
128; CHECK-LABEL: test_0d:
129; CHECK: q[[Q0D0:[0-3]]] &= vcmp.gt(v0.b,v1.b)
130; CHECK: v0 = vmux(q[[Q0D0]],v0,v1)
131define <64 x i8> @test_0d(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
132  %q0 = icmp sgt <64 x i8> %v0, %v1
133  %q1 = trunc <64 x i8> %v2 to <64 x i1>
134  %q2 = and <64 x i1> %q0, %q1
135  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
136  ret <64 x i8> %t1
137}
138
139; CHECK-LABEL: test_0e:
140; CHECK: q[[Q0E0:[0-3]]] |= vcmp.gt(v0.b,v1.b)
141; CHECK: v0 = vmux(q[[Q0E0]],v0,v1)
142define <64 x i8> @test_0e(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
143  %q0 = icmp sgt <64 x i8> %v0, %v1
144  %q1 = trunc <64 x i8> %v2 to <64 x i1>
145  %q2 = or <64 x i1> %q0, %q1
146  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
147  ret <64 x i8> %t1
148}
149
150; CHECK-LABEL: test_0f:
151; CHECK: q[[Q0F0:[0-3]]] ^= vcmp.gt(v0.b,v1.b)
152; CHECK: v0 = vmux(q[[Q0F0]],v0,v1)
153define <64 x i8> @test_0f(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
154  %q0 = icmp sgt <64 x i8> %v0, %v1
155  %q1 = trunc <64 x i8> %v2 to <64 x i1>
156  %q2 = xor <64 x i1> %q0, %q1
157  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
158  ret <64 x i8> %t1
159}
160
161; CHECK-LABEL: test_0g:
162; CHECK: q[[Q0G0:[0-3]]] &= vcmp.gt(v0.ub,v1.ub)
163; CHECK: v0 = vmux(q[[Q0G0]],v0,v1)
164define <64 x i8> @test_0g(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
165  %q0 = icmp ugt <64 x i8> %v0, %v1
166  %q1 = trunc <64 x i8> %v2 to <64 x i1>
167  %q2 = and <64 x i1> %q0, %q1
168  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
169  ret <64 x i8> %t1
170}
171
172; CHECK-LABEL: test_0h:
173; CHECK: q[[Q0H0:[0-3]]] |= vcmp.gt(v0.ub,v1.ub)
174; CHECK: v0 = vmux(q[[Q0H0]],v0,v1)
175define <64 x i8> @test_0h(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
176  %q0 = icmp ugt <64 x i8> %v0, %v1
177  %q1 = trunc <64 x i8> %v2 to <64 x i1>
178  %q2 = or <64 x i1> %q0, %q1
179  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
180  ret <64 x i8> %t1
181}
182
183; CHECK-LABEL: test_0i:
184; CHECK: q[[Q0I0:[0-3]]] ^= vcmp.gt(v0.ub,v1.ub)
185; CHECK: v0 = vmux(q[[Q0I0]],v0,v1)
186define <64 x i8> @test_0i(<64 x i8> %v0, <64 x i8> %v1, <64 x i8> %v2) #0 {
187  %q0 = icmp ugt <64 x i8> %v0, %v1
188  %q1 = trunc <64 x i8> %v2 to <64 x i1>
189  %q2 = xor <64 x i1> %q0, %q1
190  %t1 = select <64 x i1> %q2, <64 x i8> %v0, <64 x i8> %v1
191  ret <64 x i8> %t1
192}
193
194
195; --- Half
196
197; CHECK-LABEL: test_10:
198; CHECK: q[[Q100:[0-3]]] = vcmp.eq(v0.h,v1.h)
199; CHECK: v0 = vmux(q[[Q100]],v1,v2)
200define <32 x i16> @test_10(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
201  %t0 = icmp eq <32 x i16> %v0, %v1
202  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
203  ret <32 x i16> %t1
204}
205
206; CHECK-LABEL: test_11:
207; CHECK: q[[Q110:[0-3]]] = vcmp.eq(v0.h,v1.h)
208; CHECK: v0 = vmux(q[[Q110]],v2,v1)
209define <32 x i16> @test_11(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
210  %t0 = icmp ne <32 x i16> %v0, %v1
211  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
212  ret <32 x i16> %t1
213}
214
215; CHECK-LABEL: test_12:
216; CHECK: q[[Q120:[0-3]]] = vcmp.gt(v1.h,v0.h)
217; CHECK: v0 = vmux(q[[Q120]],v1,v2)
218define <32 x i16> @test_12(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
219  %t0 = icmp slt <32 x i16> %v0, %v1
220  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
221  ret <32 x i16> %t1
222}
223
224; CHECK-LABEL: test_13:
225; CHECK: q[[Q130:[0-3]]] = vcmp.gt(v0.h,v1.h)
226; CHECK: v0 = vmux(q[[Q130]],v2,v1)
227define <32 x i16> @test_13(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
228  %t0 = icmp sle <32 x i16> %v0, %v1
229  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
230  ret <32 x i16> %t1
231}
232
233; CHECK-LABEL: test_14:
234; CHECK: q[[Q140:[0-3]]] = vcmp.gt(v0.h,v1.h)
235; CHECK: v0 = vmux(q[[Q140]],v1,v2)
236define <32 x i16> @test_14(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
237  %t0 = icmp sgt <32 x i16> %v0, %v1
238  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
239  ret <32 x i16> %t1
240}
241
242; CHECK-LABEL: test_15:
243; CHECK: q[[Q150:[0-3]]] = vcmp.gt(v1.h,v0.h)
244; CHECK: v0 = vmux(q[[Q150]],v2,v1)
245define <32 x i16> @test_15(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
246  %t0 = icmp sge <32 x i16> %v0, %v1
247  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
248  ret <32 x i16> %t1
249}
250
251; CHECK-LABEL: test_16:
252; CHECK: q[[Q160:[0-3]]] = vcmp.gt(v1.uh,v0.uh)
253; CHECK: v0 = vmux(q[[Q160]],v1,v2)
254define <32 x i16> @test_16(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
255  %t0 = icmp ult <32 x i16> %v0, %v1
256  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
257  ret <32 x i16> %t1
258}
259
260; CHECK-LABEL: test_17:
261; CHECK: q[[Q170:[0-3]]] = vcmp.gt(v0.uh,v1.uh)
262; CHECK: v0 = vmux(q[[Q170]],v2,v1)
263define <32 x i16> @test_17(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
264  %t0 = icmp ule <32 x i16> %v0, %v1
265  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
266  ret <32 x i16> %t1
267}
268
269; CHECK-LABEL: test_18:
270; CHECK: q[[Q180:[0-3]]] = vcmp.gt(v0.uh,v1.uh)
271; CHECK: v0 = vmux(q[[Q180]],v1,v2)
272define <32 x i16> @test_18(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
273  %t0 = icmp ugt <32 x i16> %v0, %v1
274  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
275  ret <32 x i16> %t1
276}
277
278; CHECK-LABEL: test_19:
279; CHECK: q[[Q190:[0-3]]] = vcmp.gt(v1.uh,v0.uh)
280; CHECK: v0 = vmux(q[[Q190]],v2,v1)
281define <32 x i16> @test_19(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
282  %t0 = icmp uge <32 x i16> %v0, %v1
283  %t1 = select <32 x i1> %t0, <32 x i16> %v1, <32 x i16> %v2
284  ret <32 x i16> %t1
285}
286
287; CHECK-LABEL: test_1a:
288; CHECK: q[[Q1A0:[0-3]]] &= vcmp.eq(v0.h,v1.h)
289; CHECK: v0 = vmux(q[[Q1A0]],v0,v1)
290define <32 x i16> @test_1a(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
291  %q0 = icmp eq <32 x i16> %v0, %v1
292  %q1 = trunc <32 x i16> %v2 to <32 x i1>
293  %q2 = and <32 x i1> %q0, %q1
294  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
295  ret <32 x i16> %t1
296}
297
298; CHECK-LABEL: test_1b:
299; CHECK: q[[Q1B0:[0-3]]] |= vcmp.eq(v0.h,v1.h)
300; CHECK: v0 = vmux(q[[Q1B0]],v0,v1)
301define <32 x i16> @test_1b(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
302  %q0 = icmp eq <32 x i16> %v0, %v1
303  %q1 = trunc <32 x i16> %v2 to <32 x i1>
304  %q2 = or <32 x i1> %q0, %q1
305  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
306  ret <32 x i16> %t1
307}
308
309; CHECK-LABEL: test_1c:
310; CHECK: q[[Q1C0:[0-3]]] ^= vcmp.eq(v0.h,v1.h)
311; CHECK: v0 = vmux(q[[Q1C0]],v0,v1)
312define <32 x i16> @test_1c(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
313  %q0 = icmp eq <32 x i16> %v0, %v1
314  %q1 = trunc <32 x i16> %v2 to <32 x i1>
315  %q2 = xor <32 x i1> %q0, %q1
316  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
317  ret <32 x i16> %t1
318}
319
320; CHECK-LABEL: test_1d:
321; CHECK: q[[Q1D0:[0-3]]] &= vcmp.gt(v0.h,v1.h)
322; CHECK: v0 = vmux(q[[Q1D0]],v0,v1)
323define <32 x i16> @test_1d(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
324  %q0 = icmp sgt <32 x i16> %v0, %v1
325  %q1 = trunc <32 x i16> %v2 to <32 x i1>
326  %q2 = and <32 x i1> %q0, %q1
327  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
328  ret <32 x i16> %t1
329}
330
331; CHECK-LABEL: test_1e:
332; CHECK: q[[Q1E0:[0-3]]] |= vcmp.gt(v0.h,v1.h)
333; CHECK: v0 = vmux(q[[Q1E0]],v0,v1)
334define <32 x i16> @test_1e(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
335  %q0 = icmp sgt <32 x i16> %v0, %v1
336  %q1 = trunc <32 x i16> %v2 to <32 x i1>
337  %q2 = or <32 x i1> %q0, %q1
338  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
339  ret <32 x i16> %t1
340}
341
342; CHECK-LABEL: test_1f:
343; CHECK: q[[Q1F0:[0-3]]] ^= vcmp.gt(v0.h,v1.h)
344; CHECK: v0 = vmux(q[[Q1F0]],v0,v1)
345define <32 x i16> @test_1f(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
346  %q0 = icmp sgt <32 x i16> %v0, %v1
347  %q1 = trunc <32 x i16> %v2 to <32 x i1>
348  %q2 = xor <32 x i1> %q0, %q1
349  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
350  ret <32 x i16> %t1
351}
352
353; CHECK-LABEL: test_1g:
354; CHECK: q[[Q1G0:[0-3]]] &= vcmp.gt(v0.uh,v1.uh)
355; CHECK: v0 = vmux(q[[Q1G0]],v0,v1)
356define <32 x i16> @test_1g(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
357  %q0 = icmp ugt <32 x i16> %v0, %v1
358  %q1 = trunc <32 x i16> %v2 to <32 x i1>
359  %q2 = and <32 x i1> %q0, %q1
360  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
361  ret <32 x i16> %t1
362}
363
364; CHECK-LABEL: test_1h:
365; CHECK: q[[Q1H0:[0-3]]] |= vcmp.gt(v0.uh,v1.uh)
366; CHECK: v0 = vmux(q[[Q1H0]],v0,v1)
367define <32 x i16> @test_1h(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
368  %q0 = icmp ugt <32 x i16> %v0, %v1
369  %q1 = trunc <32 x i16> %v2 to <32 x i1>
370  %q2 = or <32 x i1> %q0, %q1
371  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
372  ret <32 x i16> %t1
373}
374
375; CHECK-LABEL: test_1i:
376; CHECK: q[[Q1I0:[0-3]]] ^= vcmp.gt(v0.uh,v1.uh)
377; CHECK: v0 = vmux(q[[Q1I0]],v0,v1)
378define <32 x i16> @test_1i(<32 x i16> %v0, <32 x i16> %v1, <32 x i16> %v2) #0 {
379  %q0 = icmp ugt <32 x i16> %v0, %v1
380  %q1 = trunc <32 x i16> %v2 to <32 x i1>
381  %q2 = xor <32 x i1> %q0, %q1
382  %t1 = select <32 x i1> %q2, <32 x i16> %v0, <32 x i16> %v1
383  ret <32 x i16> %t1
384}
385
386; --- Word
387
388; CHECK-LABEL: test_20:
389; CHECK: q[[Q200:[0-3]]] = vcmp.eq(v0.w,v1.w)
390; CHECK: v0 = vmux(q[[Q200]],v1,v2)
391define <16 x i32> @test_20(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
392  %t0 = icmp eq <16 x i32> %v0, %v1
393  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
394  ret <16 x i32> %t1
395}
396
397; CHECK-LABEL: test_21:
398; CHECK: q[[Q210:[0-3]]] = vcmp.eq(v0.w,v1.w)
399; CHECK: v0 = vmux(q[[Q210]],v2,v1)
400define <16 x i32> @test_21(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
401  %t0 = icmp ne <16 x i32> %v0, %v1
402  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
403  ret <16 x i32> %t1
404}
405
406; CHECK-LABEL: test_22:
407; CHECK: q[[Q220:[0-3]]] = vcmp.gt(v1.w,v0.w)
408; CHECK: v0 = vmux(q[[Q220]],v1,v2)
409define <16 x i32> @test_22(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
410  %t0 = icmp slt <16 x i32> %v0, %v1
411  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
412  ret <16 x i32> %t1
413}
414
415; CHECK-LABEL: test_23:
416; CHECK: q[[Q230:[0-3]]] = vcmp.gt(v0.w,v1.w)
417; CHECK: v0 = vmux(q[[Q230]],v2,v1)
418define <16 x i32> @test_23(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
419  %t0 = icmp sle <16 x i32> %v0, %v1
420  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
421  ret <16 x i32> %t1
422}
423
424; CHECK-LABEL: test_24:
425; CHECK: q[[Q240:[0-3]]] = vcmp.gt(v0.w,v1.w)
426; CHECK: v0 = vmux(q[[Q240]],v1,v2)
427define <16 x i32> @test_24(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
428  %t0 = icmp sgt <16 x i32> %v0, %v1
429  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
430  ret <16 x i32> %t1
431}
432
433; CHECK-LABEL: test_25:
434; CHECK: q[[Q250:[0-3]]] = vcmp.gt(v1.w,v0.w)
435; CHECK: v0 = vmux(q[[Q250]],v2,v1)
436define <16 x i32> @test_25(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
437  %t0 = icmp sge <16 x i32> %v0, %v1
438  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
439  ret <16 x i32> %t1
440}
441
442; CHECK-LABEL: test_26:
443; CHECK: q[[Q260:[0-3]]] = vcmp.gt(v1.uw,v0.uw)
444; CHECK: v0 = vmux(q[[Q260]],v1,v2)
445define <16 x i32> @test_26(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
446  %t0 = icmp ult <16 x i32> %v0, %v1
447  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
448  ret <16 x i32> %t1
449}
450
451; CHECK-LABEL: test_27:
452; CHECK: q[[Q270:[0-3]]] = vcmp.gt(v0.uw,v1.uw)
453; CHECK: v0 = vmux(q[[Q270]],v2,v1)
454define <16 x i32> @test_27(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
455  %t0 = icmp ule <16 x i32> %v0, %v1
456  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
457  ret <16 x i32> %t1
458}
459
460; CHECK-LABEL: test_28:
461; CHECK: q[[Q280:[0-3]]] = vcmp.gt(v0.uw,v1.uw)
462; CHECK: v0 = vmux(q[[Q280]],v1,v2)
463define <16 x i32> @test_28(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
464  %t0 = icmp ugt <16 x i32> %v0, %v1
465  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
466  ret <16 x i32> %t1
467}
468
469; CHECK-LABEL: test_29:
470; CHECK: q[[Q290:[0-3]]] = vcmp.gt(v1.uw,v0.uw)
471; CHECK: v0 = vmux(q[[Q290]],v2,v1)
472define <16 x i32> @test_29(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
473  %t0 = icmp uge <16 x i32> %v0, %v1
474  %t1 = select <16 x i1> %t0, <16 x i32> %v1, <16 x i32> %v2
475  ret <16 x i32> %t1
476}
477
478; CHECK-LABEL: test_2a:
479; CHECK: q[[Q2A0:[0-3]]] &= vcmp.eq(v0.w,v1.w)
480; CHECK: v0 = vmux(q[[Q2A0]],v0,v1)
481define <16 x i32> @test_2a(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
482  %q0 = icmp eq <16 x i32> %v0, %v1
483  %q1 = trunc <16 x i32> %v2 to <16 x i1>
484  %q2 = and <16 x i1> %q0, %q1
485  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
486  ret <16 x i32> %t1
487}
488
489; CHECK-LABEL: test_2b:
490; CHECK: q[[Q2B0:[0-3]]] |= vcmp.eq(v0.w,v1.w)
491; CHECK: v0 = vmux(q[[Q2B0]],v0,v1)
492define <16 x i32> @test_2b(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
493  %q0 = icmp eq <16 x i32> %v0, %v1
494  %q1 = trunc <16 x i32> %v2 to <16 x i1>
495  %q2 = or <16 x i1> %q0, %q1
496  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
497  ret <16 x i32> %t1
498}
499
500; CHECK-LABEL: test_2c:
501; CHECK: q[[Q2C0:[0-3]]] ^= vcmp.eq(v0.w,v1.w)
502; CHECK: v0 = vmux(q[[Q2C0]],v0,v1)
503define <16 x i32> @test_2c(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
504  %q0 = icmp eq <16 x i32> %v0, %v1
505  %q1 = trunc <16 x i32> %v2 to <16 x i1>
506  %q2 = xor <16 x i1> %q0, %q1
507  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
508  ret <16 x i32> %t1
509}
510
511; CHECK-LABEL: test_2d:
512; CHECK: q[[Q2D0:[0-3]]] &= vcmp.gt(v0.w,v1.w)
513; CHECK: v0 = vmux(q[[Q2D0]],v0,v1)
514define <16 x i32> @test_2d(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
515  %q0 = icmp sgt <16 x i32> %v0, %v1
516  %q1 = trunc <16 x i32> %v2 to <16 x i1>
517  %q2 = and <16 x i1> %q0, %q1
518  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
519  ret <16 x i32> %t1
520}
521
522; CHECK-LABEL: test_2e:
523; CHECK: q[[Q2E0:[0-3]]] |= vcmp.gt(v0.w,v1.w)
524; CHECK: v0 = vmux(q[[Q2E0]],v0,v1)
525define <16 x i32> @test_2e(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
526  %q0 = icmp sgt <16 x i32> %v0, %v1
527  %q1 = trunc <16 x i32> %v2 to <16 x i1>
528  %q2 = or <16 x i1> %q0, %q1
529  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
530  ret <16 x i32> %t1
531}
532
533; CHECK-LABEL: test_2f:
534; CHECK: q[[Q2F0:[0-3]]] ^= vcmp.gt(v0.w,v1.w)
535; CHECK: v0 = vmux(q[[Q2F0]],v0,v1)
536define <16 x i32> @test_2f(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
537  %q0 = icmp sgt <16 x i32> %v0, %v1
538  %q1 = trunc <16 x i32> %v2 to <16 x i1>
539  %q2 = xor <16 x i1> %q0, %q1
540  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
541  ret <16 x i32> %t1
542}
543
544; CHECK-LABEL: test_2g:
545; CHECK: q[[Q2G0:[0-3]]] &= vcmp.gt(v0.uw,v1.uw)
546; CHECK: v0 = vmux(q[[Q2G0]],v0,v1)
547define <16 x i32> @test_2g(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
548  %q0 = icmp ugt <16 x i32> %v0, %v1
549  %q1 = trunc <16 x i32> %v2 to <16 x i1>
550  %q2 = and <16 x i1> %q0, %q1
551  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
552  ret <16 x i32> %t1
553}
554
555; CHECK-LABEL: test_2h:
556; CHECK: q[[Q2H0:[0-3]]] |= vcmp.gt(v0.uw,v1.uw)
557; CHECK: v0 = vmux(q[[Q2H0]],v0,v1)
558define <16 x i32> @test_2h(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
559  %q0 = icmp ugt <16 x i32> %v0, %v1
560  %q1 = trunc <16 x i32> %v2 to <16 x i1>
561  %q2 = or <16 x i1> %q0, %q1
562  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
563  ret <16 x i32> %t1
564}
565
566; CHECK-LABEL: test_2i:
567; CHECK: q[[Q2I0:[0-3]]] ^= vcmp.gt(v0.uw,v1.uw)
568; CHECK: v0 = vmux(q[[Q2I0]],v0,v1)
569define <16 x i32> @test_2i(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) #0 {
570  %q0 = icmp ugt <16 x i32> %v0, %v1
571  %q1 = trunc <16 x i32> %v2 to <16 x i1>
572  %q2 = xor <16 x i1> %q0, %q1
573  %t1 = select <16 x i1> %q2, <16 x i32> %v0, <16 x i32> %v1
574  ret <16 x i32> %t1
575}
576
577attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
578