1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; CHECK-LABEL: test_00:
4; CHECK: v1:0.h = vunpack(v0.b)
5define <64 x i16> @test_00(<64 x i8> %v0) #0 {
6  %p = sext <64 x i8> %v0 to <64 x i16>
7  ret <64 x i16> %p
8}
9
10; CHECK-LABEL: test_01:
11; CHECK: v1:0.w = vunpack(v0.h)
12define <32 x i32> @test_01(<32 x i16> %v0) #0 {
13  %p = sext <32 x i16> %v0 to <32 x i32>
14  ret <32 x i32> %p
15}
16
17; CHECK-LABEL: test_02:
18; CHECK: v1:0.uh = vunpack(v0.ub)
19define <64 x i16> @test_02(<64 x i8> %v0) #0 {
20  %p = zext <64 x i8> %v0 to <64 x i16>
21  ret <64 x i16> %p
22}
23
24; CHECK-LABEL: test_03:
25; CHECK: v1:0.uw = vunpack(v0.uh)
26define <32 x i32> @test_03(<32 x i16> %v0) #0 {
27  %p = zext <32 x i16> %v0 to <32 x i32>
28  ret <32 x i32> %p
29}
30
31; CHECK-LABEL: test_04:
32; CHECK-DAG: v[[H40:[0-9]+]]:[[L40:[0-9]+]].h = vunpack(v0.b)
33; CHECK: v1:0.w = vunpack(v[[L40]].h)
34define <16 x i32> @test_04(<64 x i8> %v0) #0 {
35  %x = sext <64 x i8> %v0 to <64 x i32>
36  %p = shufflevector <64 x i32> %x, <64 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
37  ret <16 x i32> %p
38}
39
40; CHECK-LABEL: test_05:
41; CHECK-DAG: v[[H50:[0-9]+]]:[[L50:[0-9]+]].uh = vunpack(v0.ub)
42; CHECK: v1:0.uw = vunpack(v[[L50]].uh)
43define <16 x i32> @test_05(<64 x i8> %v0) #0 {
44  %x = zext <64 x i8> %v0 to <64 x i32>
45  %p = shufflevector <64 x i32> %x, <64 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
46  ret <16 x i32> %p
47}
48
49attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
50
51