1; REQUIRES: asserts 2; 3; RUN: llc -march=hexagon -enable-pipeliner=true -debug-only=pipeliner < %s \ 4; RUN: 2>&1 -pipeliner-experimental-cg=true | FileCheck %s 5 6; Test that the artificial dependence is created as a result of 7; CopyToPhi DAG mutation. 8; CHECK: Ord Latency=0 Artificial 9target triple = "hexagon" 10 11; Function Attrs: nounwind 12define void @foo(i64* nocapture readonly %r64, i16 zeroext %n, i16 zeroext %s, i64* nocapture %p64) #0 { 13entry: 14 %conv = zext i16 %n to i32 15 %cmp = icmp eq i16 %n, 0 16 br i1 %cmp, label %for.end, label %for.body.preheader 17 18for.body.preheader: ; preds = %entry 19 %tmp = load i64, i64* %r64, align 8 20 %v.sroa.0.0.extract.trunc = trunc i64 %tmp to i16 21 %v.sroa.4.0.extract.shift = lshr i64 %tmp, 16 22 %v.sroa.4.0.extract.trunc = trunc i64 %v.sroa.4.0.extract.shift to i16 23 %v.sroa.5.0.extract.shift = lshr i64 %tmp, 32 24 %v.sroa.5.0.extract.trunc = trunc i64 %v.sroa.5.0.extract.shift to i16 25 %v.sroa.6.0.extract.shift = lshr i64 %tmp, 48 26 %v.sroa.6.0.extract.trunc = trunc i64 %v.sroa.6.0.extract.shift to i16 27 %tmp1 = bitcast i64* %p64 to i16* 28 %conv2 = zext i16 %s to i32 29 %add.ptr = getelementptr inbounds i16, i16* %tmp1, i32 %conv2 30 %add.ptr.sum = add nuw nsw i32 %conv2, 1 31 %add.ptr3 = getelementptr inbounds i16, i16* %tmp1, i32 %add.ptr.sum 32 %add.ptr.sum50 = add nuw nsw i32 %conv2, 2 33 %add.ptr4 = getelementptr inbounds i16, i16* %tmp1, i32 %add.ptr.sum50 34 %add.ptr.sum51 = add nuw nsw i32 %conv2, 3 35 %add.ptr5 = getelementptr inbounds i16, i16* %tmp1, i32 %add.ptr.sum51 36 br label %for.body 37 38for.body: ; preds = %for.body, %for.body.preheader 39 %add.ptr11.phi = phi i16* [ %add.ptr11.inc, %for.body ], [ %add.ptr, %for.body.preheader ] 40 %add.ptr16.phi = phi i16* [ %add.ptr16.inc, %for.body ], [ %add.ptr3, %for.body.preheader ] 41 %add.ptr21.phi = phi i16* [ %add.ptr21.inc, %for.body ], [ %add.ptr4, %for.body.preheader ] 42 %add.ptr26.phi = phi i16* [ %add.ptr26.inc, %for.body ], [ %add.ptr5, %for.body.preheader ] 43 %i.058.pmt = phi i32 [ %inc.pmt, %for.body ], [ 0, %for.body.preheader ] 44 %v.sroa.0.157 = phi i16 [ %v.sroa.0.0.extract.trunc34, %for.body ], [ %v.sroa.0.0.extract.trunc, %for.body.preheader ] 45 %v.sroa.4.156 = phi i16 [ %v.sroa.4.0.extract.trunc36, %for.body ], [ %v.sroa.4.0.extract.trunc, %for.body.preheader ] 46 %v.sroa.5.155 = phi i16 [ %v.sroa.5.0.extract.trunc38, %for.body ], [ %v.sroa.5.0.extract.trunc, %for.body.preheader ] 47 %v.sroa.6.154 = phi i16 [ %v.sroa.6.0.extract.trunc40, %for.body ], [ %v.sroa.6.0.extract.trunc, %for.body.preheader ] 48 %q64.153.pn = phi i64* [ %q64.153, %for.body ], [ %r64, %for.body.preheader ] 49 %q64.153 = getelementptr inbounds i64, i64* %q64.153.pn, i32 1 50 store i16 %v.sroa.0.157, i16* %add.ptr11.phi, align 2 51 store i16 %v.sroa.4.156, i16* %add.ptr16.phi, align 2 52 store i16 %v.sroa.5.155, i16* %add.ptr21.phi, align 2 53 store i16 %v.sroa.6.154, i16* %add.ptr26.phi, align 2 54 %tmp2 = load i64, i64* %q64.153, align 8 55 %v.sroa.0.0.extract.trunc34 = trunc i64 %tmp2 to i16 56 %v.sroa.4.0.extract.shift35 = lshr i64 %tmp2, 16 57 %v.sroa.4.0.extract.trunc36 = trunc i64 %v.sroa.4.0.extract.shift35 to i16 58 %v.sroa.5.0.extract.shift37 = lshr i64 %tmp2, 32 59 %v.sroa.5.0.extract.trunc38 = trunc i64 %v.sroa.5.0.extract.shift37 to i16 60 %v.sroa.6.0.extract.shift39 = lshr i64 %tmp2, 48 61 %v.sroa.6.0.extract.trunc40 = trunc i64 %v.sroa.6.0.extract.shift39 to i16 62 %inc.pmt = add i32 %i.058.pmt, 1 63 %cmp8 = icmp slt i32 %inc.pmt, %conv 64 %add.ptr11.inc = getelementptr i16, i16* %add.ptr11.phi, i32 4 65 %add.ptr16.inc = getelementptr i16, i16* %add.ptr16.phi, i32 4 66 %add.ptr21.inc = getelementptr i16, i16* %add.ptr21.phi, i32 4 67 %add.ptr26.inc = getelementptr i16, i16* %add.ptr26.phi, i32 4 68 br i1 %cmp8, label %for.body, label %for.end 69 70for.end: ; preds = %for.body, %entry 71 ret void 72} 73 74attributes #0 = { nounwind "target-cpu"="hexagonv65" } 75