1; RUN: llc -march=hexagon < %s -pipeliner-experimental-cg=true | FileCheck %s
2
3; Test that we use the correct name in an epilog phi for a phi value
4; that is defined for the last time in the kernel. Previously, we
5; used the value from kernel loop definition, but we really need
6; to use the value from the Phi in the kernel instead.
7
8; In this test case, the second loop is pipelined, block b5.
9
10; CHECK: loop1
11; CHECK: [[REG0:r([0-9]+)]] += mpyi
12; CHECK: [[REG2:r([0-9]+)]] = add([[REG1:r([0-9]+)]],add([[REG0]],#8
13; CHECK: endloop1
14
15%s.0 = type { %s.1*, %s.4*, %s.7*, i8*, i8, i32, %s.8*, i32, i32, i32, i8, i8, i32, i32, double, i8, i8, i8, i8, i8, i8, i8, i8, i32, i8, i8, i8, i32, i32, i32, i32, i32, i32, i8**, i32, i32, i32, i32, i32, [64 x i32]*, [4 x %s.9*], [4 x %s.10*], [4 x %s.10*], i32, %s.23*, i8, i8, [16 x i8], [16 x i8], [16 x i8], i32, i8, i8, i8, i8, i16, i16, i8, i8, i8, %s.11*, i32, i32, i32, i32, i8*, i32, [4 x %s.23*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, %s.12*, %s.13*, %s.14*, %s.15*, %s.16*, %s.17*, %s.18*, %s.19*, %s.20*, %s.21*, %s.22* }
16%s.1 = type { void (%s.2*)*, void (%s.2*, i32)*, void (%s.2*)*, void (%s.2*, i8*)*, void (%s.2*)*, i32, %s.3, i32, i32, i8**, i32, i8**, i32, i32 }
17%s.2 = type { %s.1*, %s.4*, %s.7*, i8*, i8, i32 }
18%s.3 = type { [8 x i32], [48 x i8] }
19%s.4 = type { i8* (%s.2*, i32, i32)*, i8* (%s.2*, i32, i32)*, i8** (%s.2*, i32, i32, i32)*, [64 x i16]** (%s.2*, i32, i32, i32)*, %s.5* (%s.2*, i32, i8, i32, i32, i32)*, %s.6* (%s.2*, i32, i8, i32, i32, i32)*, {}*, i8** (%s.2*, %s.5*, i32, i32, i8)*, [64 x i16]** (%s.2*, %s.6*, i32, i32, i8)*, void (%s.2*, i32)*, {}*, i32, i32 }
20%s.5 = type opaque
21%s.6 = type opaque
22%s.7 = type { {}*, i32, i32, i32, i32 }
23%s.8 = type { i8*, i32, {}*, i8 (%s.0*)*, void (%s.0*, i32)*, i8 (%s.0*, i32)*, {}* }
24%s.9 = type { [64 x i16], i8 }
25%s.10 = type { [17 x i8], [256 x i8], i8 }
26%s.11 = type { %s.11*, i8, i32, i32, i8* }
27%s.12 = type { {}*, {}*, i8 }
28%s.13 = type { void (%s.0*, i8)*, void (%s.0*, i8**, i32*, i32)* }
29%s.14 = type { {}*, i32 (%s.0*)*, {}*, i32 (%s.0*, i8***)*, %s.6** }
30%s.15 = type { void (%s.0*, i8)*, void (%s.0*, i8***, i32*, i32, i8**, i32*, i32)* }
31%s.16 = type { i32 (%s.0*)*, {}*, {}*, {}*, i8, i8 }
32%s.17 = type { {}*, i32 (%s.0*)*, i8 (%s.0*)*, i8, i8, i32, i32 }
33%s.18 = type { {}*, i8 (%s.0*, [64 x i16]**)*, i8 }
34%s.19 = type { {}*, [5 x void (%s.0*, %s.23*, i16*, i8**, i32)*] }
35%s.20 = type { {}*, void (%s.0*, i8***, i32*, i32, i8**, i32*, i32)*, i8 }
36%s.21 = type { {}*, void (%s.0*, i8***, i32, i8**, i32)* }
37%s.22 = type { void (%s.0*, i8)*, void (%s.0*, i8**, i8**, i32)*, {}*, {}* }
38%s.23 = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, %s.9*, i8* }
39
40; Function Attrs: nounwind optsize
41define hidden void @f0(%s.0* nocapture readonly %a0, %s.23* nocapture readonly %a1, i8** nocapture readonly %a2, i8*** nocapture readonly %a3) #0 {
42b0:
43  %v0 = load i8**, i8*** %a3, align 4
44  %v1 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 62
45  %v2 = load i32, i32* %v1, align 4
46  %v3 = icmp sgt i32 %v2, 0
47  br i1 %v3, label %b1, label %b10
48
49b1:                                               ; preds = %b0
50  %v4 = getelementptr inbounds %s.23, %s.23* %a1, i32 0, i32 10
51  br label %b2
52
53b2:                                               ; preds = %b8, %b1
54  %v5 = phi i32 [ 0, %b1 ], [ %v98, %b8 ]
55  %v6 = phi i32 [ 0, %b1 ], [ %v99, %b8 ]
56  %v7 = getelementptr inbounds i8*, i8** %a2, i32 %v6
57  br label %b3
58
59b3:                                               ; preds = %b7, %b2
60  %v8 = phi i32 [ 0, %b2 ], [ %v96, %b7 ]
61  %v9 = phi i32 [ %v5, %b2 ], [ %v16, %b7 ]
62  %v10 = load i8*, i8** %v7, align 4
63  %v11 = icmp eq i32 %v8, 0
64  %v12 = select i1 %v11, i32 -1, i32 1
65  %v13 = add i32 %v12, %v6
66  %v14 = getelementptr inbounds i8*, i8** %a2, i32 %v13
67  %v15 = load i8*, i8** %v14, align 4
68  %v16 = add nsw i32 %v9, 1
69  %v17 = getelementptr inbounds i8*, i8** %v0, i32 %v9
70  %v18 = load i8*, i8** %v17, align 4
71  %v19 = getelementptr inbounds i8, i8* %v10, i32 1
72  %v20 = load i8, i8* %v10, align 1
73  %v21 = zext i8 %v20 to i32
74  %v22 = mul nsw i32 %v21, 3
75  %v23 = getelementptr inbounds i8, i8* %v15, i32 1
76  %v24 = load i8, i8* %v15, align 1
77  %v25 = zext i8 %v24 to i32
78  %v26 = add nsw i32 %v22, %v25
79  %v27 = load i8, i8* %v19, align 1
80  %v28 = zext i8 %v27 to i32
81  %v29 = mul nsw i32 %v28, 3
82  %v30 = load i8, i8* %v23, align 1
83  %v31 = zext i8 %v30 to i32
84  %v32 = add nsw i32 %v29, %v31
85  %v33 = mul nsw i32 %v26, 4
86  %v34 = add nsw i32 %v33, 8
87  %v35 = lshr i32 %v34, 4
88  %v36 = trunc i32 %v35 to i8
89  %v37 = getelementptr inbounds i8, i8* %v18, i32 1
90  store i8 %v36, i8* %v18, align 1
91  %v38 = mul nsw i32 %v26, 3
92  %v39 = add i32 %v38, 7
93  %v40 = add i32 %v39, %v32
94  %v41 = lshr i32 %v40, 4
95  %v42 = trunc i32 %v41 to i8
96  store i8 %v42, i8* %v37, align 1
97  %v43 = load i32, i32* %v4, align 4
98  %v44 = add i32 %v43, -2
99  %v45 = getelementptr inbounds i8, i8* %v18, i32 2
100  %v46 = icmp eq i32 %v44, 0
101  br i1 %v46, label %b7, label %b4
102
103b4:                                               ; preds = %b3
104  %v47 = getelementptr inbounds i8, i8* %v15, i32 2
105  %v48 = getelementptr inbounds i8, i8* %v10, i32 2
106  %v49 = mul i32 %v43, 2
107  br label %b5
108
109b5:                                               ; preds = %b5, %b4
110  %v50 = phi i8* [ %v45, %b4 ], [ %v76, %b5 ]
111  %v51 = phi i32 [ %v44, %b4 ], [ %v75, %b5 ]
112  %v52 = phi i32 [ %v26, %b4 ], [ %v53, %b5 ]
113  %v53 = phi i32 [ %v32, %b4 ], [ %v64, %b5 ]
114  %v54 = phi i8* [ %v18, %b4 ], [ %v50, %b5 ]
115  %v55 = phi i8* [ %v47, %b4 ], [ %v61, %b5 ]
116  %v56 = phi i8* [ %v48, %b4 ], [ %v57, %b5 ]
117  %v57 = getelementptr inbounds i8, i8* %v56, i32 1
118  %v58 = load i8, i8* %v56, align 1
119  %v59 = zext i8 %v58 to i32
120  %v60 = mul nsw i32 %v59, 3
121  %v61 = getelementptr inbounds i8, i8* %v55, i32 1
122  %v62 = load i8, i8* %v55, align 1
123  %v63 = zext i8 %v62 to i32
124  %v64 = add nsw i32 %v60, %v63
125  %v65 = mul nsw i32 %v53, 3
126  %v66 = add i32 %v52, 8
127  %v67 = add i32 %v66, %v65
128  %v68 = lshr i32 %v67, 4
129  %v69 = trunc i32 %v68 to i8
130  %v70 = getelementptr inbounds i8, i8* %v54, i32 3
131  store i8 %v69, i8* %v50, align 1
132  %v71 = add i32 %v65, 7
133  %v72 = add i32 %v71, %v64
134  %v73 = lshr i32 %v72, 4
135  %v74 = trunc i32 %v73 to i8
136  store i8 %v74, i8* %v70, align 1
137  %v75 = add i32 %v51, -1
138  %v76 = getelementptr inbounds i8, i8* %v50, i32 2
139  %v77 = icmp eq i32 %v75, 0
140  br i1 %v77, label %b6, label %b5
141
142b6:                                               ; preds = %b5
143  %v78 = add i32 %v49, -2
144  %v79 = getelementptr i8, i8* %v18, i32 %v78
145  %v80 = add i32 %v49, -4
146  %v81 = getelementptr i8, i8* %v18, i32 %v80
147  br label %b7
148
149b7:                                               ; preds = %b6, %b3
150  %v82 = phi i8* [ %v79, %b6 ], [ %v45, %b3 ]
151  %v83 = phi i32 [ %v53, %b6 ], [ %v26, %b3 ]
152  %v84 = phi i32 [ %v64, %b6 ], [ %v32, %b3 ]
153  %v85 = phi i8* [ %v81, %b6 ], [ %v18, %b3 ]
154  %v86 = mul nsw i32 %v84, 3
155  %v87 = add i32 %v83, 8
156  %v88 = add i32 %v87, %v86
157  %v89 = lshr i32 %v88, 4
158  %v90 = trunc i32 %v89 to i8
159  %v91 = getelementptr inbounds i8, i8* %v85, i32 3
160  store i8 %v90, i8* %v82, align 1
161  %v92 = mul nsw i32 %v84, 4
162  %v93 = add nsw i32 %v92, 7
163  %v94 = lshr i32 %v93, 4
164  %v95 = trunc i32 %v94 to i8
165  store i8 %v95, i8* %v91, align 1
166  %v96 = add nsw i32 %v8, 1
167  %v97 = icmp eq i32 %v96, 2
168  br i1 %v97, label %b8, label %b3
169
170b8:                                               ; preds = %b7
171  %v98 = add i32 %v5, 2
172  %v99 = add nsw i32 %v6, 1
173  %v100 = load i32, i32* %v1, align 4
174  %v101 = icmp slt i32 %v98, %v100
175  br i1 %v101, label %b2, label %b9
176
177b9:                                               ; preds = %b8
178  br label %b10
179
180b10:                                              ; preds = %b9, %b0
181  ret void
182}
183
184attributes #0 = { nounwind optsize "target-cpu"="hexagonv60" }
185