1; RUN: llc -march=hexagon -enable-pipeliner -pipeliner-max-stages=2 < %s -pipeliner-experimental-cg=true | FileCheck %s
2
3; Test that the generatePhi code doesn't rename a a Phi instruction that's defined
4; in the same block.  The bug causes a Phi to incorrectly depend on another Phi.
5
6; CHECK: loop0(.LBB0_[[LOOP:.]],
7; CHECK: .LBB0_[[LOOP]]:
8; CHECK: memh([[REG0:(r[0-9]+)]]++#2:circ
9; CHECK: = mem{{u?}}h([[REG0]]+#0)
10; CHECK: endloop0
11
12; Function Attrs: argmemonly nounwind
13declare i8* @llvm.hexagon.circ.sthhi(i8*, i32, i32, i32) #1
14
15; Function Attrs: nounwind optsize
16define signext i16 @f0(i16* %a0, i16* %a1, i16 signext %a2, i16 signext %a3) #0 {
17b0:
18  br label %b1
19
20b1:                                               ; preds = %b1, %b0
21  %v0 = phi i16* [ %v10, %b1 ], [ %a1, %b0 ]
22  %v1 = phi i32 [ %v13, %b1 ], [ 1, %b0 ]
23  %v2 = phi i16 [ %v12, %b1 ], [ 0, %b0 ]
24  %v3 = bitcast i16* %v0 to i8*
25  %v4 = add nsw i32 %v1, 10
26  %v5 = getelementptr inbounds i16, i16* %a0, i32 %v4
27  %v6 = load i16, i16* %v5, align 2, !tbaa !0
28  %v7 = sext i16 %v6 to i32
29  %v8 = add nsw i32 %v7, 40000
30  %v9 = tail call i8* @llvm.hexagon.circ.sthhi(i8* %v3, i32 %v8, i32 117441022, i32 2)
31  %v10 = bitcast i8* %v9 to i16*
32  %v11 = load i16, i16* %v10, align 2, !tbaa !0
33  %v12 = add i16 %v11, %v2
34  %v13 = add i32 %v1, 1
35  %v14 = icmp eq i32 %v13, 1000
36  br i1 %v14, label %b2, label %b1
37
38b2:                                               ; preds = %b1
39  br label %b3
40
41b3:                                               ; preds = %b2
42  ret i16 %v12
43}
44
45attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }
46attributes #1 = { argmemonly nounwind }
47
48!0 = !{!1, !1, i64 0}
49!1 = !{!"short", !2}
50!2 = !{!"omnipotent char", !3}
51!3 = !{!"Simple C/C++ TBAA"}
52