1; RUN: llc -march=hexagon -O0 < %s | FileCheck %s
2; RUN: llc -march=hexagon -O2 < %s | FileCheck %s
3
4; Checking for alignment of stack to 64.
5; CHECK: r{{[0-9]+}} = and(r{{[0-9]+}},#-64)
6
7target triple = "hexagon"
8
9%s.0 = type { i32, i32, i32, i32, i32 }
10
11@g0 = private unnamed_addr constant [7 x i8] c"%x %x\0A\00", align 8
12@g1 = global %s.0 { i32 11, i32 13, i32 15, i32 17, i32 19 }, align 4
13@g2 = global <16 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16>, align 64
14
15; Function Attrs: nounwind
16declare i32 @f0(i8* nocapture, ...) #0
17
18; Function Attrs: nounwind
19define void @f1(%s.0* byval(%s.0) %a0, <16 x i32> %a1) #0 {
20b0:
21  %v0 = alloca <16 x i32>, align 64
22  store <16 x i32> %a1, <16 x i32>* %v0, align 64, !tbaa !0
23  %v1 = ptrtoint %s.0* %a0 to i32
24  %v2 = ptrtoint <16 x i32>* %v0 to i32
25  %v3 = call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @g0, i32 0, i32 0), i32 %v1, i32 %v2) #0
26  ret void
27}
28
29; Function Attrs: nounwind
30define i32 @f2() #0 {
31b0:
32  %v0 = load <16 x i32>, <16 x i32>* @g2, align 64, !tbaa !0
33  tail call void @f1(%s.0* byval(%s.0) @g1, <16 x i32> %v0)
34  ret i32 0
35}
36
37attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
38
39!0 = !{!1, !1, i64 0}
40!1 = !{!"omnipotent char", !2}
41!2 = !{!"Simple C/C++ TBAA"}
42