1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
3; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r6 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32R6
4
5@float_align1 = common global float 0.000000e+00, align 1
6@float_align2 = common global float 0.000000e+00, align 2
7@float_align4 = common global float 0.000000e+00, align 4
8@float_align8 = common global float 0.000000e+00, align 8
9@i32_align1 = common global i32 0, align 1
10@i32_align2 = common global i32 0, align 2
11@i32_align4 = common global i32 0, align 4
12@i32_align8 = common global i32 0, align 8
13
14define float @load_float_align1() {
15; MIPS32-LABEL: load_float_align1:
16; MIPS32:       # %bb.0: # %entry
17; MIPS32-NEXT:    lui $1, %hi(float_align1)
18; MIPS32-NEXT:    addiu $2, $1, %lo(float_align1)
19; MIPS32-NEXT:    # implicit-def: $at
20; MIPS32-NEXT:    lwl $1, 3($2)
21; MIPS32-NEXT:    lwr $1, 0($2)
22; MIPS32-NEXT:    mtc1 $1, $f0
23; MIPS32-NEXT:    jr $ra
24; MIPS32-NEXT:    nop
25;
26; MIPS32R6-LABEL: load_float_align1:
27; MIPS32R6:       # %bb.0: # %entry
28; MIPS32R6-NEXT:    lui $1, %hi(float_align1)
29; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align1)
30; MIPS32R6-NEXT:    lwc1 $f0, 0($1)
31; MIPS32R6-NEXT:    jrc $ra
32entry:
33  %0 = load float, float* @float_align1, align 1
34  ret float %0
35}
36
37define float @load_float_align2() {
38; MIPS32-LABEL: load_float_align2:
39; MIPS32:       # %bb.0: # %entry
40; MIPS32-NEXT:    lui $1, %hi(float_align2)
41; MIPS32-NEXT:    addiu $2, $1, %lo(float_align2)
42; MIPS32-NEXT:    # implicit-def: $at
43; MIPS32-NEXT:    lwl $1, 3($2)
44; MIPS32-NEXT:    lwr $1, 0($2)
45; MIPS32-NEXT:    mtc1 $1, $f0
46; MIPS32-NEXT:    jr $ra
47; MIPS32-NEXT:    nop
48;
49; MIPS32R6-LABEL: load_float_align2:
50; MIPS32R6:       # %bb.0: # %entry
51; MIPS32R6-NEXT:    lui $1, %hi(float_align2)
52; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align2)
53; MIPS32R6-NEXT:    lwc1 $f0, 0($1)
54; MIPS32R6-NEXT:    jrc $ra
55entry:
56  %0 = load float, float* @float_align2, align 2
57  ret float %0
58}
59
60define float @load_float_align4() {
61; MIPS32-LABEL: load_float_align4:
62; MIPS32:       # %bb.0: # %entry
63; MIPS32-NEXT:    lui $1, %hi(float_align4)
64; MIPS32-NEXT:    addiu $1, $1, %lo(float_align4)
65; MIPS32-NEXT:    lwc1 $f0, 0($1)
66; MIPS32-NEXT:    jr $ra
67; MIPS32-NEXT:    nop
68;
69; MIPS32R6-LABEL: load_float_align4:
70; MIPS32R6:       # %bb.0: # %entry
71; MIPS32R6-NEXT:    lui $1, %hi(float_align4)
72; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align4)
73; MIPS32R6-NEXT:    lwc1 $f0, 0($1)
74; MIPS32R6-NEXT:    jrc $ra
75entry:
76  %0 = load float, float* @float_align4, align 4
77  ret float %0
78}
79
80define float @load_float_align8() {
81; MIPS32-LABEL: load_float_align8:
82; MIPS32:       # %bb.0: # %entry
83; MIPS32-NEXT:    lui $1, %hi(float_align8)
84; MIPS32-NEXT:    addiu $1, $1, %lo(float_align8)
85; MIPS32-NEXT:    lwc1 $f0, 0($1)
86; MIPS32-NEXT:    jr $ra
87; MIPS32-NEXT:    nop
88;
89; MIPS32R6-LABEL: load_float_align8:
90; MIPS32R6:       # %bb.0: # %entry
91; MIPS32R6-NEXT:    lui $1, %hi(float_align8)
92; MIPS32R6-NEXT:    addiu $1, $1, %lo(float_align8)
93; MIPS32R6-NEXT:    lwc1 $f0, 0($1)
94; MIPS32R6-NEXT:    jrc $ra
95entry:
96  %0 = load float, float* @float_align8, align 8
97  ret float %0
98}
99
100define i32 @load_i32_align1() {
101; MIPS32-LABEL: load_i32_align1:
102; MIPS32:       # %bb.0: # %entry
103; MIPS32-NEXT:    lui $1, %hi(i32_align1)
104; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align1)
105; MIPS32-NEXT:    # implicit-def: $v0
106; MIPS32-NEXT:    lwl $2, 3($1)
107; MIPS32-NEXT:    lwr $2, 0($1)
108; MIPS32-NEXT:    jr $ra
109; MIPS32-NEXT:    nop
110;
111; MIPS32R6-LABEL: load_i32_align1:
112; MIPS32R6:       # %bb.0: # %entry
113; MIPS32R6-NEXT:    lui $1, %hi(i32_align1)
114; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align1)
115; MIPS32R6-NEXT:    lw $2, 0($1)
116; MIPS32R6-NEXT:    jrc $ra
117entry:
118  %0 = load i32, i32* @i32_align1, align 1
119  ret i32 %0
120}
121
122define i32 @load_i32_align2() {
123; MIPS32-LABEL: load_i32_align2:
124; MIPS32:       # %bb.0: # %entry
125; MIPS32-NEXT:    lui $1, %hi(i32_align2)
126; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align2)
127; MIPS32-NEXT:    # implicit-def: $v0
128; MIPS32-NEXT:    lwl $2, 3($1)
129; MIPS32-NEXT:    lwr $2, 0($1)
130; MIPS32-NEXT:    jr $ra
131; MIPS32-NEXT:    nop
132;
133; MIPS32R6-LABEL: load_i32_align2:
134; MIPS32R6:       # %bb.0: # %entry
135; MIPS32R6-NEXT:    lui $1, %hi(i32_align2)
136; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align2)
137; MIPS32R6-NEXT:    lw $2, 0($1)
138; MIPS32R6-NEXT:    jrc $ra
139entry:
140  %0 = load i32, i32* @i32_align2, align 2
141  ret i32 %0
142}
143
144define i32 @load_i32_align4() {
145; MIPS32-LABEL: load_i32_align4:
146; MIPS32:       # %bb.0: # %entry
147; MIPS32-NEXT:    lui $1, %hi(i32_align4)
148; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align4)
149; MIPS32-NEXT:    lw $2, 0($1)
150; MIPS32-NEXT:    jr $ra
151; MIPS32-NEXT:    nop
152;
153; MIPS32R6-LABEL: load_i32_align4:
154; MIPS32R6:       # %bb.0: # %entry
155; MIPS32R6-NEXT:    lui $1, %hi(i32_align4)
156; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align4)
157; MIPS32R6-NEXT:    lw $2, 0($1)
158; MIPS32R6-NEXT:    jrc $ra
159entry:
160  %0 = load i32, i32* @i32_align4, align 4
161  ret i32 %0
162}
163
164define i32 @load_i32_align8() {
165; MIPS32-LABEL: load_i32_align8:
166; MIPS32:       # %bb.0: # %entry
167; MIPS32-NEXT:    lui $1, %hi(i32_align8)
168; MIPS32-NEXT:    addiu $1, $1, %lo(i32_align8)
169; MIPS32-NEXT:    lw $2, 0($1)
170; MIPS32-NEXT:    jr $ra
171; MIPS32-NEXT:    nop
172;
173; MIPS32R6-LABEL: load_i32_align8:
174; MIPS32R6:       # %bb.0: # %entry
175; MIPS32R6-NEXT:    lui $1, %hi(i32_align8)
176; MIPS32R6-NEXT:    addiu $1, $1, %lo(i32_align8)
177; MIPS32R6-NEXT:    lw $2, 0($1)
178; MIPS32R6-NEXT:    jrc $ra
179entry:
180  %0 = load i32, i32* @i32_align8, align 8
181  ret i32 %0
182}
183