1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5
6  define void @and_i32() {entry: ret void}
7  define void @or_i32() {entry: ret void}
8  define void @xor_i32() {entry: ret void}
9  define void @shl(i32) {entry: ret void}
10  define void @ashr(i32) {entry: ret void}
11  define void @lshr(i32) {entry: ret void}
12  define void @shlv(i32, i32) {entry: ret void}
13  define void @ashrv(i32, i32) {entry: ret void}
14  define void @lshrv(i32, i32) {entry: ret void}
15
16...
17---
18name:            and_i32
19alignment:       4
20legalized:       true
21tracksRegLiveness: true
22body:             |
23  bb.1.entry:
24    liveins: $a0, $a1
25
26    ; MIPS32-LABEL: name: and_i32
27    ; MIPS32: liveins: $a0, $a1
28    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
29    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
30    ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY1]], [[COPY]]
31    ; MIPS32: $v0 = COPY [[AND]](s32)
32    ; MIPS32: RetRA implicit $v0
33    %0:_(s32) = COPY $a0
34    %1:_(s32) = COPY $a1
35    %2:_(s32) = G_AND %1, %0
36    $v0 = COPY %2(s32)
37    RetRA implicit $v0
38
39...
40---
41name:            or_i32
42alignment:       4
43legalized:       true
44tracksRegLiveness: true
45body:             |
46  bb.1.entry:
47    liveins: $a0, $a1
48
49    ; MIPS32-LABEL: name: or_i32
50    ; MIPS32: liveins: $a0, $a1
51    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
52    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
53    ; MIPS32: [[OR:%[0-9]+]]:gprb(s32) = G_OR [[COPY1]], [[COPY]]
54    ; MIPS32: $v0 = COPY [[OR]](s32)
55    ; MIPS32: RetRA implicit $v0
56    %0:_(s32) = COPY $a0
57    %1:_(s32) = COPY $a1
58    %2:_(s32) = G_OR %1, %0
59    $v0 = COPY %2(s32)
60    RetRA implicit $v0
61
62...
63---
64name:            xor_i32
65alignment:       4
66legalized:       true
67tracksRegLiveness: true
68body:             |
69  bb.1.entry:
70    liveins: $a0, $a1
71
72    ; MIPS32-LABEL: name: xor_i32
73    ; MIPS32: liveins: $a0, $a1
74    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
75    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
76    ; MIPS32: [[XOR:%[0-9]+]]:gprb(s32) = G_XOR [[COPY1]], [[COPY]]
77    ; MIPS32: $v0 = COPY [[XOR]](s32)
78    ; MIPS32: RetRA implicit $v0
79    %0:_(s32) = COPY $a0
80    %1:_(s32) = COPY $a1
81    %2:_(s32) = G_XOR %1, %0
82    $v0 = COPY %2(s32)
83    RetRA implicit $v0
84
85...
86---
87name:            shl
88alignment:       4
89legalized:       true
90tracksRegLiveness: true
91body:             |
92  bb.1.entry:
93    liveins: $a0
94
95    ; MIPS32-LABEL: name: shl
96    ; MIPS32: liveins: $a0
97    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
98    ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
99    ; MIPS32: [[SHL:%[0-9]+]]:gprb(s32) = G_SHL [[COPY]], [[C]]
100    ; MIPS32: $v0 = COPY [[SHL]](s32)
101    ; MIPS32: RetRA implicit $v0
102    %0:_(s32) = COPY $a0
103    %1:_(s32) = G_CONSTANT i32 1
104    %2:_(s32) = G_SHL %0, %1
105    $v0 = COPY %2(s32)
106    RetRA implicit $v0
107
108...
109---
110name:            ashr
111alignment:       4
112legalized:       true
113tracksRegLiveness: true
114body:             |
115  bb.1.entry:
116    liveins: $a0
117
118    ; MIPS32-LABEL: name: ashr
119    ; MIPS32: liveins: $a0
120    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
121    ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
122    ; MIPS32: [[ASHR:%[0-9]+]]:gprb(s32) = G_ASHR [[COPY]], [[C]]
123    ; MIPS32: $v0 = COPY [[ASHR]](s32)
124    ; MIPS32: RetRA implicit $v0
125    %0:_(s32) = COPY $a0
126    %1:_(s32) = G_CONSTANT i32 1
127    %2:_(s32) = G_ASHR %0, %1
128    $v0 = COPY %2(s32)
129    RetRA implicit $v0
130
131...
132---
133name:            lshr
134alignment:       4
135legalized:       true
136tracksRegLiveness: true
137body:             |
138  bb.1.entry:
139    liveins: $a0
140
141    ; MIPS32-LABEL: name: lshr
142    ; MIPS32: liveins: $a0
143    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
144    ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
145    ; MIPS32: [[LSHR:%[0-9]+]]:gprb(s32) = G_LSHR [[COPY]], [[C]]
146    ; MIPS32: $v0 = COPY [[LSHR]](s32)
147    ; MIPS32: RetRA implicit $v0
148    %0:_(s32) = COPY $a0
149    %1:_(s32) = G_CONSTANT i32 1
150    %2:_(s32) = G_LSHR %0, %1
151    $v0 = COPY %2(s32)
152    RetRA implicit $v0
153
154...
155---
156name:            shlv
157alignment:       4
158legalized:       true
159tracksRegLiveness: true
160body:             |
161  bb.1.entry:
162    liveins: $a0, $a1
163
164    ; MIPS32-LABEL: name: shlv
165    ; MIPS32: liveins: $a0, $a1
166    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
167    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
168    ; MIPS32: [[SHL:%[0-9]+]]:gprb(s32) = G_SHL [[COPY]], [[COPY1]]
169    ; MIPS32: $v0 = COPY [[SHL]](s32)
170    ; MIPS32: RetRA implicit $v0
171    %0:_(s32) = COPY $a0
172    %1:_(s32) = COPY $a1
173    %2:_(s32) = G_SHL %0, %1
174    $v0 = COPY %2(s32)
175    RetRA implicit $v0
176
177...
178---
179name:            ashrv
180alignment:       4
181legalized:       true
182tracksRegLiveness: true
183body:             |
184  bb.1.entry:
185    liveins: $a0, $a1
186
187    ; MIPS32-LABEL: name: ashrv
188    ; MIPS32: liveins: $a0, $a1
189    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
190    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
191    ; MIPS32: [[ASHR:%[0-9]+]]:gprb(s32) = G_ASHR [[COPY]], [[COPY1]]
192    ; MIPS32: $v0 = COPY [[ASHR]](s32)
193    ; MIPS32: RetRA implicit $v0
194    %0:_(s32) = COPY $a0
195    %1:_(s32) = COPY $a1
196    %2:_(s32) = G_ASHR %0, %1
197    $v0 = COPY %2(s32)
198    RetRA implicit $v0
199
200...
201---
202name:            lshrv
203alignment:       4
204legalized:       true
205tracksRegLiveness: true
206body:             |
207  bb.1.entry:
208    liveins: $a0, $a1
209
210    ; MIPS32-LABEL: name: lshrv
211    ; MIPS32: liveins: $a0, $a1
212    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
213    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
214    ; MIPS32: [[LSHR:%[0-9]+]]:gprb(s32) = G_LSHR [[COPY]], [[COPY1]]
215    ; MIPS32: $v0 = COPY [[LSHR]](s32)
216    ; MIPS32: RetRA implicit $v0
217    %0:_(s32) = COPY $a0
218    %1:_(s32) = COPY $a1
219    %2:_(s32) = G_LSHR %0, %1
220    $v0 = COPY %2(s32)
221    RetRA implicit $v0
222
223...
224