1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @load_i32(i32* %ptr) {entry: ret void}
6  define void @load_i64(i64* %ptr) {entry: ret void}
7  define void @load_ambiguous_i64_in_fpr(i64* %i64_ptr_a, i64* %i64_ptr_b) {entry: ret void}
8  define void @load_float(float* %ptr) {entry: ret void}
9  define void @load_ambiguous_float_in_gpr(float* %float_ptr_a, float* %float_ptr_b) {entry: ret void}
10  define void @load_double(double* %ptr) {entry: ret void}
11
12...
13---
14name:            load_i32
15alignment:       4
16legalized:       true
17tracksRegLiveness: true
18body:             |
19  bb.1.entry:
20    liveins: $a0
21
22    ; MIPS32-LABEL: name: load_i32
23    ; MIPS32: liveins: $a0
24    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
25    ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load 4 from %ir.ptr)
26    ; MIPS32: $v0 = COPY [[LOAD]](s32)
27    ; MIPS32: RetRA implicit $v0
28    %0:_(p0) = COPY $a0
29    %1:_(s32) = G_LOAD %0(p0) :: (load 4 from %ir.ptr)
30    $v0 = COPY %1(s32)
31    RetRA implicit $v0
32
33...
34---
35name:            load_i64
36alignment:       4
37legalized:       true
38tracksRegLiveness: true
39body:             |
40  bb.1.entry:
41    liveins: $a0
42
43    ; MIPS32-LABEL: name: load_i64
44    ; MIPS32: liveins: $a0
45    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
46    ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load 4 from %ir.ptr, align 8)
47    ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4
48    ; MIPS32: [[GEP:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
49    ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[GEP]](p0) :: (load 4 from %ir.ptr + 4, align 8)
50    ; MIPS32: $v0 = COPY [[LOAD]](s32)
51    ; MIPS32: $v1 = COPY [[LOAD1]](s32)
52    ; MIPS32: RetRA implicit $v0, implicit $v1
53    %0:_(p0) = COPY $a0
54    %1:_(s64) = G_LOAD %0(p0) :: (load 8 from %ir.ptr)
55    %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
56    $v0 = COPY %2(s32)
57    $v1 = COPY %3(s32)
58    RetRA implicit $v0, implicit $v1
59
60...
61---
62name:            load_ambiguous_i64_in_fpr
63alignment:       4
64legalized:       true
65tracksRegLiveness: true
66body:             |
67  bb.1.entry:
68    liveins: $a0, $a1
69
70    ; MIPS32-LABEL: name: load_ambiguous_i64_in_fpr
71    ; MIPS32: liveins: $a0, $a1
72    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
73    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1
74    ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY]](p0) :: (load 8 from %ir.i64_ptr_a)
75    ; MIPS32: G_STORE [[LOAD]](s64), [[COPY1]](p0) :: (store 8 into %ir.i64_ptr_b)
76    ; MIPS32: RetRA
77    %0:_(p0) = COPY $a0
78    %1:_(p0) = COPY $a1
79    %2:_(s64) = G_LOAD %0(p0) :: (load 8 from %ir.i64_ptr_a)
80    G_STORE %2(s64), %1(p0) :: (store 8 into %ir.i64_ptr_b)
81    RetRA
82
83...
84---
85name:            load_float
86alignment:       4
87legalized:       true
88tracksRegLiveness: true
89body:             |
90  bb.1.entry:
91    liveins: $a0
92
93    ; MIPS32-LABEL: name: load_float
94    ; MIPS32: liveins: $a0
95    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
96    ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[COPY]](p0) :: (load 4 from %ir.ptr)
97    ; MIPS32: $f0 = COPY [[LOAD]](s32)
98    ; MIPS32: RetRA implicit $f0
99    %0:_(p0) = COPY $a0
100    %1:_(s32) = G_LOAD %0(p0) :: (load 4 from %ir.ptr)
101    $f0 = COPY %1(s32)
102    RetRA implicit $f0
103
104...
105---
106name:            load_ambiguous_float_in_gpr
107alignment:       4
108legalized:       true
109tracksRegLiveness: true
110body:             |
111  bb.1.entry:
112    liveins: $a0, $a1
113
114    ; MIPS32-LABEL: name: load_ambiguous_float_in_gpr
115    ; MIPS32: liveins: $a0, $a1
116    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
117    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1
118    ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load 4 from %ir.float_ptr_a)
119    ; MIPS32: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store 4 into %ir.float_ptr_b)
120    ; MIPS32: RetRA
121    %0:_(p0) = COPY $a0
122    %1:_(p0) = COPY $a1
123    %2:_(s32) = G_LOAD %0(p0) :: (load 4 from %ir.float_ptr_a)
124    G_STORE %2(s32), %1(p0) :: (store 4 into %ir.float_ptr_b)
125    RetRA
126
127...
128---
129name:            load_double
130alignment:       4
131legalized:       true
132tracksRegLiveness: true
133body:             |
134  bb.1.entry:
135    liveins: $a0
136
137    ; MIPS32-LABEL: name: load_double
138    ; MIPS32: liveins: $a0
139    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
140    ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY]](p0) :: (load 8 from %ir.ptr)
141    ; MIPS32: $d0 = COPY [[LOAD]](s64)
142    ; MIPS32: RetRA implicit $d0
143    %0:_(p0) = COPY $a0
144    %1:_(s64) = G_LOAD %0(p0) :: (load 8 from %ir.ptr)
145    $d0 = COPY %1(s64)
146    RetRA implicit $d0
147
148...
149