1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R6 4--- | 5 6 @float_align1 = common global float 0.000000e+00, align 1 7 @float_align4 = common global float 0.000000e+00, align 4 8 @i32_align8 = common global i32 0, align 8 9 10 define float @load_float_align1() { 11 entry: 12 %0 = load float, float* @float_align1, align 1 13 ret float %0 14 } 15 16 define float @load_float_align4() { 17 entry: 18 %0 = load float, float* @float_align4, align 4 19 ret float %0 20 } 21 22 define i32 @load_i32_align8() { 23 entry: 24 %0 = load i32, i32* @i32_align8, align 8 25 ret i32 %0 26 } 27 28... 29--- 30name: load_float_align1 31alignment: 4 32legalized: true 33tracksRegLiveness: true 34body: | 35 bb.1.entry: 36 ; MIPS32-LABEL: name: load_float_align1 37 ; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align1 38 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align1, align 1) 39 ; MIPS32: $f0 = COPY [[LOAD]](s32) 40 ; MIPS32: RetRA implicit $f0 41 ; MIPS32R6-LABEL: name: load_float_align1 42 ; MIPS32R6: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align1 43 ; MIPS32R6: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align1, align 1) 44 ; MIPS32R6: $f0 = COPY [[LOAD]](s32) 45 ; MIPS32R6: RetRA implicit $f0 46 %1:_(p0) = G_GLOBAL_VALUE @float_align1 47 %0:_(s32) = G_LOAD %1(p0) :: (dereferenceable load 4 from @float_align1, align 1) 48 $f0 = COPY %0(s32) 49 RetRA implicit $f0 50 51... 52--- 53name: load_float_align4 54alignment: 4 55legalized: true 56tracksRegLiveness: true 57body: | 58 bb.1.entry: 59 ; MIPS32-LABEL: name: load_float_align4 60 ; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align4 61 ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align4) 62 ; MIPS32: $f0 = COPY [[LOAD]](s32) 63 ; MIPS32: RetRA implicit $f0 64 ; MIPS32R6-LABEL: name: load_float_align4 65 ; MIPS32R6: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align4 66 ; MIPS32R6: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align4) 67 ; MIPS32R6: $f0 = COPY [[LOAD]](s32) 68 ; MIPS32R6: RetRA implicit $f0 69 %1:_(p0) = G_GLOBAL_VALUE @float_align4 70 %0:_(s32) = G_LOAD %1(p0) :: (dereferenceable load 4 from @float_align4) 71 $f0 = COPY %0(s32) 72 RetRA implicit $f0 73 74... 75--- 76name: load_i32_align8 77alignment: 4 78legalized: true 79tracksRegLiveness: true 80body: | 81 bb.1.entry: 82 ; MIPS32-LABEL: name: load_i32_align8 83 ; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @i32_align8 84 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @i32_align8, align 8) 85 ; MIPS32: $v0 = COPY [[LOAD]](s32) 86 ; MIPS32: RetRA implicit $v0 87 ; MIPS32R6-LABEL: name: load_i32_align8 88 ; MIPS32R6: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @i32_align8 89 ; MIPS32R6: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @i32_align8, align 8) 90 ; MIPS32R6: $v0 = COPY [[LOAD]](s32) 91 ; MIPS32R6: RetRA implicit $v0 92 %1:_(p0) = G_GLOBAL_VALUE @i32_align8 93 %0:_(s32) = G_LOAD %1(p0) :: (dereferenceable load 4 from @i32_align8, align 8) 94 $v0 = COPY %0(s32) 95 RetRA implicit $v0 96 97... 98