1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 3--- | 4 5 @.str = private unnamed_addr constant [11 x i8] c"string %s\0A\00", align 1 6 declare void @llvm.va_start(i8*) #0 7 declare void @llvm.va_copy(i8*, i8*) #0 8 declare i32 @printf(i8*, ...) 9 10 define void @testVaCopyArg(i8* %fmt, ...) { 11 entry: 12 %fmt.addr = alloca i8*, align 4 13 %ap = alloca i8*, align 4 14 %aq = alloca i8*, align 4 15 %s = alloca i8*, align 4 16 store i8* %fmt, i8** %fmt.addr, align 4 17 %ap1 = bitcast i8** %ap to i8* 18 call void @llvm.va_start(i8* %ap1) 19 %0 = bitcast i8** %aq to i8* 20 %1 = bitcast i8** %ap to i8* 21 call void @llvm.va_copy(i8* %0, i8* %1) 22 %argp.cur = load i8*, i8** %aq, align 4 23 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4 24 store i8* %argp.next, i8** %aq, align 4 25 %2 = bitcast i8* %argp.cur to i8** 26 %3 = load i8*, i8** %2, align 4 27 store i8* %3, i8** %s, align 4 28 %4 = load i8*, i8** %s, align 4 29 %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %4) 30 ret void 31 } 32 33... 34--- 35name: testVaCopyArg 36alignment: 4 37legalized: true 38tracksRegLiveness: true 39liveins: 40 - { reg: '$a0' } 41fixedStack: 42 - { id: 0, offset: 12, size: 4, alignment: 4, isImmutable: true } 43 - { id: 1, offset: 8, size: 4, alignment: 8, isImmutable: true } 44 - { id: 2, offset: 4, size: 4, alignment: 4, isImmutable: true } 45 - { id: 3, offset: 4, size: 4, alignment: 4, isImmutable: true } 46stack: 47 - { id: 0, name: fmt.addr, size: 4, alignment: 4 } 48 - { id: 1, name: ap, size: 4, alignment: 4 } 49 - { id: 2, name: aq, size: 4, alignment: 4 } 50 - { id: 3, name: s, size: 4, alignment: 4 } 51machineFunctionInfo: {} 52body: | 53 bb.1.entry: 54 liveins: $a0, $a1, $a2, $a3 55 56 ; MIPS32-LABEL: name: testVaCopyArg 57 ; MIPS32: liveins: $a0, $a1, $a2, $a3 58 ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 59 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 60 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 61 ; MIPS32: G_STORE [[COPY1]](s32), [[FRAME_INDEX]](p0) :: (store 4 into %fixed-stack.1) 62 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 63 ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.2 64 ; MIPS32: G_STORE [[COPY2]](s32), [[FRAME_INDEX1]](p0) :: (store 4 into %fixed-stack.2) 65 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY $a3 66 ; MIPS32: [[FRAME_INDEX2:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.3 67 ; MIPS32: G_STORE [[COPY3]](s32), [[FRAME_INDEX2]](p0) :: (store 4 into %fixed-stack.3) 68 ; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @.str 69 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(p0) = COPY [[GV]](p0) 70 ; MIPS32: [[FRAME_INDEX3:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %stack.0.fmt.addr 71 ; MIPS32: [[FRAME_INDEX4:%[0-9]+]]:gpr32(p0) = G_FRAME_INDEX %stack.1.ap 72 ; MIPS32: [[FRAME_INDEX5:%[0-9]+]]:gpr32(p0) = G_FRAME_INDEX %stack.2.aq 73 ; MIPS32: [[FRAME_INDEX6:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %stack.3.s 74 ; MIPS32: G_STORE [[COPY]](p0), [[FRAME_INDEX3]](p0) :: (store 4 into %ir.fmt.addr) 75 ; MIPS32: G_VASTART [[FRAME_INDEX4]](p0) :: (store 4 into %ir.ap1, align 1) 76 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[FRAME_INDEX4]](p0), 0 :: (load 4) 77 ; MIPS32: SW [[LW]], [[FRAME_INDEX5]](p0), 0 :: (store 4) 78 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX5]](p0) :: (load 4 from %ir.aq) 79 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4 80 ; MIPS32: [[GEP:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[LOAD]], [[C]](s32) 81 ; MIPS32: G_STORE [[GEP]](p0), [[FRAME_INDEX5]](p0) :: (store 4 into %ir.aq) 82 ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(p0) = G_LOAD [[LOAD]](p0) :: (load 4 from %ir.2) 83 ; MIPS32: G_STORE [[LOAD1]](p0), [[FRAME_INDEX6]](p0) :: (store 4 into %ir.s) 84 ; MIPS32: [[LOAD2:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX6]](p0) :: (load 4 from %ir.s) 85 ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp 86 ; MIPS32: $a0 = COPY [[COPY4]](p0) 87 ; MIPS32: $a1 = COPY [[LOAD2]](p0) 88 ; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0 89 ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp 90 ; MIPS32: RetRA 91 %0:_(p0) = COPY $a0 92 %1:_(s32) = COPY $a1 93 %2:_(p0) = G_FRAME_INDEX %fixed-stack.2 94 G_STORE %1(s32), %2(p0) :: (store 4 into %fixed-stack.2) 95 %3:_(s32) = COPY $a2 96 %4:_(p0) = G_FRAME_INDEX %fixed-stack.1 97 G_STORE %3(s32), %4(p0) :: (store 4 into %fixed-stack.1) 98 %5:_(s32) = COPY $a3 99 %6:_(p0) = G_FRAME_INDEX %fixed-stack.0 100 G_STORE %5(s32), %6(p0) :: (store 4 into %fixed-stack.0) 101 %18:_(p0) = G_GLOBAL_VALUE @.str 102 %17:_(p0) = COPY %18(p0) 103 %7:_(p0) = G_FRAME_INDEX %stack.0.fmt.addr 104 %8:gpr32(p0) = G_FRAME_INDEX %stack.1.ap 105 %9:gpr32(p0) = G_FRAME_INDEX %stack.2.aq 106 %10:_(p0) = G_FRAME_INDEX %stack.3.s 107 G_STORE %0(p0), %7(p0) :: (store 4 into %ir.fmt.addr) 108 G_VASTART %8(p0) :: (store 4 into %ir.ap1, align 1) 109 %19:gpr32 = LW %8(p0), 0 :: (load 4) 110 SW %19, %9(p0), 0 :: (store 4) 111 %11:_(p0) = G_LOAD %9(p0) :: (load 4 from %ir.aq) 112 %12:_(s32) = G_CONSTANT i32 4 113 %13:_(p0) = G_PTR_ADD %11, %12(s32) 114 G_STORE %13(p0), %9(p0) :: (store 4 into %ir.aq) 115 %14:_(p0) = G_LOAD %11(p0) :: (load 4 from %ir.2) 116 G_STORE %14(p0), %10(p0) :: (store 4 into %ir.s) 117 %15:_(p0) = G_LOAD %10(p0) :: (load 4 from %ir.s) 118 ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp 119 $a0 = COPY %17(p0) 120 $a1 = COPY %15(p0) 121 JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0 122 ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp 123 RetRA 124 125... 126