1; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=static     < %s | FileCheck %s -check-prefix=ci
2
3@i = global i32 0, align 4
4@j = common global i32 0, align 4
5@k = common global i32 0, align 4
6
7; Function Attrs: nounwind optsize
8define i32 @x0() #0 {
9entry:
10  %0 = load i32, i32* @i, align 4, !tbaa !1
11  %cmp = icmp eq i32 %0, 0
12  br i1 %cmp, label %if.then, label %if.else
13
14if.then:                                          ; preds = %entry
15  tail call void asm sideeffect ".space 1000", ""() #1, !srcloc !5
16  br label %if.end
17
18if.else:                                          ; preds = %entry
19  tail call void asm sideeffect ".space 1004", ""() #1, !srcloc !6
20  br label %if.end
21
22if.end:                                           ; preds = %if.else, %if.then
23  %storemerge = phi i32 [ 1, %if.else ], [ 0, %if.then ]
24  store i32 %storemerge, i32* @i, align 4, !tbaa !1
25  ret i32 0
26}
27
28; ci:	.ent	x0
29; ci: 	beqz	$3, $BB0_2
30; ci: $BB0_2:
31; ci:	.end	x0
32
33; Function Attrs: nounwind optsize
34define i32 @x1() #0 {
35entry:
36  %0 = load i32, i32* @i, align 4, !tbaa !1
37  %cmp = icmp eq i32 %0, 0
38  br i1 %cmp, label %if.then, label %if.else
39
40if.then:                                          ; preds = %entry
41  tail call void asm sideeffect ".space 1000000", ""() #1, !srcloc !7
42  br label %if.end
43
44if.else:                                          ; preds = %entry
45  tail call void asm sideeffect ".space 1000004", ""() #1, !srcloc !8
46  br label %if.end
47
48if.end:                                           ; preds = %if.else, %if.then
49  %storemerge = phi i32 [ 1, %if.else ], [ 0, %if.then ]
50  store i32 %storemerge, i32* @i, align 4, !tbaa !1
51  ret i32 0
52}
53
54; ci:	.ent	x1
55; ci:	bnez	$3, $BB1_1  # 16 bit inst
56; ci:	jal	$BB1_2	# branch
57; ci:	nop
58; ci: $BB1_1:
59; ci:	.end	x1
60
61; Function Attrs: nounwind optsize
62define i32 @y0() #0 {
63entry:
64  %0 = load i32, i32* @i, align 4, !tbaa !1
65  %cmp = icmp eq i32 %0, 0
66  br i1 %cmp, label %if.then, label %if.else
67
68if.then:                                          ; preds = %entry
69  store i32 10, i32* @j, align 4, !tbaa !1
70  tail call void asm sideeffect ".space 1000", ""() #1, !srcloc !9
71  br label %if.end
72
73if.else:                                          ; preds = %entry
74  store i32 55, i32* @j, align 4, !tbaa !1
75  tail call void asm sideeffect ".space 1004", ""() #1, !srcloc !10
76  br label %if.end
77
78if.end:                                           ; preds = %if.else, %if.then
79  ret i32 0
80}
81
82; ci:	.ent	y0
83; ci:	beqz	$2, $BB2_2
84; ci:	.end	y0
85
86; Function Attrs: nounwind optsize
87define i32 @y1() #0 {
88entry:
89  %0 = load i32, i32* @i, align 4, !tbaa !1
90  %cmp = icmp eq i32 %0, 0
91  br i1 %cmp, label %if.then, label %if.else
92
93if.then:                                          ; preds = %entry
94  store i32 10, i32* @j, align 4, !tbaa !1
95  tail call void asm sideeffect ".space 1000000", ""() #1, !srcloc !11
96  br label %if.end
97
98if.else:                                          ; preds = %entry
99  store i32 55, i32* @j, align 4, !tbaa !1
100  tail call void asm sideeffect ".space 1000004", ""() #1, !srcloc !12
101  br label %if.end
102
103if.end:                                           ; preds = %if.else, %if.then
104  ret i32 0
105}
106
107; ci:	.ent	y1
108; ci:	bnez	$2, $BB3_1  # 16 bit inst
109; ci:	jal	$BB3_2	# branch
110; ci:	nop
111; ci: $BB3_1:
112; ci:	.end	y1
113
114; Function Attrs: nounwind optsize
115define void @z0() #0 {
116entry:
117  %0 = load i32, i32* @i, align 4, !tbaa !1
118  %1 = load i32, i32* @j, align 4, !tbaa !1
119  %cmp = icmp eq i32 %0, %1
120  br i1 %cmp, label %if.then, label %if.else
121
122if.then:                                          ; preds = %entry
123  store i32 1, i32* @k, align 4, !tbaa !1
124  tail call void asm sideeffect ".space 10000", ""() #1, !srcloc !13
125  br label %if.end
126
127if.else:                                          ; preds = %entry
128  tail call void asm sideeffect ".space 10004", ""() #1, !srcloc !14
129  store i32 2, i32* @k, align 4, !tbaa !1
130  br label %if.end
131
132if.end:                                           ; preds = %if.else, %if.then
133  ret void
134}
135
136; ci:	.ent	z0
137; ci:	btnez	$BB4_2
138; ci:	.end	z0
139
140; Function Attrs: nounwind optsize
141define void @z1() #0 {
142entry:
143  %0 = load i32, i32* @i, align 4, !tbaa !1
144  %1 = load i32, i32* @j, align 4, !tbaa !1
145  %cmp = icmp eq i32 %0, %1
146  br i1 %cmp, label %if.then, label %if.else
147
148if.then:                                          ; preds = %entry
149  store i32 1, i32* @k, align 4, !tbaa !1
150  tail call void asm sideeffect ".space 10000000", ""() #1, !srcloc !15
151  br label %if.end
152
153if.else:                                          ; preds = %entry
154  tail call void asm sideeffect ".space 10000004", ""() #1, !srcloc !16
155  store i32 2, i32* @k, align 4, !tbaa !1
156  br label %if.end
157
158if.end:                                           ; preds = %if.else, %if.then
159  ret void
160}
161
162; ci:	.ent	z1
163; ci:	bteqz	$BB5_1  # 16 bit inst
164; ci:	jal	$BB5_2	# branch
165; ci:	nop
166; ci: $BB5_1:
167; ci:	.end	z1
168
169; Function Attrs: nounwind optsize
170define void @z3() #0 {
171entry:
172  %0 = load i32, i32* @i, align 4, !tbaa !1
173  %1 = load i32, i32* @j, align 4, !tbaa !1
174  %cmp1 = icmp sgt i32 %0, %1
175  br i1 %cmp1, label %if.then, label %if.end
176
177if.then:                                          ; preds = %entry, %if.then
178  tail call void asm sideeffect ".space 10000", ""() #1, !srcloc !17
179  %2 = load i32, i32* @i, align 4, !tbaa !1
180  %3 = load i32, i32* @j, align 4, !tbaa !1
181  %cmp = icmp sgt i32 %2, %3
182  br i1 %cmp, label %if.then, label %if.end
183
184if.end:                                           ; preds = %if.then, %entry
185  ret void
186}
187
188; ci:	.ent	z3
189; ci:	bteqz	$BB6_2
190; ci:	.end	z3
191
192; Function Attrs: nounwind optsize
193define void @z4() #0 {
194entry:
195  %0 = load i32, i32* @i, align 4, !tbaa !1
196  %1 = load i32, i32* @j, align 4, !tbaa !1
197  %cmp1 = icmp sgt i32 %0, %1
198  br i1 %cmp1, label %if.then, label %if.end
199
200if.then:                                          ; preds = %entry, %if.then
201  tail call void asm sideeffect ".space 10000000", ""() #1, !srcloc !18
202  %2 = load i32, i32* @i, align 4, !tbaa !1
203  %3 = load i32, i32* @j, align 4, !tbaa !1
204  %cmp = icmp sgt i32 %2, %3
205  br i1 %cmp, label %if.then, label %if.end
206
207if.end:                                           ; preds = %if.then, %entry
208  ret void
209}
210
211; ci:	.ent	z4
212; ci:	btnez	$BB7_1  # 16 bit inst
213; ci:	jal	$BB7_2	# branch
214; ci:	nop
215; ci:	.p2align	2
216; ci: $BB7_1:
217; ci:	.end	z4
218
219attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
220attributes #1 = { nounwind }
221
222
223!1 = !{!2, !2, i64 0}
224!2 = !{!"int", !3, i64 0}
225!3 = !{!"omnipotent char", !4, i64 0}
226!4 = !{!"Simple C/C++ TBAA"}
227!5 = !{i32 57}
228!6 = !{i32 107}
229!7 = !{i32 188}
230!8 = !{i32 241}
231!9 = !{i32 338}
232!10 = !{i32 391}
233!11 = !{i32 477}
234!12 = !{i32 533}
235!13 = !{i32 621}
236!14 = !{i32 663}
237!15 = !{i32 747}
238!16 = !{i32 792}
239!17 = !{i32 867}
240!18 = !{i32 953}
241