1; RUN: opt < %s -O3 -S | FileCheck %s
2
3target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
4target triple = "nvptx64-nvidia-cuda"
5
6define void @no_vectorization(i32 %n, i32 %a, i32 %b) {
7; CHECK-LABEL: no_vectorization(
8; CHECK-NOT: <4 x i32>
9; CHECK-NOT: <4 x i1>
10entry:
11  %cmp.5 = icmp sgt i32 %n, 0
12  br i1 %cmp.5, label %for.body.preheader, label %for.cond.cleanup
13
14for.body.preheader:                               ; preds = %entry
15  br label %for.body
16
17for.cond.cleanup.loopexit:                        ; preds = %for.body
18  br label %for.cond.cleanup
19
20for.cond.cleanup:                                 ; preds = %for.cond.cleanup.loopexit, %entry
21  ret void
22
23for.body:                                         ; preds = %for.body.preheader, %for.body
24  %i.06 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
25  %add = add nsw i32 %i.06, %a
26  %mul = mul nsw i32 %add, %b
27  %cmp1 = icmp sgt i32 %mul, -1
28  tail call void @llvm.assume(i1 %cmp1)
29  %inc = add nuw nsw i32 %i.06, 1
30  %exitcond = icmp eq i32 %inc, %n
31  br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
32}
33
34declare void @llvm.assume(i1) #0
35
36attributes #0 = { nounwind }
37
38!nvvm.annotations = !{!0}
39!0 = !{void (i32, i32, i32)* @no_vectorization, !"kernel", i32 1}
40