1; RUN: llc -march=nvptx64 -stop-before=nvptx-proxyreg-erasure < %s 2>&1 \
2; RUN:   | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE
3
4; RUN: llc -march=nvptx64 -stop-after=nvptx-proxyreg-erasure < %s 2>&1 \
5; RUN:   | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER
6
7; Check ProxyRegErasure pass MIR manipulation.
8
9declare <4 x i32> @callee_vec_i32()
10define  <4 x i32> @check_vec_i32() {
11  ; MIR: body:
12  ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}}
13  ; MIR-DAG: %0:int32regs, %1:int32regs, %2:int32regs, %3:int32regs = LoadParamMemV4I32 0
14  ; MIR-DAG: Callseq_End {{[0-9]+}}
15
16  ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0
17  ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1
18  ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2
19  ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3
20  ; MIR-BEFORE-DAG: StoreRetvalV4I32 killed %4, killed %5, killed %6, killed %7, 0
21  ; MIR-AFTER-DAG:  StoreRetvalV4I32 killed %0, killed %1, killed %2, killed %3, 0
22
23  %ret = call <4 x i32> @callee_vec_i32()
24  ret <4 x i32> %ret
25}
26