1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; Make sure that a negative value for the compare-and-swap is zero extended
3; from i8/i16 to i32 since it will be compared for equality.
4; RUN: llc -mtriple=powerpc64le-linux-gnu -verify-machineinstrs < %s | FileCheck %s
5; RUN: llc -mtriple=powerpc64le-linux-gnu -mcpu=pwr7 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-P7
6
7@str = private unnamed_addr constant [46 x i8] c"FAILED: __atomic_compare_exchange_n() failed.\00"
8@str.1 = private unnamed_addr constant [59 x i8] c"FAILED: __atomic_compare_exchange_n() set the wrong value.\00"
9@str.2 = private unnamed_addr constant [7 x i8] c"PASSED\00"
10
11define signext i32 @main() nounwind {
12; CHECK-LABEL: main:
13; CHECK:       # %bb.0: # %L.entry
14; CHECK-NEXT:    mflr 0
15; CHECK-NEXT:    std 0, 16(1)
16; CHECK-NEXT:    stdu 1, -48(1)
17; CHECK-NEXT:    li 3, -32477
18; CHECK-NEXT:    li 6, 234
19; CHECK-NEXT:    addi 5, 1, 46
20; CHECK-NEXT:    sth 3, 46(1)
21; CHECK-NEXT:    lis 3, 0
22; CHECK-NEXT:    ori 4, 3, 33059
23; CHECK-NEXT:    sync
24; CHECK-NEXT:  .LBB0_1: # %L.entry
25; CHECK-NEXT:    #
26; CHECK-NEXT:    lharx 3, 0, 5
27; CHECK-NEXT:    cmpw 4, 3
28; CHECK-NEXT:    bne 0, .LBB0_3
29; CHECK-NEXT:  # %bb.2: # %L.entry
30; CHECK-NEXT:    #
31; CHECK-NEXT:    sthcx. 6, 0, 5
32; CHECK-NEXT:    bne 0, .LBB0_1
33; CHECK-NEXT:    b .LBB0_4
34; CHECK-NEXT:  .LBB0_3: # %L.entry
35; CHECK-NEXT:    sthcx. 3, 0, 5
36; CHECK-NEXT:  .LBB0_4: # %L.entry
37; CHECK-NEXT:    cmplwi 3, 33059
38; CHECK-NEXT:    lwsync
39; CHECK-NEXT:    bne 0, .LBB0_7
40; CHECK-NEXT:  # %bb.5: # %L.B0000
41; CHECK-NEXT:    lhz 3, 46(1)
42; CHECK-NEXT:    cmplwi 3, 234
43; CHECK-NEXT:    bne 0, .LBB0_8
44; CHECK-NEXT:  # %bb.6: # %L.B0001
45; CHECK-NEXT:    addis 3, 2, .Lstr.2@toc@ha
46; CHECK-NEXT:    addi 3, 3, .Lstr.2@toc@l
47; CHECK-NEXT:    bl puts
48; CHECK-NEXT:    nop
49; CHECK-NEXT:    li 3, 0
50; CHECK-NEXT:    b .LBB0_10
51; CHECK-NEXT:  .LBB0_7: # %L.B0003
52; CHECK-NEXT:    addis 3, 2, .Lstr@toc@ha
53; CHECK-NEXT:    addi 3, 3, .Lstr@toc@l
54; CHECK-NEXT:    b .LBB0_9
55; CHECK-NEXT:  .LBB0_8: # %L.B0005
56; CHECK-NEXT:    addis 3, 2, .Lstr.1@toc@ha
57; CHECK-NEXT:    addi 3, 3, .Lstr.1@toc@l
58; CHECK-NEXT:  .LBB0_9: # %L.B0003
59; CHECK-NEXT:    bl puts
60; CHECK-NEXT:    nop
61; CHECK-NEXT:    li 3, 1
62; CHECK-NEXT:  .LBB0_10: # %L.B0003
63; CHECK-NEXT:    addi 1, 1, 48
64; CHECK-NEXT:    ld 0, 16(1)
65; CHECK-NEXT:    mtlr 0
66; CHECK-NEXT:    blr
67;
68; CHECK-P7-LABEL: main:
69; CHECK-P7:       # %bb.0: # %L.entry
70; CHECK-P7-NEXT:    mflr 0
71; CHECK-P7-NEXT:    std 0, 16(1)
72; CHECK-P7-NEXT:    stdu 1, -48(1)
73; CHECK-P7-NEXT:    li 3, -32477
74; CHECK-P7-NEXT:    lis 5, 0
75; CHECK-P7-NEXT:    addi 4, 1, 46
76; CHECK-P7-NEXT:    li 7, 0
77; CHECK-P7-NEXT:    sth 3, 46(1)
78; CHECK-P7-NEXT:    li 6, 234
79; CHECK-P7-NEXT:    ori 5, 5, 33059
80; CHECK-P7-NEXT:    rlwinm 3, 4, 3, 27, 27
81; CHECK-P7-NEXT:    ori 7, 7, 65535
82; CHECK-P7-NEXT:    sync
83; CHECK-P7-NEXT:    slw 6, 6, 3
84; CHECK-P7-NEXT:    slw 8, 5, 3
85; CHECK-P7-NEXT:    slw 5, 7, 3
86; CHECK-P7-NEXT:    rldicr 4, 4, 0, 61
87; CHECK-P7-NEXT:    and 7, 6, 5
88; CHECK-P7-NEXT:    and 8, 8, 5
89; CHECK-P7-NEXT:  .LBB0_1: # %L.entry
90; CHECK-P7-NEXT:    #
91; CHECK-P7-NEXT:    lwarx 9, 0, 4
92; CHECK-P7-NEXT:    and 6, 9, 5
93; CHECK-P7-NEXT:    cmpw 6, 8
94; CHECK-P7-NEXT:    bne 0, .LBB0_3
95; CHECK-P7-NEXT:  # %bb.2: # %L.entry
96; CHECK-P7-NEXT:    #
97; CHECK-P7-NEXT:    andc 9, 9, 5
98; CHECK-P7-NEXT:    or 9, 9, 7
99; CHECK-P7-NEXT:    stwcx. 9, 0, 4
100; CHECK-P7-NEXT:    bne 0, .LBB0_1
101; CHECK-P7-NEXT:    b .LBB0_4
102; CHECK-P7-NEXT:  .LBB0_3: # %L.entry
103; CHECK-P7-NEXT:    stwcx. 9, 0, 4
104; CHECK-P7-NEXT:  .LBB0_4: # %L.entry
105; CHECK-P7-NEXT:    srw 3, 6, 3
106; CHECK-P7-NEXT:    lwsync
107; CHECK-P7-NEXT:    cmplwi 3, 33059
108; CHECK-P7-NEXT:    bne 0, .LBB0_7
109; CHECK-P7-NEXT:  # %bb.5: # %L.B0000
110; CHECK-P7-NEXT:    lhz 3, 46(1)
111; CHECK-P7-NEXT:    cmplwi 3, 234
112; CHECK-P7-NEXT:    bne 0, .LBB0_8
113; CHECK-P7-NEXT:  # %bb.6: # %L.B0001
114; CHECK-P7-NEXT:    addis 3, 2, .Lstr.2@toc@ha
115; CHECK-P7-NEXT:    addi 3, 3, .Lstr.2@toc@l
116; CHECK-P7-NEXT:    bl puts
117; CHECK-P7-NEXT:    nop
118; CHECK-P7-NEXT:    li 3, 0
119; CHECK-P7-NEXT:    b .LBB0_10
120; CHECK-P7-NEXT:  .LBB0_7: # %L.B0003
121; CHECK-P7-NEXT:    addis 3, 2, .Lstr@toc@ha
122; CHECK-P7-NEXT:    addi 3, 3, .Lstr@toc@l
123; CHECK-P7-NEXT:    b .LBB0_9
124; CHECK-P7-NEXT:  .LBB0_8: # %L.B0005
125; CHECK-P7-NEXT:    addis 3, 2, .Lstr.1@toc@ha
126; CHECK-P7-NEXT:    addi 3, 3, .Lstr.1@toc@l
127; CHECK-P7-NEXT:  .LBB0_9: # %L.B0003
128; CHECK-P7-NEXT:    bl puts
129; CHECK-P7-NEXT:    nop
130; CHECK-P7-NEXT:    li 3, 1
131; CHECK-P7-NEXT:  .LBB0_10: # %L.B0003
132; CHECK-P7-NEXT:    addi 1, 1, 48
133; CHECK-P7-NEXT:    ld 0, 16(1)
134; CHECK-P7-NEXT:    mtlr 0
135; CHECK-P7-NEXT:    blr
136L.entry:
137  %value.addr = alloca i16, align 2
138  store i16 -32477, i16* %value.addr, align 2
139  %0 = cmpxchg i16* %value.addr, i16 -32477, i16 234 seq_cst seq_cst
140  %1 = extractvalue { i16, i1 } %0, 1
141  br i1 %1, label %L.B0000, label %L.B0003
142
143L.B0003:                                          ; preds = %L.entry
144  %puts = call i32 @puts(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @str, i64 0, i64 0))
145  ret i32 1
146
147L.B0000:                                          ; preds = %L.entry
148  %2 = load i16, i16* %value.addr, align 2
149  %3 = icmp eq i16 %2, 234
150  br i1 %3, label %L.B0001, label %L.B0005
151
152L.B0005:                                          ; preds = %L.B0000
153  %puts1 = call i32 @puts(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @str.1, i64 0, i64 0))
154  ret i32 1
155
156L.B0001:                                          ; preds = %L.B0000
157  %puts2 = call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @str.2, i64 0, i64 0))
158  ret i32 0
159}
160
161; Function Attrs: nounwind
162declare i32 @puts(i8* nocapture readonly) #0
163