1; RUN: llc -verify-machineinstrs < %s | FileCheck %s 2target datalayout = "E-m:e-i64:64-n32:64" 3target triple = "powerpc64-unknown-linux-gnu" 4 5define void @a32min(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 { 6entry: 7 %0 = atomicrmw min i32* %minimum, i32 %val monotonic 8 ret void 9 10; CHECK-LABEL: @a32min 11; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 12; CHECK: cmpw 4, [[OLDV]] 13; CHECK: bgelr 0 14; CHECK: stwcx. 4, 0, 3 15; CHECK: bne 0, 16; CHECK: blr 17} 18 19define void @a32max(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 { 20entry: 21 %0 = atomicrmw max i32* %minimum, i32 %val monotonic 22 ret void 23 24; CHECK-LABEL: @a32max 25; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 26; CHECK: cmpw 4, [[OLDV]] 27; CHECK: blelr 0 28; CHECK: stwcx. 4, 0, 3 29; CHECK: bne 0, 30; CHECK: blr 31} 32 33define void @a32umin(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 { 34entry: 35 %0 = atomicrmw umin i32* %minimum, i32 %val monotonic 36 ret void 37 38; CHECK-LABEL: @a32umin 39; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 40; CHECK: cmplw 4, [[OLDV]] 41; CHECK: bgelr 0 42; CHECK: stwcx. 4, 0, 3 43; CHECK: bne 0, 44; CHECK: blr 45} 46 47define void @a32umax(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 { 48entry: 49 %0 = atomicrmw umax i32* %minimum, i32 %val monotonic 50 ret void 51 52; CHECK-LABEL: @a32umax 53; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 54; CHECK: cmplw 4, [[OLDV]] 55; CHECK: blelr 0 56; CHECK: stwcx. 4, 0, 3 57; CHECK: bne 0, 58; CHECK: blr 59} 60 61define void @a16min(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 { 62entry: 63 %0 = atomicrmw min i16* %minimum, i16 %val monotonic 64 ret void 65 66; CHECK-LABEL: @a16min 67; CHECK: lharx [[OLDV:[0-9]+]], 0, 3 68; CHECK: cmpw 4, [[OLDV]] 69; CHECK: bgelr 0 70; CHECK: sthcx. 4, 0, 3 71; CHECK: bne 0, 72; CHECK: blr 73} 74 75define void @a16max(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 { 76entry: 77 %0 = atomicrmw max i16* %minimum, i16 %val monotonic 78 ret void 79 80; CHECK-LABEL: @a16max 81; CHECK: lharx [[OLDV:[0-9]+]], 0, 3 82; CHECK: cmpw 4, [[OLDV]] 83; CHECK: blelr 0 84; CHECK: sthcx. 4, 0, 3 85; CHECK: bne 0, 86; CHECK: blr 87} 88 89define void @a16umin(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 { 90entry: 91 %0 = atomicrmw umin i16* %minimum, i16 %val monotonic 92 ret void 93 94; CHECK-LABEL: @a16umin 95; CHECK: lharx [[OLDV:[0-9]+]], 0, 3 96; CHECK: cmplw 4, [[OLDV]] 97; CHECK: bgelr 0 98; CHECK: sthcx. 4, 0, 3 99; CHECK: bne 0, 100; CHECK: blr 101} 102 103define void @a16umax(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 { 104entry: 105 %0 = atomicrmw umax i16* %minimum, i16 %val monotonic 106 ret void 107 108; CHECK-LABEL: @a16umax 109; CHECK: lharx [[OLDV:[0-9]+]], 0, 3 110; CHECK: cmplw 4, [[OLDV]] 111; CHECK: blelr 0 112; CHECK: sthcx. 4, 0, 3 113; CHECK: bne 0, 114; CHECK: blr 115} 116 117define void @a8min(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 { 118entry: 119 %0 = atomicrmw min i8* %minimum, i8 %val monotonic 120 ret void 121 122; CHECK-LABEL: @a8min 123; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3 124; CHECK: cmpw 4, [[OLDV]] 125; CHECK: bgelr 0 126; CHECK: stbcx. 4, 0, 3 127; CHECK: bne 0, 128; CHECK: blr 129} 130 131define void @a8max(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 { 132entry: 133 %0 = atomicrmw max i8* %minimum, i8 %val monotonic 134 ret void 135 136; CHECK-LABEL: @a8max 137; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3 138; CHECK: cmpw 4, [[OLDV]] 139; CHECK: blelr 0 140; CHECK: stbcx. 4, 0, 3 141; CHECK: bne 0, 142; CHECK: blr 143} 144 145define void @a8umin(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 { 146entry: 147 %0 = atomicrmw umin i8* %minimum, i8 %val monotonic 148 ret void 149 150; CHECK-LABEL: @a8umin 151; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3 152; CHECK: cmplw 4, [[OLDV]] 153; CHECK: bgelr 0 154; CHECK: stbcx. 4, 0, 3 155; CHECK: bne 0, 156; CHECK: blr 157} 158 159define void @a8umax(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 { 160entry: 161 %0 = atomicrmw umax i8* %minimum, i8 %val monotonic 162 ret void 163 164; CHECK-LABEL: @a8umax 165; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3 166; CHECK: cmplw 4, [[OLDV]] 167; CHECK: blelr 0 168; CHECK: stbcx. 4, 0, 3 169; CHECK: bne 0, 170; CHECK: blr 171} 172 173define void @a64min(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 { 174entry: 175 %0 = atomicrmw min i64* %minimum, i64 %val monotonic 176 ret void 177 178; CHECK-LABEL: @a64min 179; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3 180; CHECK: cmpd 4, [[OLDV]] 181; CHECK: bgelr 0 182; CHECK: stdcx. 4, 0, 3 183; CHECK: bne 0, 184; CHECK: blr 185} 186 187define void @a64max(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 { 188entry: 189 %0 = atomicrmw max i64* %minimum, i64 %val monotonic 190 ret void 191 192; CHECK-LABEL: @a64max 193; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3 194; CHECK: cmpd 4, [[OLDV]] 195; CHECK: blelr 0 196; CHECK: stdcx. 4, 0, 3 197; CHECK: bne 0, 198; CHECK: blr 199} 200 201define void @a64umin(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 { 202entry: 203 %0 = atomicrmw umin i64* %minimum, i64 %val monotonic 204 ret void 205 206; CHECK-LABEL: @a64umin 207; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3 208; CHECK: cmpld 4, [[OLDV]] 209; CHECK: bgelr 0 210; CHECK: stdcx. 4, 0, 3 211; CHECK: bne 0, 212; CHECK: blr 213} 214 215define void @a64umax(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 { 216entry: 217 %0 = atomicrmw umax i64* %minimum, i64 %val monotonic 218 ret void 219 220; CHECK-LABEL: @a64umax 221; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3 222; CHECK: cmpld 4, [[OLDV]] 223; CHECK: blelr 0 224; CHECK: stdcx. 4, 0, 3 225; CHECK: bne 0, 226; CHECK: blr 227} 228 229define void @ae16min(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 { 230entry: 231 %0 = atomicrmw min i16* %minimum, i16 %val monotonic 232 ret void 233 234; CHECK-LABEL: @ae16min 235; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27 236; CHECK-DAG: li [[M1:[0-9]+]], 0 237; CHECK-DAG: rldicr 3, 3, 0, 61 238; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16 239; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535 240; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 241; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]] 242; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 243; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 244; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 245; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]] 246; CHECK: extsh [[SESMOLDV:[0-9]+]], [[SMOLDV]] 247; CHECK: cmpw 4, [[SESMOLDV]] 248; CHECK: bgelr 0 249; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 250; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 251; CHECK: stwcx. [[NEWV]], 0, 3 252; CHECK: bne 0, 253; CHECK: blr 254} 255 256define void @ae16max(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 { 257entry: 258 %0 = atomicrmw max i16* %minimum, i16 %val monotonic 259 ret void 260 261; CHECK-LABEL: @ae16max 262; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27 263; CHECK-DAG: li [[M1:[0-9]+]], 0 264; CHECK-DAG: rldicr 3, 3, 0, 61 265; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16 266; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535 267; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 268; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]] 269; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 270; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 271; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 272; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]] 273; CHECK: extsh [[SESMOLDV:[0-9]+]], [[SMOLDV]] 274; CHECK: cmpw 4, [[SESMOLDV]] 275; CHECK: blelr 0 276; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 277; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 278; CHECK: stwcx. [[NEWV]], 0, 3 279; CHECK: bne 0, 280; CHECK: blr 281} 282 283define void @ae16umin(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 { 284entry: 285 %0 = atomicrmw umin i16* %minimum, i16 %val monotonic 286 ret void 287 288; CHECK-LABEL: @ae16umin 289; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27 290; CHECK-DAG: li [[M1:[0-9]+]], 0 291; CHECK-DAG: rldicr 3, 3, 0, 61 292; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16 293; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535 294; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 295; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]] 296; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 297; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 298; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 299; CHECK: cmplw 4, [[MOLDV]] 300; CHECK: bgelr 0 301; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 302; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 303; CHECK: stwcx. [[NEWV]], 0, 3 304; CHECK: bne 0, 305; CHECK: blr 306} 307 308define void @ae16umax(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 { 309entry: 310 %0 = atomicrmw umax i16* %minimum, i16 %val monotonic 311 ret void 312 313; CHECK-LABEL: @ae16umax 314; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27 315; CHECK-DAG: li [[M1:[0-9]+]], 0 316; CHECK-DAG: rldicr 3, 3, 0, 61 317; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16 318; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535 319; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 320; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]] 321; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 322; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 323; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 324; CHECK: cmplw 4, [[MOLDV]] 325; CHECK: blelr 0 326; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 327; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 328; CHECK: stwcx. [[NEWV]], 0, 3 329; CHECK: bne 0, 330; CHECK: blr 331} 332 333define void @ae8min(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 { 334entry: 335 %0 = atomicrmw min i8* %minimum, i8 %val monotonic 336 ret void 337 338; CHECK-LABEL: @ae8min 339; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28 340; CHECK-DAG: li [[M1:[0-9]+]], 255 341; CHECK-DAG: rldicr 3, 3, 0, 61 342; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24 343; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 344; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]] 345; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 346; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 347; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 348; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]] 349; CHECK: extsb [[SESMOLDV:[0-9]+]], [[SMOLDV]] 350; CHECK: cmpw 4, [[SESMOLDV]] 351; CHECK: bgelr 0 352; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 353; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 354; CHECK: stwcx. [[NEWV]], 0, 3 355; CHECK: bne 0, 356; CHECK: blr 357} 358 359define void @ae8max(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 { 360entry: 361 %0 = atomicrmw max i8* %minimum, i8 %val monotonic 362 ret void 363 364; CHECK-LABEL: @ae8max 365; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28 366; CHECK-DAG: li [[M1:[0-9]+]], 255 367; CHECK-DAG: rldicr 3, 3, 0, 61 368; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24 369; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 370; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]] 371; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 372; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 373; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 374; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]] 375; CHECK: extsb [[SESMOLDV:[0-9]+]], [[SMOLDV]] 376; CHECK: cmpw 4, [[SESMOLDV]] 377; CHECK: blelr 0 378; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 379; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 380; CHECK: stwcx. [[NEWV]], 0, 3 381; CHECK: bne 0, 382; CHECK: blr 383} 384 385define void @ae8umin(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 { 386entry: 387 %0 = atomicrmw umin i8* %minimum, i8 %val monotonic 388 ret void 389 390; CHECK-LABEL: @ae8umin 391; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28 392; CHECK-DAG: li [[M1:[0-9]+]], 255 393; CHECK-DAG: rldicr 3, 3, 0, 61 394; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24 395; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 396; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]] 397; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 398; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 399; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 400; CHECK: cmplw 4, [[MOLDV]] 401; CHECK: bgelr 0 402; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 403; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 404; CHECK: stwcx. [[NEWV]], 0, 3 405; CHECK: bne 0, 406; CHECK: blr 407} 408 409define void @ae8umax(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 { 410entry: 411 %0 = atomicrmw umax i8* %minimum, i8 %val monotonic 412 ret void 413 414; CHECK-LABEL: @ae8umax 415; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28 416; CHECK-DAG: li [[M1:[0-9]+]], 255 417; CHECK-DAG: rldicr 3, 3, 0, 61 418; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24 419; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]] 420; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]] 421; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]] 422; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3 423; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]] 424; CHECK: cmplw 4, [[MOLDV]] 425; CHECK: blelr 0 426; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]] 427; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]] 428; CHECK: stwcx. [[NEWV]], 0, 3 429; CHECK: bne 0, 430; CHECK: blr 431} 432 433attributes #0 = { nounwind "target-cpu"="ppc64" } 434attributes #1 = { nounwind "target-cpu"="pwr8" } 435 436