1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
3; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s
4; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown \
5; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
6; RUN:   --check-prefix=CHECK-BE
7; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
8; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
9; RUN:   --check-prefix=CHECK-P9
10; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \
11; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
12; RUN:   --check-prefix=CHECK-P9-BE
13define dso_local i32 @poc(i32* %base, i32 %index, i1 %flag, i32 %default) {
14; CHECK-LABEL: poc:
15; CHECK:       # %bb.0: # %entry
16; CHECK-NEXT:    andi. r5, r5, 1
17; CHECK-NEXT:    bc 4, gt, .LBB0_2
18; CHECK-NEXT:  # %bb.1: # %true
19; CHECK-NEXT:    extsw r4, r4
20; CHECK-NEXT:    sldi r4, r4, 2
21; CHECK-NEXT:    lwzx r3, r3, r4
22; CHECK-NEXT:    blr
23; CHECK-NEXT:  .LBB0_2: # %false
24; CHECK-NEXT:    mr r3, r6
25; CHECK-NEXT:    blr
26;
27; CHECK-BE-LABEL: poc:
28; CHECK-BE:       # %bb.0: # %entry
29; CHECK-BE-NEXT:    andi. r5, r5, 1
30; CHECK-BE-NEXT:    bc 4, gt, .LBB0_2
31; CHECK-BE-NEXT:  # %bb.1: # %true
32; CHECK-BE-NEXT:    extsw r4, r4
33; CHECK-BE-NEXT:    sldi r4, r4, 2
34; CHECK-BE-NEXT:    lwzx r3, r3, r4
35; CHECK-BE-NEXT:    blr
36; CHECK-BE-NEXT:  .LBB0_2: # %false
37; CHECK-BE-NEXT:    mr r3, r6
38; CHECK-BE-NEXT:    blr
39;
40; CHECK-P9-LABEL: poc:
41; CHECK-P9:       # %bb.0: # %entry
42; CHECK-P9-NEXT:    andi. r5, r5, 1
43; CHECK-P9-NEXT:    bc 4, gt, .LBB0_2
44; CHECK-P9-NEXT:  # %bb.1: # %true
45; CHECK-P9-NEXT:    extswsli r4, r4, 2
46; CHECK-P9-NEXT:    lwzx r3, r3, r4
47; CHECK-P9-NEXT:    blr
48; CHECK-P9-NEXT:  .LBB0_2: # %false
49; CHECK-P9-NEXT:    mr r3, r6
50; CHECK-P9-NEXT:    blr
51;
52; CHECK-P9-BE-LABEL: poc:
53; CHECK-P9-BE:       # %bb.0: # %entry
54; CHECK-P9-BE-NEXT:    andi. r5, r5, 1
55; CHECK-P9-BE-NEXT:    bc 4, gt, .LBB0_2
56; CHECK-P9-BE-NEXT:  # %bb.1: # %true
57; CHECK-P9-BE-NEXT:    extswsli r4, r4, 2
58; CHECK-P9-BE-NEXT:    lwzx r3, r3, r4
59; CHECK-P9-BE-NEXT:    blr
60; CHECK-P9-BE-NEXT:  .LBB0_2: # %false
61; CHECK-P9-BE-NEXT:    mr r3, r6
62; CHECK-P9-BE-NEXT:    blr
63entry:
64  %iconv = sext i32 %index to i64
65  br i1 %flag, label %true, label %false
66
67true:
68  %ptr = getelementptr inbounds i32, i32* %base, i64 %iconv
69  %value = load i32, i32* %ptr, align 4
70  ret i32 %value
71
72false:
73  ret i32 %default
74}
75
76define dso_local i64 @poc_i64(i64* %base, i32 %index, i1 %flag, i64 %default) {
77; CHECK-LABEL: poc_i64:
78; CHECK:       # %bb.0: # %entry
79; CHECK-NEXT:    andi. r5, r5, 1
80; CHECK-NEXT:    bc 4, gt, .LBB1_2
81; CHECK-NEXT:  # %bb.1: # %true
82; CHECK-NEXT:    extsw r4, r4
83; CHECK-NEXT:    sldi r4, r4, 3
84; CHECK-NEXT:    ldx r3, r3, r4
85; CHECK-NEXT:    blr
86; CHECK-NEXT:  .LBB1_2: # %false
87; CHECK-NEXT:    mr r3, r6
88; CHECK-NEXT:    blr
89;
90; CHECK-BE-LABEL: poc_i64:
91; CHECK-BE:       # %bb.0: # %entry
92; CHECK-BE-NEXT:    andi. r5, r5, 1
93; CHECK-BE-NEXT:    bc 4, gt, .LBB1_2
94; CHECK-BE-NEXT:  # %bb.1: # %true
95; CHECK-BE-NEXT:    extsw r4, r4
96; CHECK-BE-NEXT:    sldi r4, r4, 3
97; CHECK-BE-NEXT:    ldx r3, r3, r4
98; CHECK-BE-NEXT:    blr
99; CHECK-BE-NEXT:  .LBB1_2: # %false
100; CHECK-BE-NEXT:    mr r3, r6
101; CHECK-BE-NEXT:    blr
102;
103; CHECK-P9-LABEL: poc_i64:
104; CHECK-P9:       # %bb.0: # %entry
105; CHECK-P9-NEXT:    andi. r5, r5, 1
106; CHECK-P9-NEXT:    bc 4, gt, .LBB1_2
107; CHECK-P9-NEXT:  # %bb.1: # %true
108; CHECK-P9-NEXT:    extswsli r4, r4, 3
109; CHECK-P9-NEXT:    ldx r3, r3, r4
110; CHECK-P9-NEXT:    blr
111; CHECK-P9-NEXT:  .LBB1_2: # %false
112; CHECK-P9-NEXT:    mr r3, r6
113; CHECK-P9-NEXT:    blr
114;
115; CHECK-P9-BE-LABEL: poc_i64:
116; CHECK-P9-BE:       # %bb.0: # %entry
117; CHECK-P9-BE-NEXT:    andi. r5, r5, 1
118; CHECK-P9-BE-NEXT:    bc 4, gt, .LBB1_2
119; CHECK-P9-BE-NEXT:  # %bb.1: # %true
120; CHECK-P9-BE-NEXT:    extswsli r4, r4, 3
121; CHECK-P9-BE-NEXT:    ldx r3, r3, r4
122; CHECK-P9-BE-NEXT:    blr
123; CHECK-P9-BE-NEXT:  .LBB1_2: # %false
124; CHECK-P9-BE-NEXT:    mr r3, r6
125; CHECK-P9-BE-NEXT:    blr
126entry:
127  %iconv = sext i32 %index to i64
128  br i1 %flag, label %true, label %false
129
130true:
131  %ptr = getelementptr inbounds i64, i64* %base, i64 %iconv
132  %value = load i64, i64* %ptr, align 8
133  ret i64 %value
134
135false:
136  ret i64 %default
137}
138
139define dso_local i64 @no_extswsli(i64* %base, i32 %index, i1 %flag) {
140; CHECK-LABEL: no_extswsli:
141; CHECK:       # %bb.0: # %entry
142; CHECK-NEXT:    andi. r5, r5, 1
143; CHECK-NEXT:    extsw r4, r4
144; CHECK-NEXT:    bc 4, gt, .LBB2_2
145; CHECK-NEXT:  # %bb.1: # %true
146; CHECK-NEXT:    sldi r4, r4, 3
147; CHECK-NEXT:    ldx r3, r3, r4
148; CHECK-NEXT:    blr
149; CHECK-NEXT:  .LBB2_2: # %false
150; CHECK-NEXT:    mr r3, r4
151; CHECK-NEXT:    blr
152;
153; CHECK-BE-LABEL: no_extswsli:
154; CHECK-BE:       # %bb.0: # %entry
155; CHECK-BE-NEXT:    andi. r5, r5, 1
156; CHECK-BE-NEXT:    extsw r4, r4
157; CHECK-BE-NEXT:    bc 4, gt, .LBB2_2
158; CHECK-BE-NEXT:  # %bb.1: # %true
159; CHECK-BE-NEXT:    sldi r4, r4, 3
160; CHECK-BE-NEXT:    ldx r3, r3, r4
161; CHECK-BE-NEXT:    blr
162; CHECK-BE-NEXT:  .LBB2_2: # %false
163; CHECK-BE-NEXT:    mr r3, r4
164; CHECK-BE-NEXT:    blr
165;
166; CHECK-P9-LABEL: no_extswsli:
167; CHECK-P9:       # %bb.0: # %entry
168; CHECK-P9-NEXT:    extsw r4, r4
169; CHECK-P9-NEXT:    andi. r5, r5, 1
170; CHECK-P9-NEXT:    bc 4, gt, .LBB2_2
171; CHECK-P9-NEXT:  # %bb.1: # %true
172; CHECK-P9-NEXT:    sldi r4, r4, 3
173; CHECK-P9-NEXT:    ldx r3, r3, r4
174; CHECK-P9-NEXT:    blr
175; CHECK-P9-NEXT:  .LBB2_2: # %false
176; CHECK-P9-NEXT:    mr r3, r4
177; CHECK-P9-NEXT:    blr
178;
179; CHECK-P9-BE-LABEL: no_extswsli:
180; CHECK-P9-BE:       # %bb.0: # %entry
181; CHECK-P9-BE-NEXT:    extsw r4, r4
182; CHECK-P9-BE-NEXT:    andi. r5, r5, 1
183; CHECK-P9-BE-NEXT:    bc 4, gt, .LBB2_2
184; CHECK-P9-BE-NEXT:  # %bb.1: # %true
185; CHECK-P9-BE-NEXT:    sldi r4, r4, 3
186; CHECK-P9-BE-NEXT:    ldx r3, r3, r4
187; CHECK-P9-BE-NEXT:    blr
188; CHECK-P9-BE-NEXT:  .LBB2_2: # %false
189; CHECK-P9-BE-NEXT:    mr r3, r4
190; CHECK-P9-BE-NEXT:    blr
191entry:
192  %iconv = sext i32 %index to i64
193  br i1 %flag, label %true, label %false
194
195true:
196  %ptr = getelementptr inbounds i64, i64* %base, i64 %iconv
197  %value = load i64, i64* %ptr, align 8
198  ret i64 %value
199
200false:
201  ret i64 %iconv
202}
203