1target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" 2target triple = "powerpc64-unknown-linux-gnu" 3; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck %s --implicit-check-not isel 4 5define signext i32 @testExpandISELToIfElse(i32 signext %i, i32 signext %j) { 6entry: 7 %cmp = icmp sgt i32 %i, 0 8 %add = add nsw i32 %i, 1 9 %cond = select i1 %cmp, i32 %add, i32 %j 10 ret i32 %cond 11 12; CHECK-LABEL: @testExpandISELToIfElse 13; CHECK: addi r5, r3, 1 14; CHECK-NEXT: cmpwi r3, 0 15; CHECK-NEXT: bc 12, gt, [[TRUE:.LBB[0-9]+]] 16; CHECK: ori r3, r4, 0 17; CHECK-NEXT: b [[SUCCESSOR:.LBB[0-9]+]] 18; CHECK-NEXT: [[TRUE]] 19; CHECK-NEXT: addi r3, r5, 0 20; CHECK-NEXT: [[SUCCESSOR]] 21; CHECK-NEXT: extsw r3, r3 22; CHECK-NEXT: blr 23} 24 25 26define signext i32 @testExpandISELToIf(i32 signext %i, i32 signext %j) { 27entry: 28 %cmp = icmp sgt i32 %i, 0 29 %cond = select i1 %cmp, i32 %j, i32 %i 30 ret i32 %cond 31 32; CHECK-LABEL: @testExpandISELToIf 33; CHECK: cmpwi r3, 0 34; CHECK-NEXT: bc 12, gt, [[TRUE:.LBB[0-9]+]] 35; CHECK-NEXT: blr 36; CHECK-NEXT: [[TRUE]] 37; CHECK-NEXT: addi r3, r4, 0 38; CHECK-NEXT: blr 39} 40 41define signext i32 @testExpandISELToElse(i32 signext %i, i32 signext %j) { 42entry: 43 %cmp = icmp sgt i32 %i, 0 44 %cond = select i1 %cmp, i32 %i, i32 %j 45 ret i32 %cond 46 47; CHECK-LABEL: @testExpandISELToElse 48; CHECK: cmpwi r3, 0 49; CHECK-NEXT: bclr 12, gt, 0 50; CHECK: ori r3, r4, 0 51; CHECK-NEXT: blr 52} 53 54 55define signext i32 @testExpandISELToNull(i32 signext %i, i32 signext %j) { 56entry: 57 %cmp = icmp sgt i32 %i, 0 58 %cond = select i1 %cmp, i32 %i, i32 %i 59 ret i32 %cond 60 61; CHECK-LABEL: @testExpandISELToNull 62; CHECK-NOT: b {{.LBB[0-9]+}} 63; CHECK-NOT: bc 64; CHECK: blr 65} 66 67define signext i32 @testExpandISELsTo2ORIs2ADDIs 68 (i32 signext %a, i32 signext %b, i32 signext %d, 69 i32 signext %f, i32 signext %g) { 70entry: 71 72 %cmp = icmp sgt i32 %g, 0 73 %a.b = select i1 %cmp, i32 %g, i32 %b 74 %d.f = select i1 %cmp, i32 %d, i32 %f 75 %add = add nsw i32 %a.b, %d.f 76 ret i32 %add 77 78; CHECK-LABEL: @testExpandISELsTo2ORIs2ADDIs 79; CHECK: cmpwi r7, 0 80; CHECK-NEXT: bc 12, gt, [[TRUE:.LBB[0-9]+]] 81; CHECK: ori r3, r4, 0 82; CHECK-NEXT: ori r4, r6, 0 83; CHECK-NEXT: b [[SUCCESSOR:.LBB[0-9]+]] 84; CHECK-NEXT: [[TRUE]] 85; CHECK-NEXT: addi r3, r7, 0 86; CHECK-NEXT: addi r4, r5, 0 87; CHECK-NEXT: [[SUCCESSOR]] 88; CHECK-NEXT: add r3, r3, r4 89; CHECK-NEXT: extsw r3, r3 90; CHECK-NEXT: blr 91} 92 93define signext i32 @testExpandISELsTo2ORIs1ADDI 94 (i32 signext %a, i32 signext %b, i32 signext %d, 95 i32 signext %f, i32 signext %g) { 96entry: 97 %cmp = icmp sgt i32 %g, 0 98 %a.b = select i1 %cmp, i32 %a, i32 %b 99 %d.f = select i1 %cmp, i32 %d, i32 %f 100 %add = add nsw i32 %a.b, %d.f 101 ret i32 %add 102 103; CHECK-LABEL: @testExpandISELsTo2ORIs1ADDI 104; CHECK: cmpwi r7, 0 105; CHECK-NEXT: bc 12, gt, [[TRUE:.LBB[0-9]+]] 106; CHECK: ori r3, r4, 0 107; CHECK-NEXT: ori r4, r6, 0 108; CHECK-NEXT: b [[SUCCESSOR:.LBB[0-9]+]] 109; CHECK-NEXT: [[TRUE]] 110; CHECK-NEXT: addi r4, r5, 0 111; CHECK-NEXT: [[SUCCESSOR]] 112; CHECK-NEXT: add r3, r3, r4 113; CHECK-NEXT: extsw r3, r3 114; CHECK-NEXT: blr 115} 116 117define signext i32 @testExpandISELsTo1ORI1ADDI 118 (i32 signext %a, i32 signext %b, i32 signext %d, 119 i32 signext %f, i32 signext %g) { 120entry: 121 122 %cmp = icmp sgt i32 %g, 0 123 %a.b = select i1 %cmp, i32 %a, i32 %b 124 %d.f = select i1 %cmp, i32 %d, i32 %f 125 %add1 = add nsw i32 %a.b, %d.f 126 %add2 = add nsw i32 %a, %add1 127 ret i32 %add2 128 129; CHECK-LABEL: @testExpandISELsTo1ORI1ADDI 130; CHECK: cmpwi r7, 0 131; CHECK-NEXT: bc 12, gt, [[TRUE:.LBB[0-9]+]] 132; CHECK: ori r5, r6, 0 133; CHECK-NEXT: b [[SUCCESSOR:.LBB[0-9]+]] 134; CHECK-NEXT: [[TRUE]] 135; CHECK-NEXT: addi r4, r3, 0 136; CHECK-NEXT: [[SUCCESSOR]] 137; CHECK-NEXT: add r4, r4, r5 138; CHECK-NEXT: add r3, r3, r4 139; CHECK-NEXT: extsw r3, r3 140; CHECK-NEXT: blr 141} 142 143define signext i32 @testExpandISELsTo0ORI2ADDIs 144 (i32 signext %a, i32 signext %b, i32 signext %d, 145 i32 signext %f, i32 signext %g) { 146entry: 147 148 %cmp = icmp sgt i32 %g, 0 149 %a.b = select i1 %cmp, i32 %a, i32 %b 150 %d.f = select i1 %cmp, i32 %d, i32 %f 151 %add1 = add nsw i32 %a.b, %d.f 152 %add2 = add nsw i32 %a, %add1 153 %sub1 = sub nsw i32 %add2, %d 154 ret i32 %sub1 155 156; CHECK-LABEL: @testExpandISELsTo0ORI2ADDIs 157; CHECK: cmpwi r7, 0 158; CHECK-NEXT: bc 12, gt, [[TRUE:.LBB[0-9]+]] 159; CHECK-NEXT: b [[SUCCESSOR:.LBB[0-9]+]] 160; CHECK-NEXT: [[TRUE]] 161; CHECK-NEXT: addi r4, r3, 0 162; CHECK-NEXT: addi r6, r5, 0 163; CHECK-NEXT: [[SUCCESSOR]] 164; CHECK-NEXT: add r4, r4, r6 165; CHECK-NEXT: add r3, r3, r4 166; CHECK-NEXT: sub r3, r3, r5 167; CHECK-NEXT: extsw r3, r3 168; CHECK-NEXT: blr 169} 170 171 172@b = local_unnamed_addr global i32 0, align 4 173@a = local_unnamed_addr global i32 0, align 4 174; Function Attrs: norecurse nounwind readonly 175define signext i32 @testComplexISEL() #0 { 176entry: 177 %0 = load i32, i32* @b, align 4, !tbaa !1 178 %tobool = icmp eq i32 %0, 0 179 br i1 %tobool, label %if.end, label %cleanup 180 181if.end: 182 %1 = load i32, i32* @a, align 4, !tbaa !1 183 %conv = sext i32 %1 to i64 184 %2 = inttoptr i64 %conv to i32 (...)* 185 %cmp = icmp eq i32 (...)* %2, bitcast (i32 ()* @testComplexISEL to i32 (...)*) 186 %conv3 = zext i1 %cmp to i32 187 br label %cleanup 188 189cleanup: 190 %retval.0 = phi i32 [ %conv3, %if.end ], [ 1, %entry ] 191 ret i32 %retval.0 192 193; CHECK-LABEL: @testComplexISEL 194; CHECK: cmplwi r3, 0 195; CHECK: li r3, 1 196; CHECK: beq cr0, [[TGT:.LBB[0-9_]+]] 197; CHECK: clrldi r3, r3, 32 198; CHECK: blr 199; CHECK: [[TGT]] 200; CHECK: xor [[XOR:r[0-9]+]] 201; CHECK: cntlzd [[CZ:r[0-9]+]], [[XOR]] 202; CHECK: rldicl [[SH:r[0-9]+]], [[CZ]], 58, 63 203} 204 205!1 = !{!2, !2, i64 0} 206!2 = !{!"int", !3, i64 0} 207!3 = !{!"omnipotent char", !4, i64 0} 208!4 = !{!"Simple C/C++ TBAA"} 209