1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
3; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
5; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names < %s | FileCheck %s
6define float @floatundisf(i64 %a) {
7; CHECK-LABEL: floatundisf:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    xxlxor f1, f1, f1
10; CHECK-NEXT:    bclr 12, 4*cr5+lt, 0
11; CHECK-NEXT:  # %bb.1: # %sw.epilog
12; CHECK-NEXT:    addi r3, r3, 1
13; CHECK-NEXT:    li r5, 2
14; CHECK-NEXT:    andis. r4, r3, 1024
15; CHECK-NEXT:    li r4, 3
16; CHECK-NEXT:    iseleq r4, r5, r4
17; CHECK-NEXT:    srd r3, r3, r4
18; CHECK-NEXT:    clrlwi r3, r3, 9
19; CHECK-NEXT:    mtfprd f0, r3
20; CHECK-NEXT:    xxsldwi vs0, vs0, vs0, 1
21; CHECK-NEXT:    xscvspdpn f1, vs0
22; CHECK-NEXT:    blr
23entry:
24  br i1 undef, label %return, label %sw.epilog
25
26sw.epilog:                                        ; preds = %entry
27  %or14 = or i64 0, %a
28  %inc = add i64 %or14, 1
29  %and16 = and i64 %inc, 67108864
30  %tobool = icmp eq i64 %and16, 0
31  %tmp.select.v = select i1 %tobool, i64 2, i64 3
32  %tmp.select = lshr i64 %inc, %tmp.select.v
33  %conv26 = trunc i64 %tmp.select to i32
34  %and27 = and i32 %conv26, 8388607
35  %or28 = or i32 0, %and27
36  %0 = bitcast i32 %or28 to float
37  br label %return
38
39return:                                           ; preds = %sw.epilog, %entry
40  %retval.0 = phi float [ %0, %sw.epilog ], [ 0.000000e+00, %entry ]
41  ret float %retval.0
42}
43