1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
3; RUN:     -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
4; RUN:     --check-prefixes=CHECK,CHECK-LE
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
6; RUN:     -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
7; RUN:     --check-prefixes=CHECK,CHECK-BE
8
9; This file does not contain many test cases involving comparisons and logical
10; comparisons (cmplwi, cmpldi). This is because alternative code is generated
11; when there is a compare (logical or not), followed by a sign or zero extend.
12; This codegen will be re-evaluated at a later time on whether or not it should
13; be emitted on P10.
14
15@globalVal = common local_unnamed_addr global i8 0, align 1
16@globalVal2 = common local_unnamed_addr global i32 0, align 4
17@globalVal3 = common local_unnamed_addr global i64 0, align 8
18@globalVal4 = common local_unnamed_addr global i16 0, align 2
19
20define signext i32 @setnbc1(i8 %a) {
21; CHECK-LABEL: setnbc1:
22; CHECK:       # %bb.0: # %entry
23; CHECK-NEXT:    extsb r3, r3
24; CHECK-NEXT:    cmpwi r3, 1
25; CHECK-NEXT:    setnbc r3, lt
26; CHECK-NEXT:    blr
27entry:
28  %cmp = icmp slt i8 %a, 1
29  %conv = sext i1 %cmp to i32
30  ret i32 %conv
31}
32
33define signext i32 @setnbc2(i32 %a) {
34; CHECK-LABEL: setnbc2:
35; CHECK:       # %bb.0: # %entry
36; CHECK-NEXT:    cmpwi r3, 1
37; CHECK-NEXT:    setnbc r3, lt
38; CHECK-NEXT:    blr
39entry:
40  %cmp = icmp slt i32 %a, 1
41  %conv = sext i1 %cmp to i32
42  ret i32 %conv
43}
44
45define signext i32 @setnbc3(i64 %a) {
46; CHECK-LABEL: setnbc3:
47; CHECK:       # %bb.0: # %entry
48; CHECK-NEXT:    cmpdi r3, 1
49; CHECK-NEXT:    setnbc r3, lt
50; CHECK-NEXT:    blr
51entry:
52  %cmp = icmp slt i64 %a, 1
53  %conv = sext i1 %cmp to i32
54  ret i32 %conv
55}
56
57define signext i32 @setnbc4(i16 %a) {
58; CHECK-LABEL: setnbc4:
59; CHECK:       # %bb.0: # %entry
60; CHECK-NEXT:    extsh r3, r3
61; CHECK-NEXT:    cmpwi r3, 1
62; CHECK-NEXT:    setnbc r3, lt
63; CHECK-NEXT:    blr
64entry:
65  %cmp = icmp slt i16 %a, 1
66  %conv = sext i1 %cmp to i32
67  ret i32 %conv
68}
69
70define signext i64 @setnbc5(i8 %a) {
71; CHECK-LABEL: setnbc5:
72; CHECK:       # %bb.0: # %entry
73; CHECK-NEXT:    extsb r3, r3
74; CHECK-NEXT:    cmpwi r3, 1
75; CHECK-NEXT:    setnbc r3, lt
76; CHECK-NEXT:    blr
77entry:
78  %cmp = icmp slt i8 %a, 1
79  %conv = sext i1 %cmp to i64
80  ret i64 %conv
81}
82
83define signext i64 @setnbc6(i32 %a) {
84; CHECK-LABEL: setnbc6:
85; CHECK:       # %bb.0: # %entry
86; CHECK-NEXT:    cmpwi r3, 1
87; CHECK-NEXT:    setnbc r3, lt
88; CHECK-NEXT:    blr
89entry:
90  %cmp = icmp slt i32 %a, 1
91  %conv = sext i1 %cmp to i64
92  ret i64 %conv
93}
94
95define signext i64 @setnbc7(i64 %a) {
96; CHECK-LABEL: setnbc7:
97; CHECK:       # %bb.0: # %entry
98; CHECK-NEXT:    cmpdi r3, 1
99; CHECK-NEXT:    setnbc r3, lt
100; CHECK-NEXT:    blr
101entry:
102  %cmp = icmp slt i64 %a, 1
103  %conv = sext i1 %cmp to i64
104  ret i64 %conv
105}
106
107define signext i64 @setnbc8(i16 %a) {
108; CHECK-LABEL: setnbc8:
109; CHECK:       # %bb.0: # %entry
110; CHECK-NEXT:    extsh r3, r3
111; CHECK-NEXT:    cmpwi r3, 1
112; CHECK-NEXT:    setnbc r3, lt
113; CHECK-NEXT:    blr
114entry:
115  %cmp = icmp slt i16 %a, 1
116  %conv = sext i1 %cmp to i64
117  ret i64 %conv
118}
119
120define void @setnbc9(i8 %a) {
121; CHECK-LE-LABEL: setnbc9:
122; CHECK-LE:       # %bb.0: # %entry
123; CHECK-LE-NEXT:    extsb r3, r3
124; CHECK-LE-NEXT:    cmpwi r3, 1
125; CHECK-LE-NEXT:    setnbc r3, lt
126; CHECK-LE-NEXT:    pstb r3, globalVal@PCREL(0), 1
127; CHECK-LE-NEXT:    blr
128;
129; CHECK-BE-LABEL: setnbc9:
130; CHECK-BE:       # %bb.0: # %entry
131; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
132; CHECK-BE-NEXT:    extsb r3, r3
133; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
134; CHECK-BE-NEXT:    cmpwi r3, 1
135; CHECK-BE-NEXT:    setnbc r3, lt
136; CHECK-BE-NEXT:    stb r3, 0(r4)
137; CHECK-BE-NEXT:    blr
138entry:
139  %cmp = icmp slt i8 %a, 1
140  %conv1 = sext i1 %cmp to i8
141  store i8 %conv1, i8* @globalVal, align 1
142  ret void
143}
144
145define void @setnbc10(i32 %a) {
146; CHECK-LE-LABEL: setnbc10:
147; CHECK-LE:       # %bb.0: # %entry
148; CHECK-LE-NEXT:    cmpwi r3, 1
149; CHECK-LE-NEXT:    setnbc r3, lt
150; CHECK-LE-NEXT:    pstw r3, globalVal2@PCREL(0), 1
151; CHECK-LE-NEXT:    blr
152;
153; CHECK-BE-LABEL: setnbc10:
154; CHECK-BE:       # %bb.0: # %entry
155; CHECK-BE-NEXT:    addis r4, r2, .LC1@toc@ha
156; CHECK-BE-NEXT:    cmpwi r3, 1
157; CHECK-BE-NEXT:    ld r4, .LC1@toc@l(r4)
158; CHECK-BE-NEXT:    setnbc r3, lt
159; CHECK-BE-NEXT:    stw r3, 0(r4)
160; CHECK-BE-NEXT:    blr
161entry:
162  %cmp = icmp slt i32 %a, 1
163  %conv1 = sext i1 %cmp to i32
164  store i32 %conv1, i32* @globalVal2, align 4
165  ret void
166}
167
168define void @setnbc11(i64 %a) {
169; CHECK-LE-LABEL: setnbc11:
170; CHECK-LE:       # %bb.0: # %entry
171; CHECK-LE-NEXT:    cmpdi r3, 1
172; CHECK-LE-NEXT:    setnbc r3, lt
173; CHECK-LE-NEXT:    pstd r3, globalVal3@PCREL(0), 1
174; CHECK-LE-NEXT:    blr
175;
176; CHECK-BE-LABEL: setnbc11:
177; CHECK-BE:       # %bb.0: # %entry
178; CHECK-BE-NEXT:    addis r4, r2, .LC2@toc@ha
179; CHECK-BE-NEXT:    cmpdi r3, 1
180; CHECK-BE-NEXT:    ld r4, .LC2@toc@l(r4)
181; CHECK-BE-NEXT:    setnbc r3, lt
182; CHECK-BE-NEXT:    std r3, 0(r4)
183; CHECK-BE-NEXT:    blr
184entry:
185  %cmp = icmp slt i64 %a, 1
186  %conv1 = sext i1 %cmp to i64
187  store i64 %conv1, i64* @globalVal3, align 8
188  ret void
189}
190
191define void @setnbc12(i16 %a) {
192; CHECK-LE-LABEL: setnbc12:
193; CHECK-LE:       # %bb.0: # %entry
194; CHECK-LE-NEXT:    extsh r3, r3
195; CHECK-LE-NEXT:    cmpwi r3, 1
196; CHECK-LE-NEXT:    setnbc r3, lt
197; CHECK-LE-NEXT:    psth r3, globalVal4@PCREL(0), 1
198; CHECK-LE-NEXT:    blr
199;
200; CHECK-BE-LABEL: setnbc12:
201; CHECK-BE:       # %bb.0: # %entry
202; CHECK-BE-NEXT:    addis r4, r2, .LC3@toc@ha
203; CHECK-BE-NEXT:    extsh r3, r3
204; CHECK-BE-NEXT:    ld r4, .LC3@toc@l(r4)
205; CHECK-BE-NEXT:    cmpwi r3, 1
206; CHECK-BE-NEXT:    setnbc r3, lt
207; CHECK-BE-NEXT:    sth r3, 0(r4)
208; CHECK-BE-NEXT:    blr
209entry:
210  %cmp = icmp slt i16 %a, 1
211  %conv1 = sext i1 %cmp to i16
212  store i16 %conv1, i16* @globalVal4, align 2
213  ret void
214}
215
216define signext i32 @setnbc13(i8 %a) {
217; CHECK-LABEL: setnbc13:
218; CHECK:       # %bb.0: # %entry
219; CHECK-NEXT:    extsb r3, r3
220; CHECK-NEXT:    cmpwi r3, 1
221; CHECK-NEXT:    setnbc r3, gt
222; CHECK-NEXT:    blr
223entry:
224  %cmp = icmp sgt i8 %a, 1
225  %conv = sext i1 %cmp to i32
226  ret i32 %conv
227}
228
229define signext i32 @setnbc14(i32 %a) {
230; CHECK-LABEL: setnbc14:
231; CHECK:       # %bb.0: # %entry
232; CHECK-NEXT:    cmpwi r3, 1
233; CHECK-NEXT:    setnbc r3, gt
234; CHECK-NEXT:    blr
235entry:
236  %cmp = icmp sgt i32 %a, 1
237  %conv = sext i1 %cmp to i32
238  ret i32 %conv
239}
240
241define signext i32 @setnbc15(i64 %a) {
242; CHECK-LABEL: setnbc15:
243; CHECK:       # %bb.0: # %entry
244; CHECK-NEXT:    cmpdi r3, 1
245; CHECK-NEXT:    setnbc r3, gt
246; CHECK-NEXT:    blr
247entry:
248  %cmp = icmp sgt i64 %a, 1
249  %conv = sext i1 %cmp to i32
250  ret i32 %conv
251}
252
253define signext i32 @setnbc16(i16 %a) {
254; CHECK-LABEL: setnbc16:
255; CHECK:       # %bb.0: # %entry
256; CHECK-NEXT:    extsh r3, r3
257; CHECK-NEXT:    cmpwi r3, 1
258; CHECK-NEXT:    setnbc r3, gt
259; CHECK-NEXT:    blr
260entry:
261  %cmp = icmp sgt i16 %a, 1
262  %conv = sext i1 %cmp to i32
263  ret i32 %conv
264}
265
266define signext i64 @setnbc17(i8 %a) {
267; CHECK-LABEL: setnbc17:
268; CHECK:       # %bb.0: # %entry
269; CHECK-NEXT:    extsb r3, r3
270; CHECK-NEXT:    cmpwi r3, 1
271; CHECK-NEXT:    setnbc r3, gt
272; CHECK-NEXT:    blr
273entry:
274  %cmp = icmp sgt i8 %a, 1
275  %conv = sext i1 %cmp to i64
276  ret i64 %conv
277}
278
279define signext i64 @setnbc18(i32 %a) {
280; CHECK-LABEL: setnbc18:
281; CHECK:       # %bb.0: # %entry
282; CHECK-NEXT:    cmpwi r3, 1
283; CHECK-NEXT:    setnbc r3, gt
284; CHECK-NEXT:    blr
285entry:
286  %cmp = icmp sgt i32 %a, 1
287  %conv = sext i1 %cmp to i64
288  ret i64 %conv
289}
290
291define signext i64 @setnbc19(i64 %a) {
292; CHECK-LABEL: setnbc19:
293; CHECK:       # %bb.0: # %entry
294; CHECK-NEXT:    cmpdi r3, 1
295; CHECK-NEXT:    setnbc r3, gt
296; CHECK-NEXT:    blr
297entry:
298  %cmp = icmp sgt i64 %a, 1
299  %conv = sext i1 %cmp to i64
300  ret i64 %conv
301}
302
303define signext i64 @setnbc20(i16 %a) {
304; CHECK-LABEL: setnbc20:
305; CHECK:       # %bb.0: # %entry
306; CHECK-NEXT:    extsh r3, r3
307; CHECK-NEXT:    cmpwi r3, 1
308; CHECK-NEXT:    setnbc r3, gt
309; CHECK-NEXT:    blr
310entry:
311  %cmp = icmp sgt i16 %a, 1
312  %conv = sext i1 %cmp to i64
313  ret i64 %conv
314}
315
316define void @setnbc21(i8 %a) {
317; CHECK-LE-LABEL: setnbc21:
318; CHECK-LE:       # %bb.0: # %entry
319; CHECK-LE-NEXT:    extsb r3, r3
320; CHECK-LE-NEXT:    cmpwi r3, 1
321; CHECK-LE-NEXT:    setnbc r3, gt
322; CHECK-LE-NEXT:    pstb r3, globalVal@PCREL(0), 1
323; CHECK-LE-NEXT:    blr
324;
325; CHECK-BE-LABEL: setnbc21:
326; CHECK-BE:       # %bb.0: # %entry
327; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
328; CHECK-BE-NEXT:    extsb r3, r3
329; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
330; CHECK-BE-NEXT:    cmpwi r3, 1
331; CHECK-BE-NEXT:    setnbc r3, gt
332; CHECK-BE-NEXT:    stb r3, 0(r4)
333; CHECK-BE-NEXT:    blr
334entry:
335  %cmp = icmp sgt i8 %a, 1
336  %conv1 = sext i1 %cmp to i8
337  store i8 %conv1, i8* @globalVal, align 1
338  ret void
339}
340
341define void @setnbc22(i32 %a) {
342; CHECK-LE-LABEL: setnbc22:
343; CHECK-LE:       # %bb.0: # %entry
344; CHECK-LE-NEXT:    cmpwi r3, 1
345; CHECK-LE-NEXT:    setnbc r3, gt
346; CHECK-LE-NEXT:    pstw r3, globalVal2@PCREL(0), 1
347; CHECK-LE-NEXT:    blr
348;
349; CHECK-BE-LABEL: setnbc22:
350; CHECK-BE:       # %bb.0: # %entry
351; CHECK-BE-NEXT:    addis r4, r2, .LC1@toc@ha
352; CHECK-BE-NEXT:    cmpwi r3, 1
353; CHECK-BE-NEXT:    ld r4, .LC1@toc@l(r4)
354; CHECK-BE-NEXT:    setnbc r3, gt
355; CHECK-BE-NEXT:    stw r3, 0(r4)
356; CHECK-BE-NEXT:    blr
357entry:
358  %cmp = icmp sgt i32 %a, 1
359  %conv1 = sext i1 %cmp to i32
360  store i32 %conv1, i32* @globalVal2, align 4
361  ret void
362}
363
364define void @setnbc23(i64 %a) {
365; CHECK-LE-LABEL: setnbc23:
366; CHECK-LE:       # %bb.0: # %entry
367; CHECK-LE-NEXT:    cmpdi r3, 1
368; CHECK-LE-NEXT:    setnbc r3, gt
369; CHECK-LE-NEXT:    pstd r3, globalVal3@PCREL(0), 1
370; CHECK-LE-NEXT:    blr
371;
372; CHECK-BE-LABEL: setnbc23:
373; CHECK-BE:       # %bb.0: # %entry
374; CHECK-BE-NEXT:    addis r4, r2, .LC2@toc@ha
375; CHECK-BE-NEXT:    cmpdi r3, 1
376; CHECK-BE-NEXT:    ld r4, .LC2@toc@l(r4)
377; CHECK-BE-NEXT:    setnbc r3, gt
378; CHECK-BE-NEXT:    std r3, 0(r4)
379; CHECK-BE-NEXT:    blr
380entry:
381  %cmp = icmp sgt i64 %a, 1
382  %conv1 = sext i1 %cmp to i64
383  store i64 %conv1, i64* @globalVal3, align 8
384  ret void
385}
386
387define void @setnbc24(i16 %a) {
388; CHECK-LE-LABEL: setnbc24:
389; CHECK-LE:       # %bb.0: # %entry
390; CHECK-LE-NEXT:    extsh r3, r3
391; CHECK-LE-NEXT:    cmpwi r3, 1
392; CHECK-LE-NEXT:    setnbc r3, gt
393; CHECK-LE-NEXT:    psth r3, globalVal4@PCREL(0), 1
394; CHECK-LE-NEXT:    blr
395;
396; CHECK-BE-LABEL: setnbc24:
397; CHECK-BE:       # %bb.0: # %entry
398; CHECK-BE-NEXT:    addis r4, r2, .LC3@toc@ha
399; CHECK-BE-NEXT:    extsh r3, r3
400; CHECK-BE-NEXT:    ld r4, .LC3@toc@l(r4)
401; CHECK-BE-NEXT:    cmpwi r3, 1
402; CHECK-BE-NEXT:    setnbc r3, gt
403; CHECK-BE-NEXT:    sth r3, 0(r4)
404; CHECK-BE-NEXT:    blr
405entry:
406  %cmp = icmp sgt i16 %a, 1
407  %conv1 = sext i1 %cmp to i16
408  store i16 %conv1, i16* @globalVal4, align 2
409  ret void
410}
411
412define signext i32 @setnbc25(i8 %a) {
413; CHECK-LABEL: setnbc25:
414; CHECK:       # %bb.0: # %entry
415; CHECK-NEXT:    clrlwi r3, r3, 24
416; CHECK-NEXT:    cmpwi r3, 1
417; CHECK-NEXT:    setnbc r3, eq
418; CHECK-NEXT:    blr
419entry:
420  %cmp = icmp eq i8 %a, 1
421  %conv = sext i1 %cmp to i32
422  ret i32 %conv
423}
424
425define signext i32 @setnbc26(i32 %a) {
426; CHECK-LABEL: setnbc26:
427; CHECK:       # %bb.0: # %entry
428; CHECK-NEXT:    cmpwi r3, 1
429; CHECK-NEXT:    setnbc r3, eq
430; CHECK-NEXT:    blr
431entry:
432  %cmp = icmp eq i32 %a, 1
433  %conv = sext i1 %cmp to i32
434  ret i32 %conv
435}
436
437define signext i32 @setnbc27(i64 %a) {
438; CHECK-LABEL: setnbc27:
439; CHECK:       # %bb.0: # %entry
440; CHECK-NEXT:    cmpdi r3, 1
441; CHECK-NEXT:    setnbc r3, eq
442; CHECK-NEXT:    blr
443entry:
444  %cmp = icmp eq i64 %a, 1
445  %conv = sext i1 %cmp to i32
446  ret i32 %conv
447}
448
449define signext i32 @setnbc28(i16 %a) {
450; CHECK-LABEL: setnbc28:
451; CHECK:       # %bb.0: # %entry
452; CHECK-NEXT:    clrlwi r3, r3, 16
453; CHECK-NEXT:    cmpwi r3, 1
454; CHECK-NEXT:    setnbc r3, eq
455; CHECK-NEXT:    blr
456entry:
457  %cmp = icmp eq i16 %a, 1
458  %conv = sext i1 %cmp to i32
459  ret i32 %conv
460}
461
462define signext i64 @setnbc29(i8 %a) {
463; CHECK-LABEL: setnbc29:
464; CHECK:       # %bb.0: # %entry
465; CHECK-NEXT:    clrlwi r3, r3, 24
466; CHECK-NEXT:    cmpwi r3, 1
467; CHECK-NEXT:    setnbc r3, eq
468; CHECK-NEXT:    blr
469entry:
470  %cmp = icmp eq i8 %a, 1
471  %conv = sext i1 %cmp to i64
472  ret i64 %conv
473}
474
475define signext i64 @setnbc30(i32 %a) {
476; CHECK-LABEL: setnbc30:
477; CHECK:       # %bb.0: # %entry
478; CHECK-NEXT:    cmpwi r3, 1
479; CHECK-NEXT:    setnbc r3, eq
480; CHECK-NEXT:    blr
481entry:
482  %cmp = icmp eq i32 %a, 1
483  %conv = sext i1 %cmp to i64
484  ret i64 %conv
485}
486
487define signext i64 @setnbc31(i64 %a) {
488; CHECK-LABEL: setnbc31:
489; CHECK:       # %bb.0: # %entry
490; CHECK-NEXT:    cmpdi r3, 1
491; CHECK-NEXT:    setnbc r3, eq
492; CHECK-NEXT:    blr
493entry:
494  %cmp = icmp eq i64 %a, 1
495  %conv = sext i1 %cmp to i64
496  ret i64 %conv
497}
498
499define signext i64 @setnbc32(i16 %a) {
500; CHECK-LABEL: setnbc32:
501; CHECK:       # %bb.0: # %entry
502; CHECK-NEXT:    clrlwi r3, r3, 16
503; CHECK-NEXT:    cmpwi r3, 1
504; CHECK-NEXT:    setnbc r3, eq
505; CHECK-NEXT:    blr
506entry:
507  %cmp = icmp eq i16 %a, 1
508  %conv = sext i1 %cmp to i64
509  ret i64 %conv
510}
511
512define void @setnbc33(i8 %a) {
513; CHECK-LE-LABEL: setnbc33:
514; CHECK-LE:       # %bb.0: # %entry
515; CHECK-LE-NEXT:    clrlwi r3, r3, 24
516; CHECK-LE-NEXT:    cmpwi r3, 1
517; CHECK-LE-NEXT:    setnbc r3, eq
518; CHECK-LE-NEXT:    pstb r3, globalVal@PCREL(0), 1
519; CHECK-LE-NEXT:    blr
520;
521; CHECK-BE-LABEL: setnbc33:
522; CHECK-BE:       # %bb.0: # %entry
523; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
524; CHECK-BE-NEXT:    clrlwi r3, r3, 24
525; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
526; CHECK-BE-NEXT:    cmpwi r3, 1
527; CHECK-BE-NEXT:    setnbc r3, eq
528; CHECK-BE-NEXT:    stb r3, 0(r4)
529; CHECK-BE-NEXT:    blr
530entry:
531  %cmp = icmp eq i8 %a, 1
532  %conv1 = sext i1 %cmp to i8
533  store i8 %conv1, i8* @globalVal, align 1
534  ret void
535}
536
537define void @setnbc34(i32 %a) {
538; CHECK-LE-LABEL: setnbc34:
539; CHECK-LE:       # %bb.0: # %entry
540; CHECK-LE-NEXT:    cmpwi r3, 1
541; CHECK-LE-NEXT:    setnbc r3, eq
542; CHECK-LE-NEXT:    pstw r3, globalVal2@PCREL(0), 1
543; CHECK-LE-NEXT:    blr
544;
545; CHECK-BE-LABEL: setnbc34:
546; CHECK-BE:       # %bb.0: # %entry
547; CHECK-BE-NEXT:    addis r4, r2, .LC1@toc@ha
548; CHECK-BE-NEXT:    cmpwi r3, 1
549; CHECK-BE-NEXT:    ld r4, .LC1@toc@l(r4)
550; CHECK-BE-NEXT:    setnbc r3, eq
551; CHECK-BE-NEXT:    stw r3, 0(r4)
552; CHECK-BE-NEXT:    blr
553entry:
554  %cmp = icmp eq i32 %a, 1
555  %conv1 = sext i1 %cmp to i32
556  store i32 %conv1, i32* @globalVal2, align 4
557  ret void
558}
559
560define void @setnbc35(i64 %a) {
561; CHECK-LE-LABEL: setnbc35:
562; CHECK-LE:       # %bb.0: # %entry
563; CHECK-LE-NEXT:    cmpdi r3, 1
564; CHECK-LE-NEXT:    setnbc r3, eq
565; CHECK-LE-NEXT:    pstd r3, globalVal3@PCREL(0), 1
566; CHECK-LE-NEXT:    blr
567;
568; CHECK-BE-LABEL: setnbc35:
569; CHECK-BE:       # %bb.0: # %entry
570; CHECK-BE-NEXT:    addis r4, r2, .LC2@toc@ha
571; CHECK-BE-NEXT:    cmpdi r3, 1
572; CHECK-BE-NEXT:    ld r4, .LC2@toc@l(r4)
573; CHECK-BE-NEXT:    setnbc r3, eq
574; CHECK-BE-NEXT:    std r3, 0(r4)
575; CHECK-BE-NEXT:    blr
576entry:
577  %cmp = icmp eq i64 %a, 1
578  %conv1 = sext i1 %cmp to i64
579  store i64 %conv1, i64* @globalVal3, align 8
580  ret void
581}
582
583define void @setnbc36(i16 %a) {
584; CHECK-LE-LABEL: setnbc36:
585; CHECK-LE:       # %bb.0: # %entry
586; CHECK-LE-NEXT:    clrlwi r3, r3, 16
587; CHECK-LE-NEXT:    cmpwi r3, 1
588; CHECK-LE-NEXT:    setnbc r3, eq
589; CHECK-LE-NEXT:    psth r3, globalVal4@PCREL(0), 1
590; CHECK-LE-NEXT:    blr
591;
592; CHECK-BE-LABEL: setnbc36:
593; CHECK-BE:       # %bb.0: # %entry
594; CHECK-BE-NEXT:    addis r4, r2, .LC3@toc@ha
595; CHECK-BE-NEXT:    clrlwi r3, r3, 16
596; CHECK-BE-NEXT:    ld r4, .LC3@toc@l(r4)
597; CHECK-BE-NEXT:    cmpwi r3, 1
598; CHECK-BE-NEXT:    setnbc r3, eq
599; CHECK-BE-NEXT:    sth r3, 0(r4)
600; CHECK-BE-NEXT:    blr
601entry:
602  %cmp = icmp eq i16 %a, 1
603  %conv1 = sext i1 %cmp to i16
604  store i16 %conv1, i16* @globalVal4, align 2
605  ret void
606}
607
608define signext i32 @setnbc37(i64 %a) {
609; CHECK-LABEL: setnbc37:
610; CHECK:       # %bb.0: # %entry
611; CHECK-NEXT:    cmpldi r3, 1
612; CHECK-NEXT:    setnbc r3, gt
613; CHECK-NEXT:    blr
614entry:
615  %cmp = icmp ugt i64 %a, 1
616  %conv = sext i1 %cmp to i32
617  ret i32 %conv
618}
619
620define signext i64 @setnbc38(i64 %a) {
621; CHECK-LABEL: setnbc38:
622; CHECK:       # %bb.0: # %entry
623; CHECK-NEXT:    cmpldi r3, 1
624; CHECK-NEXT:    setnbc r3, gt
625; CHECK-NEXT:    blr
626entry:
627  %cmp = icmp ugt i64 %a, 1
628  %conv = sext i1 %cmp to i64
629  ret i64 %conv
630}
631
632define void @setnbc39(i64 %a) {
633; CHECK-LE-LABEL: setnbc39:
634; CHECK-LE:       # %bb.0: # %entry
635; CHECK-LE-NEXT:    cmpldi r3, 1
636; CHECK-LE-NEXT:    setnbc r3, gt
637; CHECK-LE-NEXT:    pstd r3, globalVal3@PCREL(0), 1
638; CHECK-LE-NEXT:    blr
639;
640; CHECK-BE-LABEL: setnbc39:
641; CHECK-BE:       # %bb.0: # %entry
642; CHECK-BE-NEXT:    addis r4, r2, .LC2@toc@ha
643; CHECK-BE-NEXT:    cmpldi r3, 1
644; CHECK-BE-NEXT:    ld r4, .LC2@toc@l(r4)
645; CHECK-BE-NEXT:    setnbc r3, gt
646; CHECK-BE-NEXT:    std r3, 0(r4)
647; CHECK-BE-NEXT:    blr
648entry:
649  %cmp = icmp ugt i64 %a, 1
650  %conv1 = sext i1 %cmp to i64
651  store i64 %conv1, i64* @globalVal3, align 8
652  ret void
653}
654
655define signext i32 @setnbc40(i8 %a) {
656; CHECK-LABEL: setnbc40:
657; CHECK:       # %bb.0: # %entry
658; CHECK-NEXT:    extsb. r3, r3
659; CHECK-NEXT:    setnbc r3, lt
660; CHECK-NEXT:    blr
661entry:
662  %cmp = icmp slt i8 %a, 0
663  %conv = sext i1 %cmp to i32
664  ret i32 %conv
665}
666
667define signext i32 @setnbc41(i32 %a) {
668; CHECK-LABEL: setnbc41:
669; CHECK:       # %bb.0: # %entry
670; CHECK-NEXT:    cmpwi r3, 0
671; CHECK-NEXT:    setnbc r3, lt
672; CHECK-NEXT:    blr
673entry:
674  %cmp = icmp slt i32 %a, 0
675  %conv = sext i1 %cmp to i32
676  ret i32 %conv
677}
678
679define signext i32 @setnbc42(i16 %a) {
680; CHECK-LABEL: setnbc42:
681; CHECK:       # %bb.0: # %entry
682; CHECK-NEXT:    extsh. r3, r3
683; CHECK-NEXT:    setnbc r3, lt
684; CHECK-NEXT:    blr
685entry:
686  %cmp = icmp slt i16 %a, 0
687  %conv = sext i1 %cmp to i32
688  ret i32 %conv
689}
690
691define signext i64 @setnbc43(i8 %a) {
692; CHECK-LABEL: setnbc43:
693; CHECK:       # %bb.0: # %entry
694; CHECK-NEXT:    extsb. r3, r3
695; CHECK-NEXT:    setnbc r3, lt
696; CHECK-NEXT:    blr
697entry:
698  %cmp = icmp slt i8 %a, 0
699  %conv = sext i1 %cmp to i64
700  ret i64 %conv
701}
702
703define signext i64 @setnbc44(i32 %a) {
704; CHECK-LABEL: setnbc44:
705; CHECK:       # %bb.0: # %entry
706; CHECK-NEXT:    cmpwi r3, 0
707; CHECK-NEXT:    setnbc r3, lt
708; CHECK-NEXT:    blr
709entry:
710  %cmp = icmp slt i32 %a, 0
711  %conv = sext i1 %cmp to i64
712  ret i64 %conv
713}
714
715define signext i64 @setnbc45(i16 %a) {
716; CHECK-LABEL: setnbc45:
717; CHECK:       # %bb.0: # %entry
718; CHECK-NEXT:    extsh. r3, r3
719; CHECK-NEXT:    setnbc r3, lt
720; CHECK-NEXT:    blr
721entry:
722  %cmp = icmp slt i16 %a, 0
723  %conv = sext i1 %cmp to i64
724  ret i64 %conv
725}
726
727define signext i32 @setnbc46(i8 %a) {
728; CHECK-LABEL: setnbc46:
729; CHECK:       # %bb.0: # %entry
730; CHECK-NEXT:    extsb. r3, r3
731; CHECK-NEXT:    setnbc r3, gt
732; CHECK-NEXT:    blr
733entry:
734  %cmp = icmp sgt i8 %a, 0
735  %conv = sext i1 %cmp to i32
736  ret i32 %conv
737}
738
739define signext i32 @setnbc47(i32 %a) {
740; CHECK-LABEL: setnbc47:
741; CHECK:       # %bb.0: # %entry
742; CHECK-NEXT:    cmpwi r3, 0
743; CHECK-NEXT:    setnbc r3, gt
744; CHECK-NEXT:    blr
745entry:
746  %cmp = icmp sgt i32 %a, 0
747  %conv = sext i1 %cmp to i32
748  ret i32 %conv
749}
750
751define signext i32 @setnbc48(i64 %a) {
752; CHECK-LABEL: setnbc48:
753; CHECK:       # %bb.0: # %entry
754; CHECK-NEXT:    cmpdi r3, 0
755; CHECK-NEXT:    setnbc r3, gt
756; CHECK-NEXT:    blr
757entry:
758  %cmp = icmp sgt i64 %a, 0
759  %conv = sext i1 %cmp to i32
760  ret i32 %conv
761}
762
763define signext i32 @setnbc49(i16 %a) {
764; CHECK-LABEL: setnbc49:
765; CHECK:       # %bb.0: # %entry
766; CHECK-NEXT:    extsh. r3, r3
767; CHECK-NEXT:    setnbc r3, gt
768; CHECK-NEXT:    blr
769entry:
770  %cmp = icmp sgt i16 %a, 0
771  %conv = sext i1 %cmp to i32
772  ret i32 %conv
773}
774
775define signext i64 @setnbc50(i8 %a) {
776; CHECK-LABEL: setnbc50:
777; CHECK:       # %bb.0: # %entry
778; CHECK-NEXT:    extsb. r3, r3
779; CHECK-NEXT:    setnbc r3, gt
780; CHECK-NEXT:    blr
781entry:
782  %cmp = icmp sgt i8 %a, 0
783  %conv = sext i1 %cmp to i64
784  ret i64 %conv
785}
786
787define signext i64 @setnbc51(i32 %a) {
788; CHECK-LABEL: setnbc51:
789; CHECK:       # %bb.0: # %entry
790; CHECK-NEXT:    cmpwi r3, 0
791; CHECK-NEXT:    setnbc r3, gt
792; CHECK-NEXT:    blr
793entry:
794  %cmp = icmp sgt i32 %a, 0
795  %conv = sext i1 %cmp to i64
796  ret i64 %conv
797}
798
799define signext i64 @setnbc52(i64 %a) {
800; CHECK-LABEL: setnbc52:
801; CHECK:       # %bb.0: # %entry
802; CHECK-NEXT:    cmpdi r3, 0
803; CHECK-NEXT:    setnbc r3, gt
804; CHECK-NEXT:    blr
805entry:
806  %cmp = icmp sgt i64 %a, 0
807  %conv = sext i1 %cmp to i64
808  ret i64 %conv
809}
810
811define signext i64 @setnbc53(i16 %a) {
812; CHECK-LABEL: setnbc53:
813; CHECK:       # %bb.0: # %entry
814; CHECK-NEXT:    extsh. r3, r3
815; CHECK-NEXT:    setnbc r3, gt
816; CHECK-NEXT:    blr
817entry:
818  %cmp = icmp sgt i16 %a, 0
819  %conv = sext i1 %cmp to i64
820  ret i64 %conv
821}
822
823define void @setnbc54(i8 %a) {
824; CHECK-LE-LABEL: setnbc54:
825; CHECK-LE:       # %bb.0: # %entry
826; CHECK-LE-NEXT:    extsb. r3, r3
827; CHECK-LE-NEXT:    setnbc r3, gt
828; CHECK-LE-NEXT:    pstb r3, globalVal@PCREL(0), 1
829; CHECK-LE-NEXT:    blr
830;
831; CHECK-BE-LABEL: setnbc54:
832; CHECK-BE:       # %bb.0: # %entry
833; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
834; CHECK-BE-NEXT:    extsb. r3, r3
835; CHECK-BE-NEXT:    setnbc r3, gt
836; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
837; CHECK-BE-NEXT:    stb r3, 0(r4)
838; CHECK-BE-NEXT:    blr
839entry:
840  %cmp = icmp sgt i8 %a, 0
841  %conv1 = sext i1 %cmp to i8
842  store i8 %conv1, i8* @globalVal, align 1
843  ret void
844}
845
846define void @setnbc55(i32 %a) {
847; CHECK-LE-LABEL: setnbc55:
848; CHECK-LE:       # %bb.0: # %entry
849; CHECK-LE-NEXT:    cmpwi r3, 0
850; CHECK-LE-NEXT:    setnbc r3, gt
851; CHECK-LE-NEXT:    pstw r3, globalVal2@PCREL(0), 1
852; CHECK-LE-NEXT:    blr
853;
854; CHECK-BE-LABEL: setnbc55:
855; CHECK-BE:       # %bb.0: # %entry
856; CHECK-BE-NEXT:    addis r4, r2, .LC1@toc@ha
857; CHECK-BE-NEXT:    cmpwi r3, 0
858; CHECK-BE-NEXT:    ld r4, .LC1@toc@l(r4)
859; CHECK-BE-NEXT:    setnbc r3, gt
860; CHECK-BE-NEXT:    stw r3, 0(r4)
861; CHECK-BE-NEXT:    blr
862entry:
863  %cmp = icmp sgt i32 %a, 0
864  %conv1 = sext i1 %cmp to i32
865  store i32 %conv1, i32* @globalVal2, align 4
866  ret void
867}
868
869define void @setnbc56(i64 %a) {
870; CHECK-LE-LABEL: setnbc56:
871; CHECK-LE:       # %bb.0: # %entry
872; CHECK-LE-NEXT:    cmpdi r3, 0
873; CHECK-LE-NEXT:    setnbc r3, gt
874; CHECK-LE-NEXT:    pstd r3, globalVal3@PCREL(0), 1
875; CHECK-LE-NEXT:    blr
876;
877; CHECK-BE-LABEL: setnbc56:
878; CHECK-BE:       # %bb.0: # %entry
879; CHECK-BE-NEXT:    addis r4, r2, .LC2@toc@ha
880; CHECK-BE-NEXT:    cmpdi r3, 0
881; CHECK-BE-NEXT:    ld r4, .LC2@toc@l(r4)
882; CHECK-BE-NEXT:    setnbc r3, gt
883; CHECK-BE-NEXT:    std r3, 0(r4)
884; CHECK-BE-NEXT:    blr
885entry:
886  %cmp = icmp sgt i64 %a, 0
887  %conv1 = sext i1 %cmp to i64
888  store i64 %conv1, i64* @globalVal3, align 8
889  ret void
890}
891
892define void @setnbc57(i16 %a) {
893; CHECK-LE-LABEL: setnbc57:
894; CHECK-LE:       # %bb.0: # %entry
895; CHECK-LE-NEXT:    extsh. r3, r3
896; CHECK-LE-NEXT:    setnbc r3, gt
897; CHECK-LE-NEXT:    psth r3, globalVal4@PCREL(0), 1
898; CHECK-LE-NEXT:    blr
899;
900; CHECK-BE-LABEL: setnbc57:
901; CHECK-BE:       # %bb.0: # %entry
902; CHECK-BE-NEXT:    addis r4, r2, .LC3@toc@ha
903; CHECK-BE-NEXT:    extsh. r3, r3
904; CHECK-BE-NEXT:    setnbc r3, gt
905; CHECK-BE-NEXT:    ld r4, .LC3@toc@l(r4)
906; CHECK-BE-NEXT:    sth r3, 0(r4)
907; CHECK-BE-NEXT:    blr
908entry:
909  %cmp = icmp sgt i16 %a, 0
910  %conv1 = sext i1 %cmp to i16
911  store i16 %conv1, i16* @globalVal4, align 2
912  ret void
913}
914
915define signext i32 @setnbc58(i8 %a) {
916; CHECK-LABEL: setnbc58:
917; CHECK:       # %bb.0: # %entry
918; CHECK-NEXT:    andi. r3, r3, 255
919; CHECK-NEXT:    setnbc r3, eq
920; CHECK-NEXT:    blr
921entry:
922  %cmp = icmp eq i8 %a, 0
923  %conv = sext i1 %cmp to i32
924  ret i32 %conv
925}
926
927define signext i32 @setnbc59(i32 %a) {
928; CHECK-LABEL: setnbc59:
929; CHECK:       # %bb.0: # %entry
930; CHECK-NEXT:    cmpwi r3, 0
931; CHECK-NEXT:    setnbc r3, eq
932; CHECK-NEXT:    blr
933entry:
934  %cmp = icmp eq i32 %a, 0
935  %conv = sext i1 %cmp to i32
936  ret i32 %conv
937}
938
939define signext i32 @setnbc60(i64 %a) {
940; CHECK-LABEL: setnbc60:
941; CHECK:       # %bb.0: # %entry
942; CHECK-NEXT:    cmpdi r3, 0
943; CHECK-NEXT:    setnbc r3, eq
944; CHECK-NEXT:    blr
945entry:
946  %cmp = icmp eq i64 %a, 0
947  %conv = sext i1 %cmp to i32
948  ret i32 %conv
949}
950
951define signext i32 @setnbc61(i16 %a) {
952; CHECK-LABEL: setnbc61:
953; CHECK:       # %bb.0: # %entry
954; CHECK-NEXT:    andi. r3, r3, 65535
955; CHECK-NEXT:    setnbc r3, eq
956; CHECK-NEXT:    blr
957entry:
958  %cmp = icmp eq i16 %a, 0
959  %conv = sext i1 %cmp to i32
960  ret i32 %conv
961}
962
963define signext i64 @setnbc62(i8 %a) {
964; CHECK-LABEL: setnbc62:
965; CHECK:       # %bb.0: # %entry
966; CHECK-NEXT:    andi. r3, r3, 255
967; CHECK-NEXT:    setnbc r3, eq
968; CHECK-NEXT:    blr
969entry:
970  %cmp = icmp eq i8 %a, 0
971  %conv = sext i1 %cmp to i64
972  ret i64 %conv
973}
974
975define signext i64 @setnbc63(i32 %a) {
976; CHECK-LABEL: setnbc63:
977; CHECK:       # %bb.0: # %entry
978; CHECK-NEXT:    cmpwi r3, 0
979; CHECK-NEXT:    setnbc r3, eq
980; CHECK-NEXT:    blr
981entry:
982  %cmp = icmp eq i32 %a, 0
983  %conv = sext i1 %cmp to i64
984  ret i64 %conv
985}
986
987define signext i64 @setnbc64(i64 %a) {
988; CHECK-LABEL: setnbc64:
989; CHECK:       # %bb.0: # %entry
990; CHECK-NEXT:    cmpdi r3, 0
991; CHECK-NEXT:    setnbc r3, eq
992; CHECK-NEXT:    blr
993entry:
994  %cmp = icmp eq i64 %a, 0
995  %conv = sext i1 %cmp to i64
996  ret i64 %conv
997}
998
999define signext i64 @setnbc65(i16 %a) {
1000; CHECK-LABEL: setnbc65:
1001; CHECK:       # %bb.0: # %entry
1002; CHECK-NEXT:    andi. r3, r3, 65535
1003; CHECK-NEXT:    setnbc r3, eq
1004; CHECK-NEXT:    blr
1005entry:
1006  %cmp = icmp eq i16 %a, 0
1007  %conv = sext i1 %cmp to i64
1008  ret i64 %conv
1009}
1010
1011define void @setnbc66(i8 %a) {
1012; CHECK-LE-LABEL: setnbc66:
1013; CHECK-LE:       # %bb.0: # %entry
1014; CHECK-LE-NEXT:    andi. r3, r3, 255
1015; CHECK-LE-NEXT:    setnbc r3, eq
1016; CHECK-LE-NEXT:    pstb r3, globalVal@PCREL(0), 1
1017; CHECK-LE-NEXT:    blr
1018;
1019; CHECK-BE-LABEL: setnbc66:
1020; CHECK-BE:       # %bb.0: # %entry
1021; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
1022; CHECK-BE-NEXT:    andi. r3, r3, 255
1023; CHECK-BE-NEXT:    setnbc r3, eq
1024; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
1025; CHECK-BE-NEXT:    stb r3, 0(r4)
1026; CHECK-BE-NEXT:    blr
1027entry:
1028  %cmp = icmp eq i8 %a, 0
1029  %conv1 = sext i1 %cmp to i8
1030  store i8 %conv1, i8* @globalVal, align 1
1031  ret void
1032}
1033
1034define void @setnbc67(i32 %a) {
1035; CHECK-LE-LABEL: setnbc67:
1036; CHECK-LE:       # %bb.0: # %entry
1037; CHECK-LE-NEXT:    cmpwi r3, 0
1038; CHECK-LE-NEXT:    setnbc r3, eq
1039; CHECK-LE-NEXT:    pstw r3, globalVal2@PCREL(0), 1
1040; CHECK-LE-NEXT:    blr
1041;
1042; CHECK-BE-LABEL: setnbc67:
1043; CHECK-BE:       # %bb.0: # %entry
1044; CHECK-BE-NEXT:    addis r4, r2, .LC1@toc@ha
1045; CHECK-BE-NEXT:    cmpwi r3, 0
1046; CHECK-BE-NEXT:    ld r4, .LC1@toc@l(r4)
1047; CHECK-BE-NEXT:    setnbc r3, eq
1048; CHECK-BE-NEXT:    stw r3, 0(r4)
1049; CHECK-BE-NEXT:    blr
1050entry:
1051  %cmp = icmp eq i32 %a, 0
1052  %conv1 = sext i1 %cmp to i32
1053  store i32 %conv1, i32* @globalVal2, align 4
1054  ret void
1055}
1056
1057define void @setnbc68(i64 %a) {
1058; CHECK-LE-LABEL: setnbc68:
1059; CHECK-LE:       # %bb.0: # %entry
1060; CHECK-LE-NEXT:    cmpdi r3, 0
1061; CHECK-LE-NEXT:    setnbc r3, eq
1062; CHECK-LE-NEXT:    pstd r3, globalVal3@PCREL(0), 1
1063; CHECK-LE-NEXT:    blr
1064;
1065; CHECK-BE-LABEL: setnbc68:
1066; CHECK-BE:       # %bb.0: # %entry
1067; CHECK-BE-NEXT:    addis r4, r2, .LC2@toc@ha
1068; CHECK-BE-NEXT:    cmpdi r3, 0
1069; CHECK-BE-NEXT:    ld r4, .LC2@toc@l(r4)
1070; CHECK-BE-NEXT:    setnbc r3, eq
1071; CHECK-BE-NEXT:    std r3, 0(r4)
1072; CHECK-BE-NEXT:    blr
1073entry:
1074  %cmp = icmp eq i64 %a, 0
1075  %conv1 = sext i1 %cmp to i64
1076  store i64 %conv1, i64* @globalVal3, align 8
1077  ret void
1078}
1079
1080define void @setnbc69(i16 %a) {
1081; CHECK-LE-LABEL: setnbc69:
1082; CHECK-LE:       # %bb.0: # %entry
1083; CHECK-LE-NEXT:    andi. r3, r3, 65535
1084; CHECK-LE-NEXT:    setnbc r3, eq
1085; CHECK-LE-NEXT:    psth r3, globalVal4@PCREL(0), 1
1086; CHECK-LE-NEXT:    blr
1087;
1088; CHECK-BE-LABEL: setnbc69:
1089; CHECK-BE:       # %bb.0: # %entry
1090; CHECK-BE-NEXT:    addis r4, r2, .LC3@toc@ha
1091; CHECK-BE-NEXT:    andi. r3, r3, 65535
1092; CHECK-BE-NEXT:    setnbc r3, eq
1093; CHECK-BE-NEXT:    ld r4, .LC3@toc@l(r4)
1094; CHECK-BE-NEXT:    sth r3, 0(r4)
1095; CHECK-BE-NEXT:    blr
1096entry:
1097  %cmp = icmp eq i16 %a, 0
1098  %conv1 = sext i1 %cmp to i16
1099  store i16 %conv1, i16* @globalVal4, align 2
1100  ret void
1101}
1102
1103