1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs -filetype=obj < %s \
3; RUN:   -o /dev/null 2>&1
4; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs \
5; RUN:   -filetype=obj < %s -o /dev/null 2>&1
6; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s | FileCheck %s
7; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \
8; RUN:   | FileCheck %s
9
10define void @relax_bcc(i1 %a) nounwind {
11; CHECK-LABEL: relax_bcc:
12; CHECK:       # %bb.0:
13; CHECK-NEXT:    andi a0, a0, 1
14; CHECK-NEXT:    bnez a0, .LBB0_1
15; CHECK-NEXT:    j .LBB0_2
16; CHECK-NEXT:  .LBB0_1: # %iftrue
17; CHECK-NEXT:    #APP
18; CHECK-NEXT:    .zero 4096
19; CHECK-NEXT:    #NO_APP
20; CHECK-NEXT:  .LBB0_2: # %tail
21; CHECK-NEXT:    ret
22  br i1 %a, label %iftrue, label %tail
23
24iftrue:
25  call void asm sideeffect ".space 4096", ""()
26  br label %tail
27
28tail:
29  ret void
30}
31
32define i32 @relax_jal(i1 %a) nounwind {
33; CHECK-LABEL: relax_jal:
34; CHECK:       # %bb.0:
35; CHECK-NEXT:    andi a0, a0, 1
36; CHECK-NEXT:    bnez a0, .LBB1_1
37; CHECK-NEXT:  # %bb.3:
38; CHECK-NEXT:    jump .LBB1_2, a0
39; CHECK-NEXT:  .LBB1_1: # %iftrue
40; CHECK-NEXT:    #APP
41; CHECK-NEXT:    #NO_APP
42; CHECK-NEXT:    #APP
43; CHECK-NEXT:    .zero 1048576
44; CHECK-NEXT:    #NO_APP
45; CHECK-NEXT:    addi a0, zero, 1
46; CHECK-NEXT:    ret
47; CHECK-NEXT:  .LBB1_2: # %jmp
48; CHECK-NEXT:    #APP
49; CHECK-NEXT:    #NO_APP
50; CHECK-NEXT:    addi a0, zero, 1
51; CHECK-NEXT:    ret
52  br i1 %a, label %iftrue, label %jmp
53
54jmp:
55  call void asm sideeffect "", ""()
56  br label %tail
57
58iftrue:
59  call void asm sideeffect "", ""()
60  br label %space
61
62space:
63  call void asm sideeffect ".space 1048576", ""()
64  br label %tail
65
66tail:
67  ret i32 1
68}
69