1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \ 3; RUN: | FileCheck %s -check-prefix=ILP32 4; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \ 5; RUN: | FileCheck %s -check-prefix=LP64 6; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs < %s \ 7; RUN: | FileCheck %s -check-prefix=ILP32D 8; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d -verify-machineinstrs < %s \ 9; RUN: | FileCheck %s -check-prefix=LP64D 10 11@var = global [32 x double] zeroinitializer 12 13; All floating point registers are temporaries for the ilp32 and lp64 ABIs. 14; fs0-fs11 are callee-saved for the ilp32f, ilp32d, lp64f, and lp64d ABIs. 15 16; This function tests that RISCVRegisterInfo::getCalleeSavedRegs returns 17; something appropriate. 18 19define void @callee() nounwind { 20; ILP32-LABEL: callee: 21; ILP32: # %bb.0: 22; ILP32-NEXT: lui a0, %hi(var) 23; ILP32-NEXT: fld ft0, %lo(var)(a0) 24; ILP32-NEXT: fld ft1, %lo(var+8)(a0) 25; ILP32-NEXT: addi a1, a0, %lo(var) 26; ILP32-NEXT: fld ft2, 16(a1) 27; ILP32-NEXT: fld ft3, 24(a1) 28; ILP32-NEXT: fld ft4, 32(a1) 29; ILP32-NEXT: fld ft5, 40(a1) 30; ILP32-NEXT: fld ft6, 48(a1) 31; ILP32-NEXT: fld ft7, 56(a1) 32; ILP32-NEXT: fld fa0, 64(a1) 33; ILP32-NEXT: fld fa1, 72(a1) 34; ILP32-NEXT: fld fa2, 80(a1) 35; ILP32-NEXT: fld fa3, 88(a1) 36; ILP32-NEXT: fld fa4, 96(a1) 37; ILP32-NEXT: fld fa5, 104(a1) 38; ILP32-NEXT: fld fa6, 112(a1) 39; ILP32-NEXT: fld fa7, 120(a1) 40; ILP32-NEXT: fld ft8, 128(a1) 41; ILP32-NEXT: fld ft9, 136(a1) 42; ILP32-NEXT: fld ft10, 144(a1) 43; ILP32-NEXT: fld ft11, 152(a1) 44; ILP32-NEXT: fld fs0, 160(a1) 45; ILP32-NEXT: fld fs1, 168(a1) 46; ILP32-NEXT: fld fs2, 176(a1) 47; ILP32-NEXT: fld fs3, 184(a1) 48; ILP32-NEXT: fld fs4, 192(a1) 49; ILP32-NEXT: fld fs5, 200(a1) 50; ILP32-NEXT: fld fs6, 208(a1) 51; ILP32-NEXT: fld fs7, 216(a1) 52; ILP32-NEXT: fld fs8, 248(a1) 53; ILP32-NEXT: fld fs9, 240(a1) 54; ILP32-NEXT: fld fs10, 232(a1) 55; ILP32-NEXT: fld fs11, 224(a1) 56; ILP32-NEXT: fsd fs8, 248(a1) 57; ILP32-NEXT: fsd fs9, 240(a1) 58; ILP32-NEXT: fsd fs10, 232(a1) 59; ILP32-NEXT: fsd fs11, 224(a1) 60; ILP32-NEXT: fsd fs7, 216(a1) 61; ILP32-NEXT: fsd fs6, 208(a1) 62; ILP32-NEXT: fsd fs5, 200(a1) 63; ILP32-NEXT: fsd fs4, 192(a1) 64; ILP32-NEXT: fsd fs3, 184(a1) 65; ILP32-NEXT: fsd fs2, 176(a1) 66; ILP32-NEXT: fsd fs1, 168(a1) 67; ILP32-NEXT: fsd fs0, 160(a1) 68; ILP32-NEXT: fsd ft11, 152(a1) 69; ILP32-NEXT: fsd ft10, 144(a1) 70; ILP32-NEXT: fsd ft9, 136(a1) 71; ILP32-NEXT: fsd ft8, 128(a1) 72; ILP32-NEXT: fsd fa7, 120(a1) 73; ILP32-NEXT: fsd fa6, 112(a1) 74; ILP32-NEXT: fsd fa5, 104(a1) 75; ILP32-NEXT: fsd fa4, 96(a1) 76; ILP32-NEXT: fsd fa3, 88(a1) 77; ILP32-NEXT: fsd fa2, 80(a1) 78; ILP32-NEXT: fsd fa1, 72(a1) 79; ILP32-NEXT: fsd fa0, 64(a1) 80; ILP32-NEXT: fsd ft7, 56(a1) 81; ILP32-NEXT: fsd ft6, 48(a1) 82; ILP32-NEXT: fsd ft5, 40(a1) 83; ILP32-NEXT: fsd ft4, 32(a1) 84; ILP32-NEXT: fsd ft3, 24(a1) 85; ILP32-NEXT: fsd ft2, 16(a1) 86; ILP32-NEXT: fsd ft1, %lo(var+8)(a0) 87; ILP32-NEXT: fsd ft0, %lo(var)(a0) 88; ILP32-NEXT: ret 89; 90; LP64-LABEL: callee: 91; LP64: # %bb.0: 92; LP64-NEXT: lui a0, %hi(var) 93; LP64-NEXT: fld ft0, %lo(var)(a0) 94; LP64-NEXT: fld ft1, %lo(var+8)(a0) 95; LP64-NEXT: addi a1, a0, %lo(var) 96; LP64-NEXT: fld ft2, 16(a1) 97; LP64-NEXT: fld ft3, 24(a1) 98; LP64-NEXT: fld ft4, 32(a1) 99; LP64-NEXT: fld ft5, 40(a1) 100; LP64-NEXT: fld ft6, 48(a1) 101; LP64-NEXT: fld ft7, 56(a1) 102; LP64-NEXT: fld fa0, 64(a1) 103; LP64-NEXT: fld fa1, 72(a1) 104; LP64-NEXT: fld fa2, 80(a1) 105; LP64-NEXT: fld fa3, 88(a1) 106; LP64-NEXT: fld fa4, 96(a1) 107; LP64-NEXT: fld fa5, 104(a1) 108; LP64-NEXT: fld fa6, 112(a1) 109; LP64-NEXT: fld fa7, 120(a1) 110; LP64-NEXT: fld ft8, 128(a1) 111; LP64-NEXT: fld ft9, 136(a1) 112; LP64-NEXT: fld ft10, 144(a1) 113; LP64-NEXT: fld ft11, 152(a1) 114; LP64-NEXT: fld fs0, 160(a1) 115; LP64-NEXT: fld fs1, 168(a1) 116; LP64-NEXT: fld fs2, 176(a1) 117; LP64-NEXT: fld fs3, 184(a1) 118; LP64-NEXT: fld fs4, 192(a1) 119; LP64-NEXT: fld fs5, 200(a1) 120; LP64-NEXT: fld fs6, 208(a1) 121; LP64-NEXT: fld fs7, 216(a1) 122; LP64-NEXT: fld fs8, 248(a1) 123; LP64-NEXT: fld fs9, 240(a1) 124; LP64-NEXT: fld fs10, 232(a1) 125; LP64-NEXT: fld fs11, 224(a1) 126; LP64-NEXT: fsd fs8, 248(a1) 127; LP64-NEXT: fsd fs9, 240(a1) 128; LP64-NEXT: fsd fs10, 232(a1) 129; LP64-NEXT: fsd fs11, 224(a1) 130; LP64-NEXT: fsd fs7, 216(a1) 131; LP64-NEXT: fsd fs6, 208(a1) 132; LP64-NEXT: fsd fs5, 200(a1) 133; LP64-NEXT: fsd fs4, 192(a1) 134; LP64-NEXT: fsd fs3, 184(a1) 135; LP64-NEXT: fsd fs2, 176(a1) 136; LP64-NEXT: fsd fs1, 168(a1) 137; LP64-NEXT: fsd fs0, 160(a1) 138; LP64-NEXT: fsd ft11, 152(a1) 139; LP64-NEXT: fsd ft10, 144(a1) 140; LP64-NEXT: fsd ft9, 136(a1) 141; LP64-NEXT: fsd ft8, 128(a1) 142; LP64-NEXT: fsd fa7, 120(a1) 143; LP64-NEXT: fsd fa6, 112(a1) 144; LP64-NEXT: fsd fa5, 104(a1) 145; LP64-NEXT: fsd fa4, 96(a1) 146; LP64-NEXT: fsd fa3, 88(a1) 147; LP64-NEXT: fsd fa2, 80(a1) 148; LP64-NEXT: fsd fa1, 72(a1) 149; LP64-NEXT: fsd fa0, 64(a1) 150; LP64-NEXT: fsd ft7, 56(a1) 151; LP64-NEXT: fsd ft6, 48(a1) 152; LP64-NEXT: fsd ft5, 40(a1) 153; LP64-NEXT: fsd ft4, 32(a1) 154; LP64-NEXT: fsd ft3, 24(a1) 155; LP64-NEXT: fsd ft2, 16(a1) 156; LP64-NEXT: fsd ft1, %lo(var+8)(a0) 157; LP64-NEXT: fsd ft0, %lo(var)(a0) 158; LP64-NEXT: ret 159; 160; ILP32D-LABEL: callee: 161; ILP32D: # %bb.0: 162; ILP32D-NEXT: addi sp, sp, -96 163; ILP32D-NEXT: fsd fs0, 88(sp) 164; ILP32D-NEXT: fsd fs1, 80(sp) 165; ILP32D-NEXT: fsd fs2, 72(sp) 166; ILP32D-NEXT: fsd fs3, 64(sp) 167; ILP32D-NEXT: fsd fs4, 56(sp) 168; ILP32D-NEXT: fsd fs5, 48(sp) 169; ILP32D-NEXT: fsd fs6, 40(sp) 170; ILP32D-NEXT: fsd fs7, 32(sp) 171; ILP32D-NEXT: fsd fs8, 24(sp) 172; ILP32D-NEXT: fsd fs9, 16(sp) 173; ILP32D-NEXT: fsd fs10, 8(sp) 174; ILP32D-NEXT: fsd fs11, 0(sp) 175; ILP32D-NEXT: lui a0, %hi(var) 176; ILP32D-NEXT: fld ft0, %lo(var)(a0) 177; ILP32D-NEXT: fld ft1, %lo(var+8)(a0) 178; ILP32D-NEXT: addi a1, a0, %lo(var) 179; ILP32D-NEXT: fld ft2, 16(a1) 180; ILP32D-NEXT: fld ft3, 24(a1) 181; ILP32D-NEXT: fld ft4, 32(a1) 182; ILP32D-NEXT: fld ft5, 40(a1) 183; ILP32D-NEXT: fld ft6, 48(a1) 184; ILP32D-NEXT: fld ft7, 56(a1) 185; ILP32D-NEXT: fld fa0, 64(a1) 186; ILP32D-NEXT: fld fa1, 72(a1) 187; ILP32D-NEXT: fld fa2, 80(a1) 188; ILP32D-NEXT: fld fa3, 88(a1) 189; ILP32D-NEXT: fld fa4, 96(a1) 190; ILP32D-NEXT: fld fa5, 104(a1) 191; ILP32D-NEXT: fld fa6, 112(a1) 192; ILP32D-NEXT: fld fa7, 120(a1) 193; ILP32D-NEXT: fld ft8, 128(a1) 194; ILP32D-NEXT: fld ft9, 136(a1) 195; ILP32D-NEXT: fld ft10, 144(a1) 196; ILP32D-NEXT: fld ft11, 152(a1) 197; ILP32D-NEXT: fld fs0, 160(a1) 198; ILP32D-NEXT: fld fs1, 168(a1) 199; ILP32D-NEXT: fld fs2, 176(a1) 200; ILP32D-NEXT: fld fs3, 184(a1) 201; ILP32D-NEXT: fld fs4, 192(a1) 202; ILP32D-NEXT: fld fs5, 200(a1) 203; ILP32D-NEXT: fld fs6, 208(a1) 204; ILP32D-NEXT: fld fs7, 216(a1) 205; ILP32D-NEXT: fld fs8, 248(a1) 206; ILP32D-NEXT: fld fs9, 240(a1) 207; ILP32D-NEXT: fld fs10, 232(a1) 208; ILP32D-NEXT: fld fs11, 224(a1) 209; ILP32D-NEXT: fsd fs8, 248(a1) 210; ILP32D-NEXT: fsd fs9, 240(a1) 211; ILP32D-NEXT: fsd fs10, 232(a1) 212; ILP32D-NEXT: fsd fs11, 224(a1) 213; ILP32D-NEXT: fsd fs7, 216(a1) 214; ILP32D-NEXT: fsd fs6, 208(a1) 215; ILP32D-NEXT: fsd fs5, 200(a1) 216; ILP32D-NEXT: fsd fs4, 192(a1) 217; ILP32D-NEXT: fsd fs3, 184(a1) 218; ILP32D-NEXT: fsd fs2, 176(a1) 219; ILP32D-NEXT: fsd fs1, 168(a1) 220; ILP32D-NEXT: fsd fs0, 160(a1) 221; ILP32D-NEXT: fsd ft11, 152(a1) 222; ILP32D-NEXT: fsd ft10, 144(a1) 223; ILP32D-NEXT: fsd ft9, 136(a1) 224; ILP32D-NEXT: fsd ft8, 128(a1) 225; ILP32D-NEXT: fsd fa7, 120(a1) 226; ILP32D-NEXT: fsd fa6, 112(a1) 227; ILP32D-NEXT: fsd fa5, 104(a1) 228; ILP32D-NEXT: fsd fa4, 96(a1) 229; ILP32D-NEXT: fsd fa3, 88(a1) 230; ILP32D-NEXT: fsd fa2, 80(a1) 231; ILP32D-NEXT: fsd fa1, 72(a1) 232; ILP32D-NEXT: fsd fa0, 64(a1) 233; ILP32D-NEXT: fsd ft7, 56(a1) 234; ILP32D-NEXT: fsd ft6, 48(a1) 235; ILP32D-NEXT: fsd ft5, 40(a1) 236; ILP32D-NEXT: fsd ft4, 32(a1) 237; ILP32D-NEXT: fsd ft3, 24(a1) 238; ILP32D-NEXT: fsd ft2, 16(a1) 239; ILP32D-NEXT: fsd ft1, %lo(var+8)(a0) 240; ILP32D-NEXT: fsd ft0, %lo(var)(a0) 241; ILP32D-NEXT: fld fs11, 0(sp) 242; ILP32D-NEXT: fld fs10, 8(sp) 243; ILP32D-NEXT: fld fs9, 16(sp) 244; ILP32D-NEXT: fld fs8, 24(sp) 245; ILP32D-NEXT: fld fs7, 32(sp) 246; ILP32D-NEXT: fld fs6, 40(sp) 247; ILP32D-NEXT: fld fs5, 48(sp) 248; ILP32D-NEXT: fld fs4, 56(sp) 249; ILP32D-NEXT: fld fs3, 64(sp) 250; ILP32D-NEXT: fld fs2, 72(sp) 251; ILP32D-NEXT: fld fs1, 80(sp) 252; ILP32D-NEXT: fld fs0, 88(sp) 253; ILP32D-NEXT: addi sp, sp, 96 254; ILP32D-NEXT: ret 255; 256; LP64D-LABEL: callee: 257; LP64D: # %bb.0: 258; LP64D-NEXT: addi sp, sp, -96 259; LP64D-NEXT: fsd fs0, 88(sp) 260; LP64D-NEXT: fsd fs1, 80(sp) 261; LP64D-NEXT: fsd fs2, 72(sp) 262; LP64D-NEXT: fsd fs3, 64(sp) 263; LP64D-NEXT: fsd fs4, 56(sp) 264; LP64D-NEXT: fsd fs5, 48(sp) 265; LP64D-NEXT: fsd fs6, 40(sp) 266; LP64D-NEXT: fsd fs7, 32(sp) 267; LP64D-NEXT: fsd fs8, 24(sp) 268; LP64D-NEXT: fsd fs9, 16(sp) 269; LP64D-NEXT: fsd fs10, 8(sp) 270; LP64D-NEXT: fsd fs11, 0(sp) 271; LP64D-NEXT: lui a0, %hi(var) 272; LP64D-NEXT: fld ft0, %lo(var)(a0) 273; LP64D-NEXT: fld ft1, %lo(var+8)(a0) 274; LP64D-NEXT: addi a1, a0, %lo(var) 275; LP64D-NEXT: fld ft2, 16(a1) 276; LP64D-NEXT: fld ft3, 24(a1) 277; LP64D-NEXT: fld ft4, 32(a1) 278; LP64D-NEXT: fld ft5, 40(a1) 279; LP64D-NEXT: fld ft6, 48(a1) 280; LP64D-NEXT: fld ft7, 56(a1) 281; LP64D-NEXT: fld fa0, 64(a1) 282; LP64D-NEXT: fld fa1, 72(a1) 283; LP64D-NEXT: fld fa2, 80(a1) 284; LP64D-NEXT: fld fa3, 88(a1) 285; LP64D-NEXT: fld fa4, 96(a1) 286; LP64D-NEXT: fld fa5, 104(a1) 287; LP64D-NEXT: fld fa6, 112(a1) 288; LP64D-NEXT: fld fa7, 120(a1) 289; LP64D-NEXT: fld ft8, 128(a1) 290; LP64D-NEXT: fld ft9, 136(a1) 291; LP64D-NEXT: fld ft10, 144(a1) 292; LP64D-NEXT: fld ft11, 152(a1) 293; LP64D-NEXT: fld fs0, 160(a1) 294; LP64D-NEXT: fld fs1, 168(a1) 295; LP64D-NEXT: fld fs2, 176(a1) 296; LP64D-NEXT: fld fs3, 184(a1) 297; LP64D-NEXT: fld fs4, 192(a1) 298; LP64D-NEXT: fld fs5, 200(a1) 299; LP64D-NEXT: fld fs6, 208(a1) 300; LP64D-NEXT: fld fs7, 216(a1) 301; LP64D-NEXT: fld fs8, 248(a1) 302; LP64D-NEXT: fld fs9, 240(a1) 303; LP64D-NEXT: fld fs10, 232(a1) 304; LP64D-NEXT: fld fs11, 224(a1) 305; LP64D-NEXT: fsd fs8, 248(a1) 306; LP64D-NEXT: fsd fs9, 240(a1) 307; LP64D-NEXT: fsd fs10, 232(a1) 308; LP64D-NEXT: fsd fs11, 224(a1) 309; LP64D-NEXT: fsd fs7, 216(a1) 310; LP64D-NEXT: fsd fs6, 208(a1) 311; LP64D-NEXT: fsd fs5, 200(a1) 312; LP64D-NEXT: fsd fs4, 192(a1) 313; LP64D-NEXT: fsd fs3, 184(a1) 314; LP64D-NEXT: fsd fs2, 176(a1) 315; LP64D-NEXT: fsd fs1, 168(a1) 316; LP64D-NEXT: fsd fs0, 160(a1) 317; LP64D-NEXT: fsd ft11, 152(a1) 318; LP64D-NEXT: fsd ft10, 144(a1) 319; LP64D-NEXT: fsd ft9, 136(a1) 320; LP64D-NEXT: fsd ft8, 128(a1) 321; LP64D-NEXT: fsd fa7, 120(a1) 322; LP64D-NEXT: fsd fa6, 112(a1) 323; LP64D-NEXT: fsd fa5, 104(a1) 324; LP64D-NEXT: fsd fa4, 96(a1) 325; LP64D-NEXT: fsd fa3, 88(a1) 326; LP64D-NEXT: fsd fa2, 80(a1) 327; LP64D-NEXT: fsd fa1, 72(a1) 328; LP64D-NEXT: fsd fa0, 64(a1) 329; LP64D-NEXT: fsd ft7, 56(a1) 330; LP64D-NEXT: fsd ft6, 48(a1) 331; LP64D-NEXT: fsd ft5, 40(a1) 332; LP64D-NEXT: fsd ft4, 32(a1) 333; LP64D-NEXT: fsd ft3, 24(a1) 334; LP64D-NEXT: fsd ft2, 16(a1) 335; LP64D-NEXT: fsd ft1, %lo(var+8)(a0) 336; LP64D-NEXT: fsd ft0, %lo(var)(a0) 337; LP64D-NEXT: fld fs11, 0(sp) 338; LP64D-NEXT: fld fs10, 8(sp) 339; LP64D-NEXT: fld fs9, 16(sp) 340; LP64D-NEXT: fld fs8, 24(sp) 341; LP64D-NEXT: fld fs7, 32(sp) 342; LP64D-NEXT: fld fs6, 40(sp) 343; LP64D-NEXT: fld fs5, 48(sp) 344; LP64D-NEXT: fld fs4, 56(sp) 345; LP64D-NEXT: fld fs3, 64(sp) 346; LP64D-NEXT: fld fs2, 72(sp) 347; LP64D-NEXT: fld fs1, 80(sp) 348; LP64D-NEXT: fld fs0, 88(sp) 349; LP64D-NEXT: addi sp, sp, 96 350; LP64D-NEXT: ret 351 %val = load [32 x double], [32 x double]* @var 352 store volatile [32 x double] %val, [32 x double]* @var 353 ret void 354} 355 356; This function tests that RISCVRegisterInfo::getCallPreservedMask returns 357; something appropriate. 358; 359; For the soft float ABIs, no floating point registers are preserved, and 360; codegen will use only ft0 in the body of caller. For the 'f' and 'd ABIs, 361; fs0-fs11 are preserved across calls. 362 363define void @caller() nounwind { 364; ILP32-LABEL: caller: 365; ILP32: # %bb.0: 366; ILP32-NEXT: addi sp, sp, -272 367; ILP32-NEXT: sw ra, 268(sp) 368; ILP32-NEXT: sw s0, 264(sp) 369; ILP32-NEXT: sw s1, 260(sp) 370; ILP32-NEXT: lui s0, %hi(var) 371; ILP32-NEXT: fld ft0, %lo(var)(s0) 372; ILP32-NEXT: fsd ft0, 248(sp) 373; ILP32-NEXT: fld ft0, %lo(var+8)(s0) 374; ILP32-NEXT: fsd ft0, 240(sp) 375; ILP32-NEXT: addi s1, s0, %lo(var) 376; ILP32-NEXT: fld ft0, 16(s1) 377; ILP32-NEXT: fsd ft0, 232(sp) 378; ILP32-NEXT: fld ft0, 24(s1) 379; ILP32-NEXT: fsd ft0, 224(sp) 380; ILP32-NEXT: fld ft0, 32(s1) 381; ILP32-NEXT: fsd ft0, 216(sp) 382; ILP32-NEXT: fld ft0, 40(s1) 383; ILP32-NEXT: fsd ft0, 208(sp) 384; ILP32-NEXT: fld ft0, 48(s1) 385; ILP32-NEXT: fsd ft0, 200(sp) 386; ILP32-NEXT: fld ft0, 56(s1) 387; ILP32-NEXT: fsd ft0, 192(sp) 388; ILP32-NEXT: fld ft0, 64(s1) 389; ILP32-NEXT: fsd ft0, 184(sp) 390; ILP32-NEXT: fld ft0, 72(s1) 391; ILP32-NEXT: fsd ft0, 176(sp) 392; ILP32-NEXT: fld ft0, 80(s1) 393; ILP32-NEXT: fsd ft0, 168(sp) 394; ILP32-NEXT: fld ft0, 88(s1) 395; ILP32-NEXT: fsd ft0, 160(sp) 396; ILP32-NEXT: fld ft0, 96(s1) 397; ILP32-NEXT: fsd ft0, 152(sp) 398; ILP32-NEXT: fld ft0, 104(s1) 399; ILP32-NEXT: fsd ft0, 144(sp) 400; ILP32-NEXT: fld ft0, 112(s1) 401; ILP32-NEXT: fsd ft0, 136(sp) 402; ILP32-NEXT: fld ft0, 120(s1) 403; ILP32-NEXT: fsd ft0, 128(sp) 404; ILP32-NEXT: fld ft0, 128(s1) 405; ILP32-NEXT: fsd ft0, 120(sp) 406; ILP32-NEXT: fld ft0, 136(s1) 407; ILP32-NEXT: fsd ft0, 112(sp) 408; ILP32-NEXT: fld ft0, 144(s1) 409; ILP32-NEXT: fsd ft0, 104(sp) 410; ILP32-NEXT: fld ft0, 152(s1) 411; ILP32-NEXT: fsd ft0, 96(sp) 412; ILP32-NEXT: fld ft0, 160(s1) 413; ILP32-NEXT: fsd ft0, 88(sp) 414; ILP32-NEXT: fld ft0, 168(s1) 415; ILP32-NEXT: fsd ft0, 80(sp) 416; ILP32-NEXT: fld ft0, 176(s1) 417; ILP32-NEXT: fsd ft0, 72(sp) 418; ILP32-NEXT: fld ft0, 184(s1) 419; ILP32-NEXT: fsd ft0, 64(sp) 420; ILP32-NEXT: fld ft0, 192(s1) 421; ILP32-NEXT: fsd ft0, 56(sp) 422; ILP32-NEXT: fld ft0, 200(s1) 423; ILP32-NEXT: fsd ft0, 48(sp) 424; ILP32-NEXT: fld ft0, 208(s1) 425; ILP32-NEXT: fsd ft0, 40(sp) 426; ILP32-NEXT: fld ft0, 216(s1) 427; ILP32-NEXT: fsd ft0, 32(sp) 428; ILP32-NEXT: fld ft0, 224(s1) 429; ILP32-NEXT: fsd ft0, 24(sp) 430; ILP32-NEXT: fld ft0, 232(s1) 431; ILP32-NEXT: fsd ft0, 16(sp) 432; ILP32-NEXT: fld ft0, 240(s1) 433; ILP32-NEXT: fsd ft0, 8(sp) 434; ILP32-NEXT: fld ft0, 248(s1) 435; ILP32-NEXT: fsd ft0, 0(sp) 436; ILP32-NEXT: call callee 437; ILP32-NEXT: fld ft0, 0(sp) 438; ILP32-NEXT: fsd ft0, 248(s1) 439; ILP32-NEXT: fld ft0, 8(sp) 440; ILP32-NEXT: fsd ft0, 240(s1) 441; ILP32-NEXT: fld ft0, 16(sp) 442; ILP32-NEXT: fsd ft0, 232(s1) 443; ILP32-NEXT: fld ft0, 24(sp) 444; ILP32-NEXT: fsd ft0, 224(s1) 445; ILP32-NEXT: fld ft0, 32(sp) 446; ILP32-NEXT: fsd ft0, 216(s1) 447; ILP32-NEXT: fld ft0, 40(sp) 448; ILP32-NEXT: fsd ft0, 208(s1) 449; ILP32-NEXT: fld ft0, 48(sp) 450; ILP32-NEXT: fsd ft0, 200(s1) 451; ILP32-NEXT: fld ft0, 56(sp) 452; ILP32-NEXT: fsd ft0, 192(s1) 453; ILP32-NEXT: fld ft0, 64(sp) 454; ILP32-NEXT: fsd ft0, 184(s1) 455; ILP32-NEXT: fld ft0, 72(sp) 456; ILP32-NEXT: fsd ft0, 176(s1) 457; ILP32-NEXT: fld ft0, 80(sp) 458; ILP32-NEXT: fsd ft0, 168(s1) 459; ILP32-NEXT: fld ft0, 88(sp) 460; ILP32-NEXT: fsd ft0, 160(s1) 461; ILP32-NEXT: fld ft0, 96(sp) 462; ILP32-NEXT: fsd ft0, 152(s1) 463; ILP32-NEXT: fld ft0, 104(sp) 464; ILP32-NEXT: fsd ft0, 144(s1) 465; ILP32-NEXT: fld ft0, 112(sp) 466; ILP32-NEXT: fsd ft0, 136(s1) 467; ILP32-NEXT: fld ft0, 120(sp) 468; ILP32-NEXT: fsd ft0, 128(s1) 469; ILP32-NEXT: fld ft0, 128(sp) 470; ILP32-NEXT: fsd ft0, 120(s1) 471; ILP32-NEXT: fld ft0, 136(sp) 472; ILP32-NEXT: fsd ft0, 112(s1) 473; ILP32-NEXT: fld ft0, 144(sp) 474; ILP32-NEXT: fsd ft0, 104(s1) 475; ILP32-NEXT: fld ft0, 152(sp) 476; ILP32-NEXT: fsd ft0, 96(s1) 477; ILP32-NEXT: fld ft0, 160(sp) 478; ILP32-NEXT: fsd ft0, 88(s1) 479; ILP32-NEXT: fld ft0, 168(sp) 480; ILP32-NEXT: fsd ft0, 80(s1) 481; ILP32-NEXT: fld ft0, 176(sp) 482; ILP32-NEXT: fsd ft0, 72(s1) 483; ILP32-NEXT: fld ft0, 184(sp) 484; ILP32-NEXT: fsd ft0, 64(s1) 485; ILP32-NEXT: fld ft0, 192(sp) 486; ILP32-NEXT: fsd ft0, 56(s1) 487; ILP32-NEXT: fld ft0, 200(sp) 488; ILP32-NEXT: fsd ft0, 48(s1) 489; ILP32-NEXT: fld ft0, 208(sp) 490; ILP32-NEXT: fsd ft0, 40(s1) 491; ILP32-NEXT: fld ft0, 216(sp) 492; ILP32-NEXT: fsd ft0, 32(s1) 493; ILP32-NEXT: fld ft0, 224(sp) 494; ILP32-NEXT: fsd ft0, 24(s1) 495; ILP32-NEXT: fld ft0, 232(sp) 496; ILP32-NEXT: fsd ft0, 16(s1) 497; ILP32-NEXT: fld ft0, 240(sp) 498; ILP32-NEXT: fsd ft0, %lo(var+8)(s0) 499; ILP32-NEXT: fld ft0, 248(sp) 500; ILP32-NEXT: fsd ft0, %lo(var)(s0) 501; ILP32-NEXT: lw s1, 260(sp) 502; ILP32-NEXT: lw s0, 264(sp) 503; ILP32-NEXT: lw ra, 268(sp) 504; ILP32-NEXT: addi sp, sp, 272 505; ILP32-NEXT: ret 506; 507; LP64-LABEL: caller: 508; LP64: # %bb.0: 509; LP64-NEXT: addi sp, sp, -288 510; LP64-NEXT: sd ra, 280(sp) 511; LP64-NEXT: sd s0, 272(sp) 512; LP64-NEXT: sd s1, 264(sp) 513; LP64-NEXT: lui s0, %hi(var) 514; LP64-NEXT: fld ft0, %lo(var)(s0) 515; LP64-NEXT: fsd ft0, 256(sp) 516; LP64-NEXT: fld ft0, %lo(var+8)(s0) 517; LP64-NEXT: fsd ft0, 248(sp) 518; LP64-NEXT: addi s1, s0, %lo(var) 519; LP64-NEXT: fld ft0, 16(s1) 520; LP64-NEXT: fsd ft0, 240(sp) 521; LP64-NEXT: fld ft0, 24(s1) 522; LP64-NEXT: fsd ft0, 232(sp) 523; LP64-NEXT: fld ft0, 32(s1) 524; LP64-NEXT: fsd ft0, 224(sp) 525; LP64-NEXT: fld ft0, 40(s1) 526; LP64-NEXT: fsd ft0, 216(sp) 527; LP64-NEXT: fld ft0, 48(s1) 528; LP64-NEXT: fsd ft0, 208(sp) 529; LP64-NEXT: fld ft0, 56(s1) 530; LP64-NEXT: fsd ft0, 200(sp) 531; LP64-NEXT: fld ft0, 64(s1) 532; LP64-NEXT: fsd ft0, 192(sp) 533; LP64-NEXT: fld ft0, 72(s1) 534; LP64-NEXT: fsd ft0, 184(sp) 535; LP64-NEXT: fld ft0, 80(s1) 536; LP64-NEXT: fsd ft0, 176(sp) 537; LP64-NEXT: fld ft0, 88(s1) 538; LP64-NEXT: fsd ft0, 168(sp) 539; LP64-NEXT: fld ft0, 96(s1) 540; LP64-NEXT: fsd ft0, 160(sp) 541; LP64-NEXT: fld ft0, 104(s1) 542; LP64-NEXT: fsd ft0, 152(sp) 543; LP64-NEXT: fld ft0, 112(s1) 544; LP64-NEXT: fsd ft0, 144(sp) 545; LP64-NEXT: fld ft0, 120(s1) 546; LP64-NEXT: fsd ft0, 136(sp) 547; LP64-NEXT: fld ft0, 128(s1) 548; LP64-NEXT: fsd ft0, 128(sp) 549; LP64-NEXT: fld ft0, 136(s1) 550; LP64-NEXT: fsd ft0, 120(sp) 551; LP64-NEXT: fld ft0, 144(s1) 552; LP64-NEXT: fsd ft0, 112(sp) 553; LP64-NEXT: fld ft0, 152(s1) 554; LP64-NEXT: fsd ft0, 104(sp) 555; LP64-NEXT: fld ft0, 160(s1) 556; LP64-NEXT: fsd ft0, 96(sp) 557; LP64-NEXT: fld ft0, 168(s1) 558; LP64-NEXT: fsd ft0, 88(sp) 559; LP64-NEXT: fld ft0, 176(s1) 560; LP64-NEXT: fsd ft0, 80(sp) 561; LP64-NEXT: fld ft0, 184(s1) 562; LP64-NEXT: fsd ft0, 72(sp) 563; LP64-NEXT: fld ft0, 192(s1) 564; LP64-NEXT: fsd ft0, 64(sp) 565; LP64-NEXT: fld ft0, 200(s1) 566; LP64-NEXT: fsd ft0, 56(sp) 567; LP64-NEXT: fld ft0, 208(s1) 568; LP64-NEXT: fsd ft0, 48(sp) 569; LP64-NEXT: fld ft0, 216(s1) 570; LP64-NEXT: fsd ft0, 40(sp) 571; LP64-NEXT: fld ft0, 224(s1) 572; LP64-NEXT: fsd ft0, 32(sp) 573; LP64-NEXT: fld ft0, 232(s1) 574; LP64-NEXT: fsd ft0, 24(sp) 575; LP64-NEXT: fld ft0, 240(s1) 576; LP64-NEXT: fsd ft0, 16(sp) 577; LP64-NEXT: fld ft0, 248(s1) 578; LP64-NEXT: fsd ft0, 8(sp) 579; LP64-NEXT: call callee 580; LP64-NEXT: fld ft0, 8(sp) 581; LP64-NEXT: fsd ft0, 248(s1) 582; LP64-NEXT: fld ft0, 16(sp) 583; LP64-NEXT: fsd ft0, 240(s1) 584; LP64-NEXT: fld ft0, 24(sp) 585; LP64-NEXT: fsd ft0, 232(s1) 586; LP64-NEXT: fld ft0, 32(sp) 587; LP64-NEXT: fsd ft0, 224(s1) 588; LP64-NEXT: fld ft0, 40(sp) 589; LP64-NEXT: fsd ft0, 216(s1) 590; LP64-NEXT: fld ft0, 48(sp) 591; LP64-NEXT: fsd ft0, 208(s1) 592; LP64-NEXT: fld ft0, 56(sp) 593; LP64-NEXT: fsd ft0, 200(s1) 594; LP64-NEXT: fld ft0, 64(sp) 595; LP64-NEXT: fsd ft0, 192(s1) 596; LP64-NEXT: fld ft0, 72(sp) 597; LP64-NEXT: fsd ft0, 184(s1) 598; LP64-NEXT: fld ft0, 80(sp) 599; LP64-NEXT: fsd ft0, 176(s1) 600; LP64-NEXT: fld ft0, 88(sp) 601; LP64-NEXT: fsd ft0, 168(s1) 602; LP64-NEXT: fld ft0, 96(sp) 603; LP64-NEXT: fsd ft0, 160(s1) 604; LP64-NEXT: fld ft0, 104(sp) 605; LP64-NEXT: fsd ft0, 152(s1) 606; LP64-NEXT: fld ft0, 112(sp) 607; LP64-NEXT: fsd ft0, 144(s1) 608; LP64-NEXT: fld ft0, 120(sp) 609; LP64-NEXT: fsd ft0, 136(s1) 610; LP64-NEXT: fld ft0, 128(sp) 611; LP64-NEXT: fsd ft0, 128(s1) 612; LP64-NEXT: fld ft0, 136(sp) 613; LP64-NEXT: fsd ft0, 120(s1) 614; LP64-NEXT: fld ft0, 144(sp) 615; LP64-NEXT: fsd ft0, 112(s1) 616; LP64-NEXT: fld ft0, 152(sp) 617; LP64-NEXT: fsd ft0, 104(s1) 618; LP64-NEXT: fld ft0, 160(sp) 619; LP64-NEXT: fsd ft0, 96(s1) 620; LP64-NEXT: fld ft0, 168(sp) 621; LP64-NEXT: fsd ft0, 88(s1) 622; LP64-NEXT: fld ft0, 176(sp) 623; LP64-NEXT: fsd ft0, 80(s1) 624; LP64-NEXT: fld ft0, 184(sp) 625; LP64-NEXT: fsd ft0, 72(s1) 626; LP64-NEXT: fld ft0, 192(sp) 627; LP64-NEXT: fsd ft0, 64(s1) 628; LP64-NEXT: fld ft0, 200(sp) 629; LP64-NEXT: fsd ft0, 56(s1) 630; LP64-NEXT: fld ft0, 208(sp) 631; LP64-NEXT: fsd ft0, 48(s1) 632; LP64-NEXT: fld ft0, 216(sp) 633; LP64-NEXT: fsd ft0, 40(s1) 634; LP64-NEXT: fld ft0, 224(sp) 635; LP64-NEXT: fsd ft0, 32(s1) 636; LP64-NEXT: fld ft0, 232(sp) 637; LP64-NEXT: fsd ft0, 24(s1) 638; LP64-NEXT: fld ft0, 240(sp) 639; LP64-NEXT: fsd ft0, 16(s1) 640; LP64-NEXT: fld ft0, 248(sp) 641; LP64-NEXT: fsd ft0, %lo(var+8)(s0) 642; LP64-NEXT: fld ft0, 256(sp) 643; LP64-NEXT: fsd ft0, %lo(var)(s0) 644; LP64-NEXT: ld s1, 264(sp) 645; LP64-NEXT: ld s0, 272(sp) 646; LP64-NEXT: ld ra, 280(sp) 647; LP64-NEXT: addi sp, sp, 288 648; LP64-NEXT: ret 649; 650; ILP32D-LABEL: caller: 651; ILP32D: # %bb.0: 652; ILP32D-NEXT: addi sp, sp, -272 653; ILP32D-NEXT: sw ra, 268(sp) 654; ILP32D-NEXT: sw s0, 264(sp) 655; ILP32D-NEXT: sw s1, 260(sp) 656; ILP32D-NEXT: fsd fs0, 248(sp) 657; ILP32D-NEXT: fsd fs1, 240(sp) 658; ILP32D-NEXT: fsd fs2, 232(sp) 659; ILP32D-NEXT: fsd fs3, 224(sp) 660; ILP32D-NEXT: fsd fs4, 216(sp) 661; ILP32D-NEXT: fsd fs5, 208(sp) 662; ILP32D-NEXT: fsd fs6, 200(sp) 663; ILP32D-NEXT: fsd fs7, 192(sp) 664; ILP32D-NEXT: fsd fs8, 184(sp) 665; ILP32D-NEXT: fsd fs9, 176(sp) 666; ILP32D-NEXT: fsd fs10, 168(sp) 667; ILP32D-NEXT: fsd fs11, 160(sp) 668; ILP32D-NEXT: lui s0, %hi(var) 669; ILP32D-NEXT: fld ft0, %lo(var)(s0) 670; ILP32D-NEXT: fsd ft0, 152(sp) 671; ILP32D-NEXT: fld ft0, %lo(var+8)(s0) 672; ILP32D-NEXT: fsd ft0, 144(sp) 673; ILP32D-NEXT: addi s1, s0, %lo(var) 674; ILP32D-NEXT: fld ft0, 16(s1) 675; ILP32D-NEXT: fsd ft0, 136(sp) 676; ILP32D-NEXT: fld ft0, 24(s1) 677; ILP32D-NEXT: fsd ft0, 128(sp) 678; ILP32D-NEXT: fld ft0, 32(s1) 679; ILP32D-NEXT: fsd ft0, 120(sp) 680; ILP32D-NEXT: fld ft0, 40(s1) 681; ILP32D-NEXT: fsd ft0, 112(sp) 682; ILP32D-NEXT: fld ft0, 48(s1) 683; ILP32D-NEXT: fsd ft0, 104(sp) 684; ILP32D-NEXT: fld ft0, 56(s1) 685; ILP32D-NEXT: fsd ft0, 96(sp) 686; ILP32D-NEXT: fld ft0, 64(s1) 687; ILP32D-NEXT: fsd ft0, 88(sp) 688; ILP32D-NEXT: fld ft0, 72(s1) 689; ILP32D-NEXT: fsd ft0, 80(sp) 690; ILP32D-NEXT: fld ft0, 80(s1) 691; ILP32D-NEXT: fsd ft0, 72(sp) 692; ILP32D-NEXT: fld ft0, 88(s1) 693; ILP32D-NEXT: fsd ft0, 64(sp) 694; ILP32D-NEXT: fld ft0, 96(s1) 695; ILP32D-NEXT: fsd ft0, 56(sp) 696; ILP32D-NEXT: fld ft0, 104(s1) 697; ILP32D-NEXT: fsd ft0, 48(sp) 698; ILP32D-NEXT: fld ft0, 112(s1) 699; ILP32D-NEXT: fsd ft0, 40(sp) 700; ILP32D-NEXT: fld ft0, 120(s1) 701; ILP32D-NEXT: fsd ft0, 32(sp) 702; ILP32D-NEXT: fld ft0, 128(s1) 703; ILP32D-NEXT: fsd ft0, 24(sp) 704; ILP32D-NEXT: fld ft0, 136(s1) 705; ILP32D-NEXT: fsd ft0, 16(sp) 706; ILP32D-NEXT: fld ft0, 144(s1) 707; ILP32D-NEXT: fsd ft0, 8(sp) 708; ILP32D-NEXT: fld ft0, 152(s1) 709; ILP32D-NEXT: fsd ft0, 0(sp) 710; ILP32D-NEXT: fld fs8, 160(s1) 711; ILP32D-NEXT: fld fs9, 168(s1) 712; ILP32D-NEXT: fld fs10, 176(s1) 713; ILP32D-NEXT: fld fs11, 184(s1) 714; ILP32D-NEXT: fld fs0, 192(s1) 715; ILP32D-NEXT: fld fs1, 200(s1) 716; ILP32D-NEXT: fld fs2, 208(s1) 717; ILP32D-NEXT: fld fs3, 216(s1) 718; ILP32D-NEXT: fld fs4, 224(s1) 719; ILP32D-NEXT: fld fs5, 232(s1) 720; ILP32D-NEXT: fld fs6, 240(s1) 721; ILP32D-NEXT: fld fs7, 248(s1) 722; ILP32D-NEXT: call callee 723; ILP32D-NEXT: fsd fs7, 248(s1) 724; ILP32D-NEXT: fsd fs6, 240(s1) 725; ILP32D-NEXT: fsd fs5, 232(s1) 726; ILP32D-NEXT: fsd fs4, 224(s1) 727; ILP32D-NEXT: fsd fs3, 216(s1) 728; ILP32D-NEXT: fsd fs2, 208(s1) 729; ILP32D-NEXT: fsd fs1, 200(s1) 730; ILP32D-NEXT: fsd fs0, 192(s1) 731; ILP32D-NEXT: fsd fs11, 184(s1) 732; ILP32D-NEXT: fsd fs10, 176(s1) 733; ILP32D-NEXT: fsd fs9, 168(s1) 734; ILP32D-NEXT: fsd fs8, 160(s1) 735; ILP32D-NEXT: fld ft0, 0(sp) 736; ILP32D-NEXT: fsd ft0, 152(s1) 737; ILP32D-NEXT: fld ft0, 8(sp) 738; ILP32D-NEXT: fsd ft0, 144(s1) 739; ILP32D-NEXT: fld ft0, 16(sp) 740; ILP32D-NEXT: fsd ft0, 136(s1) 741; ILP32D-NEXT: fld ft0, 24(sp) 742; ILP32D-NEXT: fsd ft0, 128(s1) 743; ILP32D-NEXT: fld ft0, 32(sp) 744; ILP32D-NEXT: fsd ft0, 120(s1) 745; ILP32D-NEXT: fld ft0, 40(sp) 746; ILP32D-NEXT: fsd ft0, 112(s1) 747; ILP32D-NEXT: fld ft0, 48(sp) 748; ILP32D-NEXT: fsd ft0, 104(s1) 749; ILP32D-NEXT: fld ft0, 56(sp) 750; ILP32D-NEXT: fsd ft0, 96(s1) 751; ILP32D-NEXT: fld ft0, 64(sp) 752; ILP32D-NEXT: fsd ft0, 88(s1) 753; ILP32D-NEXT: fld ft0, 72(sp) 754; ILP32D-NEXT: fsd ft0, 80(s1) 755; ILP32D-NEXT: fld ft0, 80(sp) 756; ILP32D-NEXT: fsd ft0, 72(s1) 757; ILP32D-NEXT: fld ft0, 88(sp) 758; ILP32D-NEXT: fsd ft0, 64(s1) 759; ILP32D-NEXT: fld ft0, 96(sp) 760; ILP32D-NEXT: fsd ft0, 56(s1) 761; ILP32D-NEXT: fld ft0, 104(sp) 762; ILP32D-NEXT: fsd ft0, 48(s1) 763; ILP32D-NEXT: fld ft0, 112(sp) 764; ILP32D-NEXT: fsd ft0, 40(s1) 765; ILP32D-NEXT: fld ft0, 120(sp) 766; ILP32D-NEXT: fsd ft0, 32(s1) 767; ILP32D-NEXT: fld ft0, 128(sp) 768; ILP32D-NEXT: fsd ft0, 24(s1) 769; ILP32D-NEXT: fld ft0, 136(sp) 770; ILP32D-NEXT: fsd ft0, 16(s1) 771; ILP32D-NEXT: fld ft0, 144(sp) 772; ILP32D-NEXT: fsd ft0, %lo(var+8)(s0) 773; ILP32D-NEXT: fld ft0, 152(sp) 774; ILP32D-NEXT: fsd ft0, %lo(var)(s0) 775; ILP32D-NEXT: fld fs11, 160(sp) 776; ILP32D-NEXT: fld fs10, 168(sp) 777; ILP32D-NEXT: fld fs9, 176(sp) 778; ILP32D-NEXT: fld fs8, 184(sp) 779; ILP32D-NEXT: fld fs7, 192(sp) 780; ILP32D-NEXT: fld fs6, 200(sp) 781; ILP32D-NEXT: fld fs5, 208(sp) 782; ILP32D-NEXT: fld fs4, 216(sp) 783; ILP32D-NEXT: fld fs3, 224(sp) 784; ILP32D-NEXT: fld fs2, 232(sp) 785; ILP32D-NEXT: fld fs1, 240(sp) 786; ILP32D-NEXT: fld fs0, 248(sp) 787; ILP32D-NEXT: lw s1, 260(sp) 788; ILP32D-NEXT: lw s0, 264(sp) 789; ILP32D-NEXT: lw ra, 268(sp) 790; ILP32D-NEXT: addi sp, sp, 272 791; ILP32D-NEXT: ret 792; 793; LP64D-LABEL: caller: 794; LP64D: # %bb.0: 795; LP64D-NEXT: addi sp, sp, -288 796; LP64D-NEXT: sd ra, 280(sp) 797; LP64D-NEXT: sd s0, 272(sp) 798; LP64D-NEXT: sd s1, 264(sp) 799; LP64D-NEXT: fsd fs0, 256(sp) 800; LP64D-NEXT: fsd fs1, 248(sp) 801; LP64D-NEXT: fsd fs2, 240(sp) 802; LP64D-NEXT: fsd fs3, 232(sp) 803; LP64D-NEXT: fsd fs4, 224(sp) 804; LP64D-NEXT: fsd fs5, 216(sp) 805; LP64D-NEXT: fsd fs6, 208(sp) 806; LP64D-NEXT: fsd fs7, 200(sp) 807; LP64D-NEXT: fsd fs8, 192(sp) 808; LP64D-NEXT: fsd fs9, 184(sp) 809; LP64D-NEXT: fsd fs10, 176(sp) 810; LP64D-NEXT: fsd fs11, 168(sp) 811; LP64D-NEXT: lui s0, %hi(var) 812; LP64D-NEXT: fld ft0, %lo(var)(s0) 813; LP64D-NEXT: fsd ft0, 160(sp) 814; LP64D-NEXT: fld ft0, %lo(var+8)(s0) 815; LP64D-NEXT: fsd ft0, 152(sp) 816; LP64D-NEXT: addi s1, s0, %lo(var) 817; LP64D-NEXT: fld ft0, 16(s1) 818; LP64D-NEXT: fsd ft0, 144(sp) 819; LP64D-NEXT: fld ft0, 24(s1) 820; LP64D-NEXT: fsd ft0, 136(sp) 821; LP64D-NEXT: fld ft0, 32(s1) 822; LP64D-NEXT: fsd ft0, 128(sp) 823; LP64D-NEXT: fld ft0, 40(s1) 824; LP64D-NEXT: fsd ft0, 120(sp) 825; LP64D-NEXT: fld ft0, 48(s1) 826; LP64D-NEXT: fsd ft0, 112(sp) 827; LP64D-NEXT: fld ft0, 56(s1) 828; LP64D-NEXT: fsd ft0, 104(sp) 829; LP64D-NEXT: fld ft0, 64(s1) 830; LP64D-NEXT: fsd ft0, 96(sp) 831; LP64D-NEXT: fld ft0, 72(s1) 832; LP64D-NEXT: fsd ft0, 88(sp) 833; LP64D-NEXT: fld ft0, 80(s1) 834; LP64D-NEXT: fsd ft0, 80(sp) 835; LP64D-NEXT: fld ft0, 88(s1) 836; LP64D-NEXT: fsd ft0, 72(sp) 837; LP64D-NEXT: fld ft0, 96(s1) 838; LP64D-NEXT: fsd ft0, 64(sp) 839; LP64D-NEXT: fld ft0, 104(s1) 840; LP64D-NEXT: fsd ft0, 56(sp) 841; LP64D-NEXT: fld ft0, 112(s1) 842; LP64D-NEXT: fsd ft0, 48(sp) 843; LP64D-NEXT: fld ft0, 120(s1) 844; LP64D-NEXT: fsd ft0, 40(sp) 845; LP64D-NEXT: fld ft0, 128(s1) 846; LP64D-NEXT: fsd ft0, 32(sp) 847; LP64D-NEXT: fld ft0, 136(s1) 848; LP64D-NEXT: fsd ft0, 24(sp) 849; LP64D-NEXT: fld ft0, 144(s1) 850; LP64D-NEXT: fsd ft0, 16(sp) 851; LP64D-NEXT: fld ft0, 152(s1) 852; LP64D-NEXT: fsd ft0, 8(sp) 853; LP64D-NEXT: fld fs8, 160(s1) 854; LP64D-NEXT: fld fs9, 168(s1) 855; LP64D-NEXT: fld fs10, 176(s1) 856; LP64D-NEXT: fld fs11, 184(s1) 857; LP64D-NEXT: fld fs0, 192(s1) 858; LP64D-NEXT: fld fs1, 200(s1) 859; LP64D-NEXT: fld fs2, 208(s1) 860; LP64D-NEXT: fld fs3, 216(s1) 861; LP64D-NEXT: fld fs4, 224(s1) 862; LP64D-NEXT: fld fs5, 232(s1) 863; LP64D-NEXT: fld fs6, 240(s1) 864; LP64D-NEXT: fld fs7, 248(s1) 865; LP64D-NEXT: call callee 866; LP64D-NEXT: fsd fs7, 248(s1) 867; LP64D-NEXT: fsd fs6, 240(s1) 868; LP64D-NEXT: fsd fs5, 232(s1) 869; LP64D-NEXT: fsd fs4, 224(s1) 870; LP64D-NEXT: fsd fs3, 216(s1) 871; LP64D-NEXT: fsd fs2, 208(s1) 872; LP64D-NEXT: fsd fs1, 200(s1) 873; LP64D-NEXT: fsd fs0, 192(s1) 874; LP64D-NEXT: fsd fs11, 184(s1) 875; LP64D-NEXT: fsd fs10, 176(s1) 876; LP64D-NEXT: fsd fs9, 168(s1) 877; LP64D-NEXT: fsd fs8, 160(s1) 878; LP64D-NEXT: fld ft0, 8(sp) 879; LP64D-NEXT: fsd ft0, 152(s1) 880; LP64D-NEXT: fld ft0, 16(sp) 881; LP64D-NEXT: fsd ft0, 144(s1) 882; LP64D-NEXT: fld ft0, 24(sp) 883; LP64D-NEXT: fsd ft0, 136(s1) 884; LP64D-NEXT: fld ft0, 32(sp) 885; LP64D-NEXT: fsd ft0, 128(s1) 886; LP64D-NEXT: fld ft0, 40(sp) 887; LP64D-NEXT: fsd ft0, 120(s1) 888; LP64D-NEXT: fld ft0, 48(sp) 889; LP64D-NEXT: fsd ft0, 112(s1) 890; LP64D-NEXT: fld ft0, 56(sp) 891; LP64D-NEXT: fsd ft0, 104(s1) 892; LP64D-NEXT: fld ft0, 64(sp) 893; LP64D-NEXT: fsd ft0, 96(s1) 894; LP64D-NEXT: fld ft0, 72(sp) 895; LP64D-NEXT: fsd ft0, 88(s1) 896; LP64D-NEXT: fld ft0, 80(sp) 897; LP64D-NEXT: fsd ft0, 80(s1) 898; LP64D-NEXT: fld ft0, 88(sp) 899; LP64D-NEXT: fsd ft0, 72(s1) 900; LP64D-NEXT: fld ft0, 96(sp) 901; LP64D-NEXT: fsd ft0, 64(s1) 902; LP64D-NEXT: fld ft0, 104(sp) 903; LP64D-NEXT: fsd ft0, 56(s1) 904; LP64D-NEXT: fld ft0, 112(sp) 905; LP64D-NEXT: fsd ft0, 48(s1) 906; LP64D-NEXT: fld ft0, 120(sp) 907; LP64D-NEXT: fsd ft0, 40(s1) 908; LP64D-NEXT: fld ft0, 128(sp) 909; LP64D-NEXT: fsd ft0, 32(s1) 910; LP64D-NEXT: fld ft0, 136(sp) 911; LP64D-NEXT: fsd ft0, 24(s1) 912; LP64D-NEXT: fld ft0, 144(sp) 913; LP64D-NEXT: fsd ft0, 16(s1) 914; LP64D-NEXT: fld ft0, 152(sp) 915; LP64D-NEXT: fsd ft0, %lo(var+8)(s0) 916; LP64D-NEXT: fld ft0, 160(sp) 917; LP64D-NEXT: fsd ft0, %lo(var)(s0) 918; LP64D-NEXT: fld fs11, 168(sp) 919; LP64D-NEXT: fld fs10, 176(sp) 920; LP64D-NEXT: fld fs9, 184(sp) 921; LP64D-NEXT: fld fs8, 192(sp) 922; LP64D-NEXT: fld fs7, 200(sp) 923; LP64D-NEXT: fld fs6, 208(sp) 924; LP64D-NEXT: fld fs5, 216(sp) 925; LP64D-NEXT: fld fs4, 224(sp) 926; LP64D-NEXT: fld fs3, 232(sp) 927; LP64D-NEXT: fld fs2, 240(sp) 928; LP64D-NEXT: fld fs1, 248(sp) 929; LP64D-NEXT: fld fs0, 256(sp) 930; LP64D-NEXT: ld s1, 264(sp) 931; LP64D-NEXT: ld s0, 272(sp) 932; LP64D-NEXT: ld ra, 280(sp) 933; LP64D-NEXT: addi sp, sp, 288 934; LP64D-NEXT: ret 935 %val = load [32 x double], [32 x double]* @var 936 call void @callee() 937 store volatile [32 x double] %val, [32 x double]* @var 938 ret void 939} 940