1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4
5define zeroext i8 @uint8_arg_to_uint8_ret(i8 zeroext %a) nounwind {
6; RV32I-LABEL: uint8_arg_to_uint8_ret:
7; RV32I:       # %bb.0:
8; RV32I-NEXT:    ret
9  ret i8 %a
10}
11
12declare void @receive_uint8(i8 zeroext)
13
14define void @pass_uint8_as_uint8(i8 zeroext %a) nounwind {
15; RV32I-LABEL: pass_uint8_as_uint8:
16; RV32I:       # %bb.0:
17; RV32I-NEXT:    addi sp, sp, -16
18; RV32I-NEXT:    sw ra, 12(sp)
19; RV32I-NEXT:    call receive_uint8
20; RV32I-NEXT:    lw ra, 12(sp)
21; RV32I-NEXT:    addi sp, sp, 16
22; RV32I-NEXT:    ret
23  call void @receive_uint8(i8 zeroext %a)
24  ret void
25}
26
27declare zeroext i8 @return_uint8()
28
29define zeroext i8 @ret_callresult_uint8_as_uint8() nounwind {
30; RV32I-LABEL: ret_callresult_uint8_as_uint8:
31; RV32I:       # %bb.0:
32; RV32I-NEXT:    addi sp, sp, -16
33; RV32I-NEXT:    sw ra, 12(sp)
34; RV32I-NEXT:    call return_uint8
35; RV32I-NEXT:    lw ra, 12(sp)
36; RV32I-NEXT:    addi sp, sp, 16
37; RV32I-NEXT:    ret
38  %1 = call zeroext i8 @return_uint8()
39  ret i8 %1
40}
41
42define signext i8 @uint8_arg_to_sint8_ret(i8 zeroext %a) nounwind {
43; RV32I-LABEL: uint8_arg_to_sint8_ret:
44; RV32I:       # %bb.0:
45; RV32I-NEXT:    slli a0, a0, 24
46; RV32I-NEXT:    srai a0, a0, 24
47; RV32I-NEXT:    ret
48  ret i8 %a
49}
50
51declare void @receive_sint8(i8 signext)
52
53define void @pass_uint8_as_sint8(i8 zeroext %a) nounwind {
54; RV32I-LABEL: pass_uint8_as_sint8:
55; RV32I:       # %bb.0:
56; RV32I-NEXT:    addi sp, sp, -16
57; RV32I-NEXT:    sw ra, 12(sp)
58; RV32I-NEXT:    slli a0, a0, 24
59; RV32I-NEXT:    srai a0, a0, 24
60; RV32I-NEXT:    call receive_sint8
61; RV32I-NEXT:    lw ra, 12(sp)
62; RV32I-NEXT:    addi sp, sp, 16
63; RV32I-NEXT:    ret
64
65  call void @receive_sint8(i8 signext %a)
66  ret void
67}
68
69define signext i8 @ret_callresult_uint8_as_sint8() nounwind {
70; RV32I-LABEL: ret_callresult_uint8_as_sint8:
71; RV32I:       # %bb.0:
72; RV32I-NEXT:    addi sp, sp, -16
73; RV32I-NEXT:    sw ra, 12(sp)
74; RV32I-NEXT:    call return_uint8
75; RV32I-NEXT:    slli a0, a0, 24
76; RV32I-NEXT:    srai a0, a0, 24
77; RV32I-NEXT:    lw ra, 12(sp)
78; RV32I-NEXT:    addi sp, sp, 16
79; RV32I-NEXT:    ret
80  %1 = call zeroext i8 @return_uint8()
81  ret i8 %1
82}
83
84define signext i32 @uint8_arg_to_anyint32_ret(i8 zeroext %a) nounwind {
85; RV32I-LABEL: uint8_arg_to_anyint32_ret:
86; RV32I:       # %bb.0:
87; RV32I-NEXT:    ret
88  %1 = zext i8 %a to i32
89  ret i32 %1
90}
91
92declare void @receive_anyint32(i32 signext)
93
94define void @pass_uint8_as_anyint32(i8 zeroext %a) nounwind {
95; RV32I-LABEL: pass_uint8_as_anyint32:
96; RV32I:       # %bb.0:
97; RV32I-NEXT:    addi sp, sp, -16
98; RV32I-NEXT:    sw ra, 12(sp)
99; RV32I-NEXT:    call receive_anyint32
100; RV32I-NEXT:    lw ra, 12(sp)
101; RV32I-NEXT:    addi sp, sp, 16
102; RV32I-NEXT:    ret
103  %1 = zext i8 %a to i32
104  call void @receive_anyint32(i32 signext %1)
105  ret void
106}
107
108define signext i32 @ret_callresult_uint8_as_anyint32() nounwind {
109; RV32I-LABEL: ret_callresult_uint8_as_anyint32:
110; RV32I:       # %bb.0:
111; RV32I-NEXT:    addi sp, sp, -16
112; RV32I-NEXT:    sw ra, 12(sp)
113; RV32I-NEXT:    call return_uint8
114; RV32I-NEXT:    lw ra, 12(sp)
115; RV32I-NEXT:    addi sp, sp, 16
116; RV32I-NEXT:    ret
117  %1 = call zeroext i8 @return_uint8()
118  %2 = zext i8 %1 to i32
119  ret i32 %2
120}
121
122define zeroext i8 @sint8_arg_to_uint8_ret(i8 signext %a) nounwind {
123; RV32I-LABEL: sint8_arg_to_uint8_ret:
124; RV32I:       # %bb.0:
125; RV32I-NEXT:    andi a0, a0, 255
126; RV32I-NEXT:    ret
127  ret i8 %a
128}
129
130define void @pass_sint8_as_uint8(i8 signext %a) nounwind {
131; RV32I-LABEL: pass_sint8_as_uint8:
132; RV32I:       # %bb.0:
133; RV32I-NEXT:    addi sp, sp, -16
134; RV32I-NEXT:    sw ra, 12(sp)
135; RV32I-NEXT:    andi a0, a0, 255
136; RV32I-NEXT:    call receive_uint8
137; RV32I-NEXT:    lw ra, 12(sp)
138; RV32I-NEXT:    addi sp, sp, 16
139; RV32I-NEXT:    ret
140  call void @receive_uint8(i8 zeroext %a)
141  ret void
142}
143
144declare signext i8 @return_sint8()
145
146define zeroext i8 @ret_callresult_sint8_as_uint8() nounwind {
147; RV32I-LABEL: ret_callresult_sint8_as_uint8:
148; RV32I:       # %bb.0:
149; RV32I-NEXT:    addi sp, sp, -16
150; RV32I-NEXT:    sw ra, 12(sp)
151; RV32I-NEXT:    call return_sint8
152; RV32I-NEXT:    andi a0, a0, 255
153; RV32I-NEXT:    lw ra, 12(sp)
154; RV32I-NEXT:    addi sp, sp, 16
155; RV32I-NEXT:    ret
156  %1 = call signext i8 @return_sint8()
157  ret i8 %1
158}
159
160define signext i8 @sint8_arg_to_sint8_ret(i8 signext %a) nounwind {
161; RV32I-LABEL: sint8_arg_to_sint8_ret:
162; RV32I:       # %bb.0:
163; RV32I-NEXT:    ret
164  ret i8 %a
165}
166
167define void @pass_sint8_as_sint8(i8 signext %a) nounwind {
168; RV32I-LABEL: pass_sint8_as_sint8:
169; RV32I:       # %bb.0:
170; RV32I-NEXT:    addi sp, sp, -16
171; RV32I-NEXT:    sw ra, 12(sp)
172; RV32I-NEXT:    call receive_sint8
173; RV32I-NEXT:    lw ra, 12(sp)
174; RV32I-NEXT:    addi sp, sp, 16
175; RV32I-NEXT:    ret
176  call void @receive_sint8(i8 signext %a)
177  ret void
178}
179
180define signext i8 @ret_callresult_sint8_as_sint8() nounwind {
181; RV32I-LABEL: ret_callresult_sint8_as_sint8:
182; RV32I:       # %bb.0:
183; RV32I-NEXT:    addi sp, sp, -16
184; RV32I-NEXT:    sw ra, 12(sp)
185; RV32I-NEXT:    call return_sint8
186; RV32I-NEXT:    lw ra, 12(sp)
187; RV32I-NEXT:    addi sp, sp, 16
188; RV32I-NEXT:    ret
189  %1 = call signext i8 @return_sint8()
190  ret i8 %1
191}
192
193define signext i32 @sint8_arg_to_anyint32_ret(i8 signext %a) nounwind {
194; RV32I-LABEL: sint8_arg_to_anyint32_ret:
195; RV32I:       # %bb.0:
196; RV32I-NEXT:    ret
197  %1 = sext i8 %a to i32
198  ret i32 %1
199}
200
201define void @pass_sint8_as_anyint32(i8 signext %a) nounwind {
202; RV32I-LABEL: pass_sint8_as_anyint32:
203; RV32I:       # %bb.0:
204; RV32I-NEXT:    addi sp, sp, -16
205; RV32I-NEXT:    sw ra, 12(sp)
206; RV32I-NEXT:    call receive_anyint32
207; RV32I-NEXT:    lw ra, 12(sp)
208; RV32I-NEXT:    addi sp, sp, 16
209; RV32I-NEXT:    ret
210  %1 = sext i8 %a to i32
211  call void @receive_anyint32(i32 signext %1)
212  ret void
213}
214
215define signext i32 @ret_callresult_sint8_as_anyint32() nounwind {
216; RV32I-LABEL: ret_callresult_sint8_as_anyint32:
217; RV32I:       # %bb.0:
218; RV32I-NEXT:    addi sp, sp, -16
219; RV32I-NEXT:    sw ra, 12(sp)
220; RV32I-NEXT:    call return_sint8
221; RV32I-NEXT:    lw ra, 12(sp)
222; RV32I-NEXT:    addi sp, sp, 16
223; RV32I-NEXT:    ret
224  %1 = call signext i8 @return_sint8()
225  %2 = sext i8 %1 to i32
226  ret i32 %2
227}
228
229define zeroext i8 @anyint32_arg_to_uint8_ret(i32 signext %a) nounwind {
230; RV32I-LABEL: anyint32_arg_to_uint8_ret:
231; RV32I:       # %bb.0:
232; RV32I-NEXT:    andi a0, a0, 255
233; RV32I-NEXT:    ret
234  %1 = trunc i32 %a to i8
235  ret i8 %1
236}
237
238define void @pass_anyint32_as_uint8(i32 signext %a) nounwind {
239; RV32I-LABEL: pass_anyint32_as_uint8:
240; RV32I:       # %bb.0:
241; RV32I-NEXT:    addi sp, sp, -16
242; RV32I-NEXT:    sw ra, 12(sp)
243; RV32I-NEXT:    andi a0, a0, 255
244; RV32I-NEXT:    call receive_uint8
245; RV32I-NEXT:    lw ra, 12(sp)
246; RV32I-NEXT:    addi sp, sp, 16
247; RV32I-NEXT:    ret
248  %1 = trunc i32 %a to i8
249  call void @receive_uint8(i8 zeroext %1)
250  ret void
251}
252
253declare signext i32 @return_anyint32()
254
255define zeroext i8 @ret_callresult_anyint32_as_uint8() nounwind {
256; RV32I-LABEL: ret_callresult_anyint32_as_uint8:
257; RV32I:       # %bb.0:
258; RV32I-NEXT:    addi sp, sp, -16
259; RV32I-NEXT:    sw ra, 12(sp)
260; RV32I-NEXT:    call return_anyint32
261; RV32I-NEXT:    andi a0, a0, 255
262; RV32I-NEXT:    lw ra, 12(sp)
263; RV32I-NEXT:    addi sp, sp, 16
264; RV32I-NEXT:    ret
265  %1 = call signext i32 @return_anyint32()
266  %2 = trunc i32 %1 to i8
267  ret i8 %2
268}
269
270define signext i8 @anyint32_arg_to_sint8_ret(i32 signext %a) nounwind {
271; RV32I-LABEL: anyint32_arg_to_sint8_ret:
272; RV32I:       # %bb.0:
273; RV32I-NEXT:    slli a0, a0, 24
274; RV32I-NEXT:    srai a0, a0, 24
275; RV32I-NEXT:    ret
276  %1 = trunc i32 %a to i8
277  ret i8 %1
278}
279
280define void @pass_anyint32_as_sint8(i32 signext %a) nounwind {
281; RV32I-LABEL: pass_anyint32_as_sint8:
282; RV32I:       # %bb.0:
283; RV32I-NEXT:    addi sp, sp, -16
284; RV32I-NEXT:    sw ra, 12(sp)
285; RV32I-NEXT:    slli a0, a0, 24
286; RV32I-NEXT:    srai a0, a0, 24
287; RV32I-NEXT:    call receive_sint8
288; RV32I-NEXT:    lw ra, 12(sp)
289; RV32I-NEXT:    addi sp, sp, 16
290; RV32I-NEXT:    ret
291  %1 = trunc i32 %a to i8
292  call void @receive_sint8(i8 signext %1)
293  ret void
294}
295
296define signext i8 @ret_callresult_anyint32_as_sint8() nounwind {
297; RV32I-LABEL: ret_callresult_anyint32_as_sint8:
298; RV32I:       # %bb.0:
299; RV32I-NEXT:    addi sp, sp, -16
300; RV32I-NEXT:    sw ra, 12(sp)
301; RV32I-NEXT:    call return_anyint32
302; RV32I-NEXT:    slli a0, a0, 24
303; RV32I-NEXT:    srai a0, a0, 24
304; RV32I-NEXT:    lw ra, 12(sp)
305; RV32I-NEXT:    addi sp, sp, 16
306; RV32I-NEXT:    ret
307  %1 = call signext i32 @return_anyint32()
308  %2 = trunc i32 %1 to i8
309  ret i8 %2
310}
311
312define signext i32 @anyint32_arg_to_anyint32_ret(i32 signext %a) nounwind {
313; RV32I-LABEL: anyint32_arg_to_anyint32_ret:
314; RV32I:       # %bb.0:
315; RV32I-NEXT:    ret
316  ret i32 %a
317}
318
319define void @pass_anyint32_as_anyint32(i32 signext %a) nounwind {
320; RV32I-LABEL: pass_anyint32_as_anyint32:
321; RV32I:       # %bb.0:
322; RV32I-NEXT:    addi sp, sp, -16
323; RV32I-NEXT:    sw ra, 12(sp)
324; RV32I-NEXT:    call receive_anyint32
325; RV32I-NEXT:    lw ra, 12(sp)
326; RV32I-NEXT:    addi sp, sp, 16
327; RV32I-NEXT:    ret
328  call void @receive_anyint32(i32 signext %a)
329  ret void
330}
331
332define signext i32 @ret_callresult_anyint32_as_anyint32() nounwind {
333; RV32I-LABEL: ret_callresult_anyint32_as_anyint32:
334; RV32I:       # %bb.0:
335; RV32I-NEXT:    addi sp, sp, -16
336; RV32I-NEXT:    sw ra, 12(sp)
337; RV32I-NEXT:    call return_anyint32
338; RV32I-NEXT:    lw ra, 12(sp)
339; RV32I-NEXT:    addi sp, sp, 16
340; RV32I-NEXT:    ret
341  %1 = call signext i32 @return_anyint32()
342  ret i32 %1
343}
344
345