1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefix=RV32F %s 4; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \ 5; RUN: | FileCheck -check-prefix=RV64F %s 6 7@gf = external global float 8 9define float @constraint_f_float(float %a) nounwind { 10; RV32F-LABEL: constraint_f_float: 11; RV32F: # %bb.0: 12; RV32F-NEXT: lui a1, %hi(gf) 13; RV32F-NEXT: flw ft0, %lo(gf)(a1) 14; RV32F-NEXT: fmv.w.x ft1, a0 15; RV32F-NEXT: #APP 16; RV32F-NEXT: fadd.s ft0, ft1, ft0 17; RV32F-NEXT: #NO_APP 18; RV32F-NEXT: fmv.x.w a0, ft0 19; RV32F-NEXT: ret 20; 21; RV64F-LABEL: constraint_f_float: 22; RV64F: # %bb.0: 23; RV64F-NEXT: lui a1, %hi(gf) 24; RV64F-NEXT: flw ft0, %lo(gf)(a1) 25; RV64F-NEXT: fmv.w.x ft1, a0 26; RV64F-NEXT: #APP 27; RV64F-NEXT: fadd.s ft0, ft1, ft0 28; RV64F-NEXT: #NO_APP 29; RV64F-NEXT: fmv.x.w a0, ft0 30; RV64F-NEXT: ret 31 %1 = load float, float* @gf 32 %2 = tail call float asm "fadd.s $0, $1, $2", "=f,f,f"(float %a, float %1) 33 ret float %2 34} 35 36define float @constraint_f_float_abi_name(float %a) nounwind { 37; RV32F-LABEL: constraint_f_float_abi_name: 38; RV32F: # %bb.0: 39; RV32F-NEXT: lui a1, %hi(gf) 40; RV32F-NEXT: flw fs0, %lo(gf)(a1) 41; RV32F-NEXT: fmv.w.x fa0, a0 42; RV32F-NEXT: #APP 43; RV32F-NEXT: fadd.s ft0, fa0, fs0 44; RV32F-NEXT: #NO_APP 45; RV32F-NEXT: fmv.x.w a0, ft0 46; RV32F-NEXT: ret 47; 48; RV64F-LABEL: constraint_f_float_abi_name: 49; RV64F: # %bb.0: 50; RV64F-NEXT: lui a1, %hi(gf) 51; RV64F-NEXT: flw fs0, %lo(gf)(a1) 52; RV64F-NEXT: fmv.w.x fa0, a0 53; RV64F-NEXT: #APP 54; RV64F-NEXT: fadd.s ft0, fa0, fs0 55; RV64F-NEXT: #NO_APP 56; RV64F-NEXT: fmv.x.w a0, ft0 57; RV64F-NEXT: ret 58 %1 = load float, float* @gf 59 %2 = tail call float asm "fadd.s $0, $1, $2", "={ft0},{fa0},{fs0}"(float %a, float %1) 60 ret float %2 61} 62