1; Test 128-bit floating-point loads.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs | FileCheck %s
4
5; Check loads with no offset.
6define double @f1(i64 %src) {
7; CHECK-LABEL: f1:
8; CHECK: ld %f0, 0(%r2)
9; CHECK: ld %f2, 8(%r2)
10; CHECK: br %r14
11  %ptr = inttoptr i64 %src to fp128 *
12  %val = load fp128, fp128 *%ptr
13  %trunc = fptrunc fp128 %val to double
14  ret double %trunc
15}
16
17; Check the highest aligned offset that allows LD for both halves.
18define double @f2(i64 %src) {
19; CHECK-LABEL: f2:
20; CHECK: ld %f0, 4080(%r2)
21; CHECK: ld %f2, 4088(%r2)
22; CHECK: br %r14
23  %add = add i64 %src, 4080
24  %ptr = inttoptr i64 %add to fp128 *
25  %val = load fp128, fp128 *%ptr
26  %trunc = fptrunc fp128 %val to double
27  ret double %trunc
28}
29
30; Check the next doubleword up, which requires a mixture of LD and LDY.
31define double @f3(i64 %src) {
32; CHECK-LABEL: f3:
33; CHECK: ld %f0, 4088(%r2)
34; CHECK: ldy %f2, 4096(%r2)
35; CHECK: br %r14
36  %add = add i64 %src, 4088
37  %ptr = inttoptr i64 %add to fp128 *
38  %val = load fp128, fp128 *%ptr
39  %trunc = fptrunc fp128 %val to double
40  ret double %trunc
41}
42
43; Check the next doubleword after that, which requires LDY for both halves.
44define double @f4(i64 %src) {
45; CHECK-LABEL: f4:
46; CHECK: ldy %f0, 4096(%r2)
47; CHECK: ldy %f2, 4104(%r2)
48; CHECK: br %r14
49  %add = add i64 %src, 4096
50  %ptr = inttoptr i64 %add to fp128 *
51  %val = load fp128, fp128 *%ptr
52  %trunc = fptrunc fp128 %val to double
53  ret double %trunc
54}
55
56; Check the highest aligned offset that allows LDY for both halves.
57define double @f5(i64 %src) {
58; CHECK-LABEL: f5:
59; CHECK: ldy %f0, 524272(%r2)
60; CHECK: ldy %f2, 524280(%r2)
61; CHECK: br %r14
62  %add = add i64 %src, 524272
63  %ptr = inttoptr i64 %add to fp128 *
64  %val = load fp128, fp128 *%ptr
65  %trunc = fptrunc fp128 %val to double
66  ret double %trunc
67}
68
69; Check the next doubleword up, which requires separate address logic.
70; Other sequences besides this one would be OK.
71define double @f6(i64 %src) {
72; CHECK-LABEL: f6:
73; CHECK: lay %r1, 524280(%r2)
74; CHECK: ld %f0, 0(%r1)
75; CHECK: ld %f2, 8(%r1)
76; CHECK: br %r14
77  %add = add i64 %src, 524280
78  %ptr = inttoptr i64 %add to fp128 *
79  %val = load fp128, fp128 *%ptr
80  %trunc = fptrunc fp128 %val to double
81  ret double %trunc
82}
83
84; Check the highest aligned negative offset, which needs a combination of
85; LDY and LD.
86define double @f7(i64 %src) {
87; CHECK-LABEL: f7:
88; CHECK: ldy %f0, -8(%r2)
89; CHECK: ld %f2, 0(%r2)
90; CHECK: br %r14
91  %add = add i64 %src, -8
92  %ptr = inttoptr i64 %add to fp128 *
93  %val = load fp128, fp128 *%ptr
94  %trunc = fptrunc fp128 %val to double
95  ret double %trunc
96}
97
98; Check the next doubleword down, which requires LDY for both halves.
99define double @f8(i64 %src) {
100; CHECK-LABEL: f8:
101; CHECK: ldy %f0, -16(%r2)
102; CHECK: ldy %f2, -8(%r2)
103; CHECK: br %r14
104  %add = add i64 %src, -16
105  %ptr = inttoptr i64 %add to fp128 *
106  %val = load fp128, fp128 *%ptr
107  %trunc = fptrunc fp128 %val to double
108  ret double %trunc
109}
110
111; Check the lowest offset that allows LDY for both halves.
112define double @f9(i64 %src) {
113; CHECK-LABEL: f9:
114; CHECK: ldy %f0, -524288(%r2)
115; CHECK: ldy %f2, -524280(%r2)
116; CHECK: br %r14
117  %add = add i64 %src, -524288
118  %ptr = inttoptr i64 %add to fp128 *
119  %val = load fp128, fp128 *%ptr
120  %trunc = fptrunc fp128 %val to double
121  ret double %trunc
122}
123
124; Check the next doubleword down, which requires separate address logic.
125; Other sequences besides this one would be OK.
126define double @f10(i64 %src) {
127; CHECK-LABEL: f10:
128; CHECK: agfi %r2, -524296
129; CHECK: ld %f0, 0(%r2)
130; CHECK: ld %f2, 8(%r2)
131; CHECK: br %r14
132  %add = add i64 %src, -524296
133  %ptr = inttoptr i64 %add to fp128 *
134  %val = load fp128, fp128 *%ptr
135  %trunc = fptrunc fp128 %val to double
136  ret double %trunc
137}
138
139; Check that indices are allowed.
140define double @f11(i64 %src, i64 %index) {
141; CHECK-LABEL: f11:
142; CHECK: ld %f0, 4088({{%r2,%r3|%r3,%r2}})
143; CHECK: ldy %f2, 4096({{%r2,%r3|%r3,%r2}})
144; CHECK: br %r14
145  %add1 = add i64 %src, %index
146  %add2 = add i64 %add1, 4088
147  %ptr = inttoptr i64 %add2 to fp128 *
148  %val = load fp128, fp128 *%ptr
149  %trunc = fptrunc fp128 %val to double
150  ret double %trunc
151}
152