1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; Test shortening of NILL to NILF when the result is used as a shift amount.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5
6; Test logical shift right.
7define i32 @f1(i32 %a, i32 %sh) {
8; CHECK-LABEL: f1:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    nill %r3, 31
11; CHECK-NEXT:    srl %r2, 0(%r3)
12; CHECK-NEXT:    br %r14
13  %and = and i32 %sh, 31
14  %shift = lshr i32 %a, %and
15  ret i32 %shift
16}
17
18; Test arithmetic shift right.
19define i32 @f2(i32 %a, i32 %sh) {
20; CHECK-LABEL: f2:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    nill %r3, 31
23; CHECK-NEXT:    sra %r2, 0(%r3)
24; CHECK-NEXT:    br %r14
25  %and = and i32 %sh, 31
26  %shift = ashr i32 %a, %and
27  ret i32 %shift
28}
29
30; Test shift left.
31define i32 @f3(i32 %a, i32 %sh) {
32; CHECK-LABEL: f3:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    nill %r3, 31
35; CHECK-NEXT:    sll %r2, 0(%r3)
36; CHECK-NEXT:    br %r14
37  %and = and i32 %sh, 31
38  %shift = shl i32 %a, %and
39  ret i32 %shift
40}
41
42; Test 64-bit logical shift right.
43define i64 @f4(i64 %a, i64 %sh) {
44; CHECK-LABEL: f4:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    nill %r3, 31
47; CHECK-NEXT:    srlg %r2, %r2, 0(%r3)
48; CHECK-NEXT:    br %r14
49  %and = and i64 %sh, 31
50  %shift = lshr i64 %a, %and
51  ret i64 %shift
52}
53
54; Test 64-bit arithmetic shift right.
55define i64 @f5(i64 %a, i64 %sh) {
56; CHECK-LABEL: f5:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    nill %r3, 31
59; CHECK-NEXT:    srag %r2, %r2, 0(%r3)
60; CHECK-NEXT:    br %r14
61  %and = and i64 %sh, 31
62  %shift = ashr i64 %a, %and
63  ret i64 %shift
64}
65
66; Test 64-bit shift left.
67define i64 @f6(i64 %a, i64 %sh) {
68; CHECK-LABEL: f6:
69; CHECK:       # %bb.0:
70; CHECK-NEXT:    nill %r3, 31
71; CHECK-NEXT:    sllg %r2, %r2, 0(%r3)
72; CHECK-NEXT:    br %r14
73  %and = and i64 %sh, 31
74  %shift = shl i64 %a, %and
75  ret i64 %shift
76}
77
78; Test shift with negative 32-bit value.
79define i32 @f8(i32 %a, i32 %sh, i32 %test) {
80; CHECK-LABEL: f8:
81; CHECK:       # %bb.0:
82; CHECK-NEXT:    nill %r3, 65529
83; CHECK-NEXT:    sll %r2, 0(%r3)
84; CHECK-NEXT:    br %r14
85  %and = and i32 %sh, -7
86  %shift = shl i32 %a, %and
87
88  ret i32 %shift
89}
90
91; Test shift with negative 64-bit value.
92define i64 @f9(i64 %a, i64 %sh, i64 %test) {
93; CHECK-LABEL: f9:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    nill %r3, 65529
96; CHECK-NEXT:    sllg %r2, %r2, 0(%r3)
97; CHECK-NEXT:    br %r14
98  %and = and i64 %sh, -7
99  %shift = shl i64 %a, %and
100
101  ret i64 %shift
102}
103