1# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -misched=shuffle -verify-machineinstrs -start-before=simple-register-coalescing -systemz-subreg-liveness %s -o - | FileCheck %s
2
3# -misched=shuffle is under !NDEBUG.
4# REQUIRES: asserts
5
6# Check for successful compilation.
7# CHECK: lhi %r0, 0
8
9--- |
10  target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
11  target triple = "s390x-unknown-linux-gnu"
12
13  @g_54 = external dso_local unnamed_addr global i8, align 2
14  @g_69 = external dso_local unnamed_addr global i32, align 4
15  @g_189 = external dso_local unnamed_addr global i16, align 2
16  @g_226 = external dso_local unnamed_addr global i8, align 2
17  @g_314 = external dso_local global [10 x i8], align 2
18  @g_334 = external dso_local global i32, align 4
19  @g_352 = external dso_local unnamed_addr global i64, align 8
20  @g_747 = external dso_local unnamed_addr global i1, align 2
21  @0 = internal unnamed_addr global i8 74, align 2
22  @g_1055 = external dso_local unnamed_addr global i16, align 2
23  @g_195 = external dso_local global i64**, align 8
24
25  ; Function Attrs: argmemonly nounwind
26  declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #0
27
28  ; Function Attrs: argmemonly nounwind
29  declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0
30
31  ; Function Attrs: nounwind
32  define dso_local fastcc void @func_32(i8 zeroext %arg, i16 zeroext %arg1) unnamed_addr #1 {
33  bb:
34    %tmp = alloca i32, align 4
35    %tmp2 = alloca [5 x [5 x i32***]], align 8
36    %tmp3 = bitcast [5 x [5 x i32***]]* %tmp2 to i8*
37    %tmp4 = getelementptr inbounds [5 x [5 x i32***]], [5 x [5 x i32***]]* %tmp2, i64 0, i64 2, i64 2
38    %tmp5 = bitcast i32**** %tmp4 to i64***
39    br label %bb6
40
41  bb6:                                              ; preds = %bb40, %bb
42    %tmp7 = phi i8 [ 0, %bb ], [ %tmp43, %bb40 ]
43    %tmp8 = phi i16 [ %arg1, %bb ], [ %tmp41, %bb40 ]
44    %tmp9 = phi i8 [ %arg, %bb ], [ 0, %bb40 ]
45    %tmp10 = sext i8 %tmp7 to i64
46    %tmp11 = add nsw i64 %tmp10, 1
47    %tmp12 = getelementptr inbounds [10 x i8], [10 x i8]* @g_314, i64 0, i64 %tmp11
48    %tmp13 = load volatile i8, i8* %tmp12, align 1, !tbaa !1
49    br i1 undef, label %bb39, label %bb14
50
51  bb14:                                             ; preds = %bb6
52    %tmp15 = load i64**, i64*** @g_195, align 8, !tbaa !4
53    %tmp16 = load volatile i8, i8* %tmp12, align 1, !tbaa !1
54    store i32 7, i32* %tmp, align 4, !tbaa !6
55    call void @llvm.lifetime.start.p0i8(i64 200, i8* nonnull %tmp3) #2
56    store i32 580868341, i32* @g_69, align 4, !tbaa !6
57    %tmp17 = zext i8 %tmp9 to i64
58    %tmp18 = load i64, i64* @g_352, align 8, !tbaa !8
59    %tmp19 = and i64 %tmp18, %tmp17
60    %tmp20 = icmp ne i64 %tmp19, 1
61    %tmp21 = zext i1 %tmp20 to i64
62    %tmp22 = load i64*, i64** %tmp15, align 8, !tbaa !4
63    store i64 %tmp21, i64* %tmp22, align 8, !tbaa !8
64    %tmp23 = load i32, i32* @g_334, align 4, !tbaa !6
65    %tmp24 = xor i32 %tmp23, 1
66    store i32 %tmp24, i32* @g_334, align 4, !tbaa !6
67    %tmp25 = zext i8 %tmp9 to i16
68    %tmp26 = mul i16 %tmp25, 26036
69    %tmp27 = load i64**, i64*** %tmp5, align 8
70    br label %bb28
71
72  bb28:                                             ; preds = %bb14
73    %tmp29 = mul i16 %tmp26, %tmp8
74    %tmp30 = zext i16 %tmp29 to i32
75    store i32 %tmp30, i32* @g_69, align 4, !tbaa !6
76    store i8 0, i8* @g_226, align 2, !tbaa !1
77    br label %bb32
78
79  bb31:                                             ; preds = %bb35
80    call void @llvm.lifetime.end.p0i8(i64 200, i8* nonnull %tmp3) #2
81    br label %bb40
82
83  bb32:                                             ; preds = %bb34, %bb28
84    store i16 1, i16* @g_1055, align 2, !tbaa !10
85    store i64 0, i64* @g_352, align 8, !tbaa !8
86    store i32* @g_334, i32** undef, align 8, !tbaa !4
87    %tmp33 = or i64 0, 1
88    store i64 %tmp33, i64* @g_352, align 8, !tbaa !8
89    store i32* @g_334, i32** null, align 8, !tbaa !4
90    br label %bb34
91
92  bb34:                                             ; preds = %bb32
93    br i1 false, label %bb32, label %bb35
94
95  bb35:                                             ; preds = %bb34
96    store i32* %tmp, i32** undef, align 8, !tbaa !4
97    store i8 0, i8* @0, align 2, !tbaa !1
98    store i16 2, i16* @g_189, align 2, !tbaa !10
99    store i8 1, i8* @g_54, align 2, !tbaa !1
100    store i1 true, i1* @g_747, align 2
101    store i64 0, i64* undef, align 8, !tbaa !8
102    %tmp36 = load i64*, i64** undef, align 8, !tbaa !4
103    %tmp37 = load i64, i64* %tmp36, align 8, !tbaa !4
104    %tmp38 = load i64*, i64** %tmp27, align 8, !tbaa !4
105    store i64 %tmp37, i64* %tmp38, align 8, !tbaa !4
106    store i16 0, i16* @g_189, align 2, !tbaa !10
107    br label %bb31
108
109  bb39:                                             ; preds = %bb6
110    br label %bb40
111
112  bb40:                                             ; preds = %bb39, %bb31
113    %tmp41 = phi i16 [ undef, %bb39 ], [ 0, %bb31 ]
114    %tmp42 = load volatile i8, i8* %tmp12, align 1, !tbaa !1
115    %tmp43 = add i8 %tmp7, 1
116    br i1 false, label %bb6, label %bb44
117
118  bb44:                                             ; preds = %bb40
119    unreachable
120  }
121
122  ; Function Attrs: nounwind
123  declare void @llvm.stackprotector(i8*, i8**) #2
124
125  attributes #0 = { argmemonly nounwind "target-cpu"="z13" }
126  attributes #1 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="z13" "target-features"="+transactional-execution,+vector" "unsafe-fp-math"="false" "use-soft-float"="false" }
127  attributes #2 = { nounwind }
128
129  !llvm.ident = !{!0}
130
131  !0 = !{!"clang version 8.0.0"}
132  !1 = !{!2, !2, i64 0}
133  !2 = !{!"omnipotent char", !3, i64 0}
134  !3 = !{!"Simple C/C++ TBAA"}
135  !4 = !{!5, !5, i64 0}
136  !5 = !{!"any pointer", !2, i64 0}
137  !6 = !{!7, !7, i64 0}
138  !7 = !{!"int", !2, i64 0}
139  !8 = !{!9, !9, i64 0}
140  !9 = !{!"long", !2, i64 0}
141  !10 = !{!11, !11, i64 0}
142  !11 = !{!"short", !2, i64 0}
143
144...
145---
146name:            func_32
147alignment:       16
148tracksRegLiveness: true
149liveins:
150  - { reg: '$r2d', virtual-reg: '%10' }
151  - { reg: '$r3d', virtual-reg: '%11' }
152frameInfo:
153  maxAlignment:    8
154stack:
155  - { id: 0, name: tmp, size: 4, alignment: 4, stack-id: default }
156  - { id: 1, name: tmp2, size: 200, alignment: 8, stack-id: default }
157body:             |
158  bb.0.bb:
159    liveins: $r2d, $r3d
160
161    %11:gr64bit = COPY killed $r3d
162    %10:gr64bit = COPY killed $r2d
163    %13:grx32bit = COPY killed %11.subreg_l32
164    %12:grx32bit = COPY killed %10.subreg_l32
165    %1:addr64bit = LA %stack.1.tmp2, 96, $noreg
166    %14:gr32bit = LHIMux 0
167    %18:addr64bit = LARL @g_314
168    %23:gr32bit = IIFMux 580868341
169    %26:addr64bit = LARL @g_352
170    %29:gr64bit = LGHI 0
171    %32:addr64bit = LARL @g_334
172    %33:gr32bit = LHIMux 1
173    %39:addr64bit = LARL @g_226
174    %44:gr64bit = LGHI 1
175    %46:gr64bit = LA %stack.0.tmp, 0, $noreg
176    %48:addr64bit = LARL @0
177    %49:gr32bit = LHIMux 2
178    %50:addr64bit = LARL @g_54
179    %51:addr64bit = LARL @g_747
180    %61:grx32bit = COPY %14
181    %62:gr32bit = COPY killed %13
182    %63:grx32bit = COPY killed %12
183
184  bb.1.bb6:
185    %4:grx32bit = COPY killed %63
186    %3:gr32bit = COPY killed %62
187    %2:grx32bit = COPY killed %61
188    undef %15.subreg_l32:gr64bit = COPY %2
189    %17:addr64bit = LGBR killed %15
190    %5:addr64bit = LA %17, 1, %18
191    dead %19:grx32bit = LBMux killed %17, 1, %18 :: (volatile load 1 from %ir.tmp12, !tbaa !1)
192    CHIMux %14, 0, implicit-def $cc
193    BRC 14, 6, %bb.7, implicit killed $cc
194    J %bb.2
195
196  bb.2.bb14:
197    %21:addr64bit = LGRL @g_195 :: (dereferenceable load 8 from @g_195, !tbaa !4)
198    dead %22:grx32bit = LBMux %5, 0, $noreg :: (volatile load 1 from %ir.tmp12, !tbaa !1)
199    MVHI %stack.0.tmp, 0, 7 :: (store 4 into %ir.tmp, !tbaa !6)
200    STRL %23, @g_69 :: (store 4 into @g_69, !tbaa !6)
201    undef %24.subreg_l32:gr64bit = COPY %4
202    %27:gr64bit = LLGC %26, 7, $noreg :: (dereferenceable load 1 from @g_352 + 7, !tbaa !8)
203    %28:gr64bit = COPY killed %27
204    %28:gr64bit = RNSBG %28, killed %24, 0, 63, 0, implicit-def dead $cc
205    CGHI killed %28, 1, implicit-def $cc
206    %30:gr64bit = COPY %29
207    %30:gr64bit = LOCGHI %30, 1, 14, 6, implicit killed $cc
208    %31:addr64bit = LG killed %21, 0, $noreg :: (load 8 from %ir.tmp15)
209    STG killed %30, killed %31, 0, $noreg :: (store 8 into %ir.tmp22)
210    %34:gr32bit = COPY %33
211    %34:gr32bit = X %34, %32, 0, $noreg, implicit-def dead $cc :: (dereferenceable load 4 from @g_334, !tbaa !6)
212    STRL killed %34, @g_334 :: (store 4 into @g_334, !tbaa !6)
213    %35:gr32bit = LLCRMux killed %4
214    %36:gr32bit = COPY killed %35
215    %36:gr32bit = MHI %36, 26036
216    %7:addr64bit = LG %1, 0, $noreg :: (dereferenceable load 8 from %ir.tmp5)
217
218  bb.3.bb28:
219    %37:gr32bit = COPY killed %36
220    %37:gr32bit = MSR %37, killed %3
221    %38:gr32bit = LLHRMux killed %37
222    STRL killed %38, @g_69 :: (store 4 into @g_69, !tbaa !6)
223    MVI %39, 0, 0 :: (store 1 into @g_226, align 2, !tbaa !1)
224    J %bb.4
225
226  bb.4.bb32:
227    STHRL %33, @g_1055 :: (store 2 into @g_1055, !tbaa !10)
228    STGRL %29, @g_352 :: (store 8 into @g_352, !tbaa !8)
229    STG %32, undef %43:addr64bit, 0, $noreg :: (store 8 into `i32** undef`)
230    STGRL %44, @g_352 :: (store 8 into @g_352, !tbaa !8)
231    STG %32, $noreg, 0, $noreg :: (store 8 into `i32** null`)
232
233  bb.5.bb34:
234    successors: %bb.4(0x7c000000), %bb.6(0x04000000)
235
236    CHIMux %14, 0, implicit-def $cc
237    BRC 14, 6, %bb.4, implicit killed $cc
238    J %bb.6
239
240  bb.6.bb35:
241    STG %46, undef %47:addr64bit, 0, $noreg :: (store 8 into `i32** undef`)
242    MVI %48, 0, 0 :: (store 1 into @0, align 2, !tbaa !1)
243    STHRL %49, @g_189 :: (store 2 into @g_189, !tbaa !10)
244    MVI %50, 0, 1 :: (store 1 into @g_54, align 2, !tbaa !1)
245    MVI %51, 0, 1 :: (store 1 into @g_747, align 2)
246    MVGHI undef %52:addr64bit, 0, 0 :: (store 8 into `i64* undef`)
247    %53:gr64bit = LG $noreg, 0, $noreg :: (load 8 from %ir.tmp36)
248    %54:addr64bit = LG killed %7, 0, $noreg :: (load 8 from %ir.tmp27)
249    STG killed %53, killed %54, 0, $noreg :: (store 8 into %ir.tmp38)
250    STHRL %14, @g_189 :: (store 2 into @g_189, !tbaa !10)
251    %60:grx32bit = LHIMux 0
252    %64:grx32bit = COPY killed %60
253    J %bb.8
254
255  bb.7.bb39:
256    %64:grx32bit = IMPLICIT_DEF
257
258  bb.8.bb40:
259    successors: %bb.1(0x7fffffff), %bb.9(0x00000001)
260
261    %8:grx32bit = COPY killed %64
262    dead %59:grx32bit = LBMux killed %5, 0, $noreg :: (volatile load 1 from %ir.tmp12, !tbaa !1)
263    %9:grx32bit = COPY killed %2
264    %9:grx32bit = AHIMux %9, 1, implicit-def dead $cc
265    %58:grx32bit = LHIMux 0
266    CHIMux %58, 0, implicit-def $cc
267    %61:grx32bit = COPY killed %9
268    %62:gr32bit = COPY killed %8
269    %63:grx32bit = COPY killed %58
270    BRC 14, 6, %bb.1, implicit killed $cc
271    J %bb.9
272
273  bb.9.bb44:
274
275...
276