1; Test signaling vector floating-point comparisons on z13. 2; Note that these must be scalarized as we do not have native instructions. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 5 6; Test v4f32. 7define <4 x i32> @f1(<4 x float> %val1, <4 x float> %val2) #0 { 8; CHECK-LABEL: f1: 9; CHECK: kebr 10; CHECK: kebr 11; CHECK: kebr 12; CHECK: kebr 13; CHECK: br %r14 14 %cmp = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32( 15 <4 x float> %val1, <4 x float> %val2, 16 metadata !"oeq", 17 metadata !"fpexcept.strict") #0 18 %ret = sext <4 x i1> %cmp to <4 x i32> 19 ret <4 x i32> %ret 20} 21 22; Test v2f64. 23define <2 x i64> @f2(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 { 24; CHECK-LABEL: f2: 25; CHECK: {{kdbr|wfkdb}} 26; CHECK: {{kdbr|wfkdb}} 27; CHECK: br %r14 28 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64( 29 <2 x double> %val1, <2 x double> %val2, 30 metadata !"oeq", 31 metadata !"fpexcept.strict") #0 32 %ret = sext <2 x i1> %cmp to <2 x i64> 33 ret <2 x i64> %ret 34} 35 36; Test an f64 comparison that uses vector registers. 37define i64 @f3(i64 %a, i64 %b, double %f1, <2 x double> %vec) #0 { 38; CHECK-LABEL: f3: 39; CHECK: wfkdb %f0, %v24 40; CHECK-NEXT: locgrne %r2, %r3 41; CHECK: br %r14 42 %f2 = extractelement <2 x double> %vec, i32 0 43 %cond = call i1 @llvm.experimental.constrained.fcmps.f64( 44 double %f1, double %f2, 45 metadata !"oeq", 46 metadata !"fpexcept.strict") #0 47 %res = select i1 %cond, i64 %a, i64 %b 48 ret i64 %res 49} 50 51attributes #0 = { strictfp } 52 53declare <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float>, <4 x float>, metadata, metadata) 54declare <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double>, <2 x double>, metadata, metadata) 55declare i1 @llvm.experimental.constrained.fcmps.f64(double, double, metadata, metadata) 56 57