1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s
3
4--- |
5  ; Function Attrs: nounwind
6  define hidden arm_aapcs_vfpcc void @cond_trip_count(float* %0, i32 %1, float* nocapture %2) local_unnamed_addr #1 {
7    ret void
8  }
9
10...
11---
12name:            cond_trip_count
13alignment:       4
14tracksRegLiveness: true
15registers:       []
16liveins:
17  - { reg: '$r0', virtual-reg: '' }
18  - { reg: '$r1', virtual-reg: '' }
19  - { reg: '$r2', virtual-reg: '' }
20frameInfo:
21  stackSize:       8
22  offsetAdjustment: 0
23  maxAlignment:    4
24fixedStack:      []
25stack:
26  - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
27      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
28      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
29  - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
30      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
31      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
32callSites:       []
33constants:
34  - id:              0
35    value:           'float 0.000000e+00'
36    alignment:       4
37    isTargetSpecific: false
38machineFunctionInfo: {}
39body:             |
40  ; CHECK-LABEL: name: cond_trip_count
41  ; CHECK: bb.0:
42  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
43  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r4
44  ; CHECK:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
45  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
46  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
47  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r4, -8
48  ; CHECK:   tCMPi8 renamable $r1, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr
49  ; CHECK:   renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg
50  ; CHECK:   tBcc %bb.2, 2 /* CC::hs */, killed $cpsr
51  ; CHECK: bb.1:
52  ; CHECK:   liveins: $r2
53  ; CHECK:   renamable $s0 = VLDRS %const.0, 0, 14 /* CC::al */, $noreg
54  ; CHECK:   VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg
55  ; CHECK:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
56  ; CHECK: bb.2:
57  ; CHECK:   successors: %bb.3(0x80000000)
58  ; CHECK:   liveins: $r0, $r1, $r2, $r12
59  ; CHECK:   renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
60  ; CHECK:   tCMPi8 renamable $r1, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr
61  ; CHECK:   t2IT 11, 8, implicit-def $itstate
62  ; CHECK:   $r12 = tMOVr renamable $r1, 11 /* CC::lt */, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate
63  ; CHECK:   renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14 /* CC::al */, $noreg, $noreg
64  ; CHECK:   renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14 /* CC::al */, $noreg
65  ; CHECK:   $r12 = tMOVr $r1, 14 /* CC::al */, $noreg
66  ; CHECK:   renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg
67  ; CHECK:   renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
68  ; CHECK:   $r3 = tMOVr $r0, 14 /* CC::al */, $noreg
69  ; CHECK:   $lr = MVE_DLSTP_32 killed renamable $r12
70  ; CHECK: bb.3:
71  ; CHECK:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
72  ; CHECK:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4
73  ; CHECK:   renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 0, $noreg
74  ; CHECK:   renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 0, killed $noreg, killed renamable $q0
75  ; CHECK:   renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg
76  ; CHECK:   $lr = MVE_LETP killed renamable $lr, %bb.3
77  ; CHECK: bb.4:
78  ; CHECK:   successors: %bb.5(0x80000000)
79  ; CHECK:   liveins: $q0, $r0, $r1, $r2, $r4
80  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg
81  ; CHECK:   dead $lr = tMOVr $r4, 14 /* CC::al */, $noreg
82  ; CHECK:   $r3 = tMOVr $r1, 14 /* CC::al */, $noreg
83  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg
84  ; CHECK:   renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0
85  ; CHECK:   $s2 = VMOVSR $r1, 14 /* CC::al */, $noreg
86  ; CHECK:   renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg
87  ; CHECK:   $lr = t2DLS killed $r4
88  ; CHECK:   renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg
89  ; CHECK:   renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
90  ; CHECK: bb.5:
91  ; CHECK:   successors: %bb.5(0x7c000000), %bb.6(0x04000000)
92  ; CHECK:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4
93  ; CHECK:   renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg
94  ; CHECK:   $r4 = VMOVRS $s4, 14 /* CC::al */, $noreg
95  ; CHECK:   MVE_VPST 2, implicit $vpr
96  ; CHECK:   renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr
97  ; CHECK:   renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, undef renamable $q2
98  ; CHECK:   renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, killed renamable $q2, 1, killed renamable $vpr
99  ; CHECK:   renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg
100  ; CHECK:   renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg
101  ; CHECK:   $lr = t2LEUpdate killed renamable $lr, %bb.5
102  ; CHECK: bb.6:
103  ; CHECK:   liveins: $q0, $r1, $r2
104  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg
105  ; CHECK:   renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14 /* CC::al */, $noreg
106  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg
107  ; CHECK:   renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0
108  ; CHECK:   $s2 = VMOVSR killed $r0, 14 /* CC::al */, $noreg
109  ; CHECK:   renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg
110  ; CHECK:   renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg
111  ; CHECK:   VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg
112  ; CHECK:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
113  ; CHECK: bb.7 (align 4):
114  ; CHECK:   CONSTPOOL_ENTRY 0, %const.0, 4
115  bb.0:
116    successors: %bb.1(0x40000000), %bb.2(0x40000000)
117    liveins: $r0, $r1, $r2, $r4, $lr
118
119    frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
120    frame-setup CFI_INSTRUCTION def_cfa_offset 8
121    frame-setup CFI_INSTRUCTION offset $lr, -4
122    frame-setup CFI_INSTRUCTION offset $r4, -8
123    tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr
124    renamable $r3 = t2MOVi 4, 14, $noreg, $noreg
125    t2IT 11, 8, implicit-def $itstate
126    $r3 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r3, implicit killed $itstate
127    tCMPi8 renamable $r1, 2, 14, $noreg, implicit-def $cpsr
128    renamable $r12 = t2MOVi 4, 14, $noreg, $noreg
129    tBcc %bb.2, 2, killed $cpsr
130
131  bb.1:
132    liveins: $r2
133
134    renamable $s0 = VLDRS %const.0, 0, 14, $noreg
135    VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg
136    tPOP_RET 14, $noreg, def $r4, def $pc
137
138  bb.2:
139    successors: %bb.3(0x80000000)
140    liveins: $r0, $r1, $r2, $r3, $r12
141
142    renamable $r3, dead $cpsr = tSUBrr renamable $r1, killed renamable $r3, 14, $noreg
143    renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
144    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg
145    tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr
146    renamable $lr = nuw nsw t2ADDrs renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
147    t2IT 11, 8, implicit-def $itstate
148    $r12 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate
149    renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14, $noreg, $noreg
150    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg
151    $r12 = tMOVr $r1, 14, $noreg
152    renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
153    renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
154    $r3 = tMOVr $r0, 14, $noreg
155    $lr = t2DoLoopStart renamable $lr
156
157  bb.3:
158    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
159    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r12
160
161    renamable $vpr = MVE_VCTP32 renamable $r12, 0, $noreg
162    renamable $lr = t2LoopDec killed renamable $lr, 1
163    MVE_VPST 4, implicit $vpr
164    renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 1, renamable $vpr
165    renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 1, killed renamable $vpr, renamable $q0
166    renamable $r12 = nsw t2SUBri killed renamable $r12, 4, 14, $noreg, $noreg
167    renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14, $noreg
168    t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr
169    tB %bb.4, 14, $noreg
170
171  bb.4:
172    successors: %bb.5(0x80000000)
173    liveins: $q0, $r0, $r1, $r2, $r4
174
175    renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg
176    $lr = tMOVr $r4, 14, $noreg
177    $r3 = tMOVr $r1, 14, $noreg
178    renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg
179    renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0
180    $s2 = VMOVSR $r1, 14, $noreg
181    renamable $s2 = VUITOS killed renamable $s2, 14, $noreg
182    $lr = t2DoLoopStart killed $r4
183    renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg
184    renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
185
186  bb.5:
187    successors: %bb.5(0x7c000000), %bb.6(0x04000000)
188    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4
189
190    renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg
191    $r4 = VMOVRS $s4, 14, $noreg
192    MVE_VPST 2, implicit $vpr
193    renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr
194    renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, undef renamable $q2
195    renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, renamable $q2, 1, killed renamable $vpr
196    renamable $lr = t2LoopDec killed renamable $lr, 1
197    renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14, $noreg
198    renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14, $noreg
199    t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr
200    tB %bb.6, 14, $noreg
201
202  bb.6:
203    liveins: $q0, $r1, $r2
204
205    renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg
206    renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14, $noreg
207    renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg
208    renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0
209    $s2 = VMOVSR killed $r0, 14, $noreg
210    renamable $s2 = VUITOS killed renamable $s2, 14, $noreg
211    renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg
212    VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg
213    tPOP_RET 14, $noreg, def $r4, def $pc
214
215  bb.7 (align 4):
216    CONSTPOOL_ENTRY 0, %const.0, 4
217
218...
219