1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s 3 4--- | 5 define dso_local arm_aapcscc i32 @test1(i32* nocapture %arg, i32* nocapture readonly %arg1, i32* nocapture readonly %arg2, i32 %arg3) { 6 bb: 7 %tmp = icmp eq i32 %arg3, 0 8 br i1 %tmp, label %bb27, label %bb4 9 10 bb4: ; preds = %bb 11 %tmp5 = add i32 %arg3, -1 12 %tmp6 = and i32 %arg3, 3 13 %tmp7 = icmp ult i32 %tmp5, 3 14 %tmp8 = add i32 %arg3, -4 15 %tmp9 = sub i32 %tmp8, %tmp6 16 %tmp10 = lshr i32 %tmp9, 2 17 %tmp11 = add nuw nsw i32 %tmp10, 1 18 br i1 %tmp7, label %bb13, label %bb12 19 20 bb12: ; preds = %bb4 21 %start = call i32 @llvm.start.loop.iterations.i32(i32 %tmp11) 22 br label %bb28 23 24 bb13: ; preds = %bb28, %bb4 25 %tmp14 = phi i32 [ 0, %bb4 ], [ %tmp54, %bb28 ] 26 %exit.count = phi i32 [ 0, %bb4 ], [ %loop.dec, %bb28 ] 27 %tmp15 = icmp eq i32 %tmp6, 0 28 br i1 %tmp15, label %bb27, label %bb16 29 30 bb16: ; preds = %bb13 31 %tmp17 = getelementptr inbounds i32, i32* %arg1, i32 %tmp14 32 %tmp18 = load i32, i32* %tmp17, align 4 33 %tmp19 = getelementptr inbounds i32, i32* %arg2, i32 %tmp14 34 %tmp20 = load i32, i32* %tmp19, align 4 35 %tmp21 = xor i32 %tmp20, %tmp18 36 %tmp22 = getelementptr inbounds i32, i32* %arg, i32 %tmp14 37 %tmp23 = load i32, i32* %tmp22, align 4 38 %tmp24 = add nsw i32 %tmp23, %tmp21 39 store i32 %tmp24, i32* %tmp22, align 4 40 %tmp25 = add nuw i32 %tmp14, 1 41 %tmp26 = icmp eq i32 %tmp6, 1 42 br i1 %tmp26, label %bb27, label %bb57 43 44 bb27: ; preds = %bb68, %bb57, %bb16, %bb13, %bb 45 %res = phi i32 [ %exit.count, %bb13 ], [ 3, %bb68 ], [ 2, %bb57 ], [ 1, %bb16 ], [ 0, %bb ] 46 ret i32 %res 47 48 bb28: ; preds = %bb28, %bb12 49 %lsr.iv15 = phi i32 [ %lsr.iv.next16, %bb28 ], [ %start, %bb12 ] 50 %lsr.iv = phi i32 [ %lsr.iv.next, %bb28 ], [ 0, %bb12 ] 51 %tmp29 = phi i32 [ 0, %bb12 ], [ %tmp54, %bb28 ] 52 %0 = bitcast i32* %arg1 to i8* 53 %1 = bitcast i32* %arg2 to i8* 54 %2 = bitcast i32* %arg to i8* 55 %uglygep14 = getelementptr i8, i8* %0, i32 %lsr.iv 56 %uglygep1415 = bitcast i8* %uglygep14 to i32* 57 %scevgep617 = bitcast i32* %uglygep1415 to i32* 58 %tmp34 = load i32, i32* %scevgep617, align 4 59 %uglygep8 = getelementptr i8, i8* %1, i32 %lsr.iv 60 %uglygep89 = bitcast i8* %uglygep8 to i32* 61 %scevgep418 = bitcast i32* %uglygep89 to i32* 62 %tmp35 = load i32, i32* %scevgep418, align 4 63 %tmp36 = xor i32 %tmp35, %tmp34 64 %uglygep2 = getelementptr i8, i8* %2, i32 %lsr.iv 65 %uglygep23 = bitcast i8* %uglygep2 to i32* 66 %scevgep219 = bitcast i32* %uglygep23 to i32* 67 %tmp37 = load i32, i32* %scevgep219, align 4 68 %tmp38 = add nsw i32 %tmp37, %tmp36 69 store i32 %tmp38, i32* %scevgep219, align 4 70 %uglygep33 = getelementptr i8, i8* %0, i32 %lsr.iv 71 %uglygep3334 = bitcast i8* %uglygep33 to i32* 72 %scevgep14 = getelementptr i32, i32* %uglygep3334, i32 1 73 %tmp39 = load i32, i32* %scevgep14, align 4 74 %uglygep27 = getelementptr i8, i8* %1, i32 %lsr.iv 75 %uglygep2728 = bitcast i8* %uglygep27 to i32* 76 %scevgep11 = getelementptr i32, i32* %uglygep2728, i32 1 77 %tmp40 = load i32, i32* %scevgep11, align 4 78 %tmp41 = xor i32 %tmp40, %tmp39 79 %uglygep20 = getelementptr i8, i8* %2, i32 %lsr.iv 80 %uglygep2021 = bitcast i8* %uglygep20 to i32* 81 %scevgep9 = getelementptr i32, i32* %uglygep2021, i32 1 82 %tmp42 = load i32, i32* %scevgep9, align 4 83 %tmp43 = add nsw i32 %tmp42, %tmp41 84 store i32 %tmp43, i32* %scevgep9, align 4 85 %uglygep30 = getelementptr i8, i8* %0, i32 %lsr.iv 86 %uglygep3031 = bitcast i8* %uglygep30 to i32* 87 %scevgep12 = getelementptr i32, i32* %uglygep3031, i32 2 88 %tmp44 = load i32, i32* %scevgep12, align 4 89 %uglygep24 = getelementptr i8, i8* %1, i32 %lsr.iv 90 %uglygep2425 = bitcast i8* %uglygep24 to i32* 91 %scevgep10 = getelementptr i32, i32* %uglygep2425, i32 2 92 %tmp45 = load i32, i32* %scevgep10, align 4 93 %tmp46 = xor i32 %tmp45, %tmp44 94 %uglygep17 = getelementptr i8, i8* %2, i32 %lsr.iv 95 %uglygep1718 = bitcast i8* %uglygep17 to i32* 96 %scevgep8 = getelementptr i32, i32* %uglygep1718, i32 2 97 %tmp47 = load i32, i32* %scevgep8, align 4 98 %tmp48 = add nsw i32 %tmp47, %tmp46 99 store i32 %tmp48, i32* %scevgep8, align 4 100 %uglygep11 = getelementptr i8, i8* %0, i32 %lsr.iv 101 %uglygep1112 = bitcast i8* %uglygep11 to i32* 102 %scevgep5 = getelementptr i32, i32* %uglygep1112, i32 3 103 %tmp49 = load i32, i32* %scevgep5, align 4 104 %uglygep5 = getelementptr i8, i8* %1, i32 %lsr.iv 105 %uglygep56 = bitcast i8* %uglygep5 to i32* 106 %scevgep3 = getelementptr i32, i32* %uglygep56, i32 3 107 %tmp50 = load i32, i32* %scevgep3, align 4 108 %tmp51 = xor i32 %tmp50, %tmp49 109 %uglygep = getelementptr i8, i8* %2, i32 %lsr.iv 110 %uglygep1 = bitcast i8* %uglygep to i32* 111 %scevgep1 = getelementptr i32, i32* %uglygep1, i32 3 112 %tmp52 = load i32, i32* %scevgep1, align 4 113 %tmp53 = add nsw i32 %tmp52, %tmp51 114 store i32 %tmp53, i32* %scevgep1, align 4 115 %tmp54 = add nuw i32 %tmp29, 4 116 %lsr.iv.next = add i32 %lsr.iv, 16 117 %loop.dec = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %lsr.iv15, i32 1) 118 %tmp56 = icmp ne i32 %loop.dec, 0 119 %lsr.iv.next16 = add nsw i32 %lsr.iv15, -1 120 br i1 %tmp56, label %bb28, label %bb13 121 122 bb57: ; preds = %bb16 123 %tmp58 = getelementptr inbounds i32, i32* %arg1, i32 %tmp25 124 %tmp59 = load i32, i32* %tmp58, align 4 125 %tmp60 = getelementptr inbounds i32, i32* %arg2, i32 %tmp25 126 %tmp61 = load i32, i32* %tmp60, align 4 127 %tmp62 = xor i32 %tmp61, %tmp59 128 %tmp63 = getelementptr inbounds i32, i32* %arg, i32 %tmp25 129 %tmp64 = load i32, i32* %tmp63, align 4 130 %tmp65 = add nsw i32 %tmp64, %tmp62 131 store i32 %tmp65, i32* %tmp63, align 4 132 %tmp66 = add nuw i32 %tmp14, 2 133 %tmp67 = icmp eq i32 %tmp6, 2 134 br i1 %tmp67, label %bb27, label %bb68 135 136 bb68: ; preds = %bb57 137 %tmp69 = getelementptr inbounds i32, i32* %arg1, i32 %tmp66 138 %tmp70 = load i32, i32* %tmp69, align 4 139 %tmp71 = getelementptr inbounds i32, i32* %arg2, i32 %tmp66 140 %tmp72 = load i32, i32* %tmp71, align 4 141 %tmp73 = xor i32 %tmp72, %tmp70 142 %tmp74 = getelementptr inbounds i32, i32* %arg, i32 %tmp66 143 %tmp75 = load i32, i32* %tmp74, align 4 144 %tmp76 = add nsw i32 %tmp75, %tmp73 145 store i32 %tmp76, i32* %tmp74, align 4 146 br label %bb27 147 } 148 149 declare i32 @llvm.start.loop.iterations.i32(i32) 150 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) 151 152... 153--- 154name: test1 155alignment: 2 156exposesReturnsTwice: false 157legalized: false 158regBankSelected: false 159selected: false 160failedISel: false 161tracksRegLiveness: true 162hasWinCFI: false 163registers: [] 164liveins: 165 - { reg: '$r0', virtual-reg: '' } 166 - { reg: '$r1', virtual-reg: '' } 167 - { reg: '$r2', virtual-reg: '' } 168 - { reg: '$r3', virtual-reg: '' } 169frameInfo: 170 isFrameAddressTaken: false 171 isReturnAddressTaken: false 172 hasStackMap: false 173 hasPatchPoint: false 174 stackSize: 40 175 offsetAdjustment: 0 176 maxAlignment: 4 177 adjustsStack: false 178 hasCalls: false 179 stackProtector: '' 180 maxCallFrameSize: 0 181 cvBytesOfCalleeSavedRegisters: 0 182 hasOpaqueSPAdjustment: false 183 hasVAStart: false 184 hasMustTailInVarArgFunc: false 185 localFrameSize: 0 186 savePoint: '' 187 restorePoint: '' 188fixedStack: [] 189stack: 190 - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4, 191 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 192 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 193 - { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 194 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 195 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 196 - { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 197 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true, 198 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 199 - { id: 3, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 200 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true, 201 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 202 - { id: 4, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 203 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 204 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 205 - { id: 5, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 206 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 207 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 208 - { id: 6, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 209 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 210 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 211 - { id: 7, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 212 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 213 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 214 - { id: 8, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 215 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 216 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 217 - { id: 9, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4, 218 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 219 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 220callSites: [] 221constants: [] 222machineFunctionInfo: {} 223body: | 224 ; CHECK-LABEL: name: test1 225 ; CHECK: bb.0.bb: 226 ; CHECK: successors: %bb.3(0x30000000), %bb.1(0x50000000) 227 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11 228 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr 229 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 36 230 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 231 ; CHECK: frame-setup CFI_INSTRUCTION offset $r11, -8 232 ; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -12 233 ; CHECK: frame-setup CFI_INSTRUCTION offset $r9, -16 234 ; CHECK: frame-setup CFI_INSTRUCTION offset $r8, -20 235 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -24 236 ; CHECK: frame-setup CFI_INSTRUCTION offset $r6, -28 237 ; CHECK: frame-setup CFI_INSTRUCTION offset $r5, -32 238 ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -36 239 ; CHECK: $sp = frame-setup tSUBspi $sp, 1, 14 /* CC::al */, $noreg 240 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 40 241 ; CHECK: tCBZ $r3, %bb.3 242 ; CHECK: bb.1.bb4: 243 ; CHECK: successors: %bb.2(0x40000000), %bb.4(0x40000000) 244 ; CHECK: liveins: $r0, $r1, $r2, $r3 245 ; CHECK: renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg 246 ; CHECK: renamable $r7 = t2ANDri renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 247 ; CHECK: tCMPi8 killed renamable $r4, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr 248 ; CHECK: tSTRspi killed renamable $r7, $sp, 0, 14 /* CC::al */, $noreg :: (store 4 into %stack.0) 249 ; CHECK: tBcc %bb.4, 2 /* CC::hs */, killed $cpsr 250 ; CHECK: bb.2: 251 ; CHECK: successors: %bb.6(0x80000000) 252 ; CHECK: liveins: $r0, $r1, $r2 253 ; CHECK: renamable $r8 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 254 ; CHECK: renamable $lr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 255 ; CHECK: tB %bb.6, 14 /* CC::al */, $noreg 256 ; CHECK: bb.3: 257 ; CHECK: successors: %bb.12(0x80000000) 258 ; CHECK: renamable $lr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 259 ; CHECK: tB %bb.12, 14 /* CC::al */, $noreg 260 ; CHECK: bb.4.bb12: 261 ; CHECK: successors: %bb.5(0x80000000) 262 ; CHECK: liveins: $r0, $r1, $r2, $r3 263 ; CHECK: renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 264 ; CHECK: renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg 265 ; CHECK: renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 266 ; CHECK: renamable $r8 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 267 ; CHECK: renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg 268 ; CHECK: dead $lr = t2DLS renamable $r3 269 ; CHECK: $lr = tMOVr killed $r3, 14 /* CC::al */, $noreg 270 ; CHECK: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 271 ; CHECK: bb.5.bb28: 272 ; CHECK: successors: %bb.5(0x7c000000), %bb.6(0x04000000) 273 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r3, $r8 274 ; CHECK: renamable $r5 = tLDRr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep617) 275 ; CHECK: renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg 276 ; CHECK: renamable $r6 = tLDRr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep418) 277 ; CHECK: renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14 /* CC::al */, $noreg, $noreg 278 ; CHECK: renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14 /* CC::al */, $noreg 279 ; CHECK: renamable $r6 = tLDRr renamable $r0, $r3, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep219) 280 ; CHECK: renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14 /* CC::al */, $noreg 281 ; CHECK: tSTRr killed renamable $r5, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store 4 into %ir.scevgep219) 282 ; CHECK: renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg 283 ; CHECK: renamable $r4 = tLDRi renamable $r7, 1, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep11) 284 ; CHECK: renamable $r6 = tLDRi renamable $r5, 1, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep14) 285 ; CHECK: renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14 /* CC::al */, $noreg, $noreg 286 ; CHECK: renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg 287 ; CHECK: $r11 = t2ADDri $r6, 4, 14 /* CC::al */, $noreg, $noreg 288 ; CHECK: renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg 289 ; CHECK: t2LDMIA killed $r11, 14 /* CC::al */, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1) 290 ; CHECK: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14 /* CC::al */, $noreg 291 ; CHECK: tSTRi killed renamable $r4, renamable $r6, 1, 14 /* CC::al */, $noreg :: (store 4 into %ir.scevgep9) 292 ; CHECK: renamable $r9 = t2LDRi12 renamable $r5, 8, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep12) 293 ; CHECK: renamable $r4 = tLDRi renamable $r7, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep10) 294 ; CHECK: renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14 /* CC::al */, $noreg, $noreg 295 ; CHECK: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14 /* CC::al */, $noreg 296 ; CHECK: tSTRi killed renamable $r4, renamable $r6, 2, 14 /* CC::al */, $noreg :: (store 4 into %ir.scevgep8) 297 ; CHECK: renamable $r4 = tLDRi killed renamable $r5, 3, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep5) 298 ; CHECK: renamable $r5 = tLDRi killed renamable $r7, 3, 14 /* CC::al */, $noreg :: (load 4 from %ir.scevgep3) 299 ; CHECK: renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14 /* CC::al */, $noreg 300 ; CHECK: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14 /* CC::al */, $noreg 301 ; CHECK: tSTRi killed renamable $r4, killed renamable $r6, 3, 14 /* CC::al */, $noreg :: (store 4 into %ir.scevgep1) 302 ; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.5 303 ; CHECK: bb.6.bb13: 304 ; CHECK: successors: %bb.12(0x30000000), %bb.7(0x50000000) 305 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r8 306 ; CHECK: renamable $r5 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load 4 from %stack.0) 307 ; CHECK: tCBZ $r5, %bb.12 308 ; CHECK: bb.7.bb16: 309 ; CHECK: successors: %bb.8(0x40000000), %bb.9(0x40000000) 310 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r5, $r8 311 ; CHECK: renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp17) 312 ; CHECK: tCMPi8 renamable $r5, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 313 ; CHECK: renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp19) 314 ; CHECK: renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14 /* CC::al */, $noreg, $noreg 315 ; CHECK: renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp22) 316 ; CHECK: renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14 /* CC::al */, $noreg 317 ; CHECK: t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14 /* CC::al */, $noreg :: (store 4 into %ir.tmp22) 318 ; CHECK: tBcc %bb.9, 1 /* CC::ne */, killed $cpsr 319 ; CHECK: bb.8: 320 ; CHECK: successors: %bb.12(0x80000000) 321 ; CHECK: renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg 322 ; CHECK: tB %bb.12, 14 /* CC::al */, $noreg 323 ; CHECK: bb.9.bb57: 324 ; CHECK: successors: %bb.10(0x40000000), %bb.11(0x40000000) 325 ; CHECK: liveins: $r0, $r1, $r2, $r5, $r8 326 ; CHECK: renamable $r3 = nuw t2ADDri renamable $r8, 1, 14 /* CC::al */, $noreg, $noreg 327 ; CHECK: tCMPi8 killed renamable $r5, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr 328 ; CHECK: renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp58) 329 ; CHECK: renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp60) 330 ; CHECK: renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14 /* CC::al */, $noreg, $noreg 331 ; CHECK: renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp63) 332 ; CHECK: renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14 /* CC::al */, $noreg 333 ; CHECK: t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg :: (store 4 into %ir.tmp63) 334 ; CHECK: tBcc %bb.11, 1 /* CC::ne */, killed $cpsr 335 ; CHECK: bb.10: 336 ; CHECK: successors: %bb.12(0x80000000) 337 ; CHECK: renamable $lr = t2MOVi 2, 14 /* CC::al */, $noreg, $noreg 338 ; CHECK: tB %bb.12, 14 /* CC::al */, $noreg 339 ; CHECK: bb.11.bb68: 340 ; CHECK: successors: %bb.12(0x80000000) 341 ; CHECK: liveins: $r0, $r1, $r2, $r8 342 ; CHECK: renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14 /* CC::al */, $noreg, $noreg 343 ; CHECK: renamable $lr = t2MOVi 3, 14 /* CC::al */, $noreg, $noreg 344 ; CHECK: renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp69) 345 ; CHECK: renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp71) 346 ; CHECK: renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 347 ; CHECK: renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load 4 from %ir.tmp74) 348 ; CHECK: renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 349 ; CHECK: t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg :: (store 4 into %ir.tmp74) 350 ; CHECK: bb.12.bb27: 351 ; CHECK: liveins: $lr 352 ; CHECK: $r0 = tMOVr killed $lr, 14 /* CC::al */, $noreg 353 ; CHECK: $sp = tADDspi $sp, 1, 14 /* CC::al */, $noreg 354 ; CHECK: $sp = t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0 355 bb.0.bb: 356 successors: %bb.3(0x30000000), %bb.1(0x50000000) 357 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr 358 359 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr 360 frame-setup CFI_INSTRUCTION def_cfa_offset 36 361 frame-setup CFI_INSTRUCTION offset $lr, -4 362 frame-setup CFI_INSTRUCTION offset $r11, -8 363 frame-setup CFI_INSTRUCTION offset $r10, -12 364 frame-setup CFI_INSTRUCTION offset $r9, -16 365 frame-setup CFI_INSTRUCTION offset $r8, -20 366 frame-setup CFI_INSTRUCTION offset $r7, -24 367 frame-setup CFI_INSTRUCTION offset $r6, -28 368 frame-setup CFI_INSTRUCTION offset $r5, -32 369 frame-setup CFI_INSTRUCTION offset $r4, -36 370 $sp = frame-setup tSUBspi $sp, 1, 14, $noreg 371 frame-setup CFI_INSTRUCTION def_cfa_offset 40 372 tCBZ $r3, %bb.3 373 374 bb.1.bb4: 375 successors: %bb.2(0x40000000), %bb.4(0x40000000) 376 liveins: $r0, $r1, $r2, $r3 377 378 renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg 379 renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg 380 tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr 381 tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0) 382 tBcc %bb.4, 2, killed $cpsr 383 384 bb.2: 385 successors: %bb.6(0x80000000) 386 liveins: $r0, $r1, $r2 387 388 renamable $r8 = t2MOVi 0, 14, $noreg, $noreg 389 renamable $lr = t2MOVi 0, 14, $noreg, $noreg 390 tB %bb.6, 14, $noreg 391 392 bb.3: 393 successors: %bb.12(0x80000000) 394 395 renamable $lr = t2MOVi 0, 14, $noreg, $noreg 396 tB %bb.12, 14, $noreg 397 398 bb.4.bb12: 399 successors: %bb.5(0x80000000) 400 liveins: $r0, $r1, $r2, $r3 401 402 renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg 403 renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg 404 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg 405 renamable $r8 = t2MOVi 0, 14, $noreg, $noreg 406 renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg 407 $lr = t2DoLoopStart renamable $r3 408 $lr = tMOVr $r3, 14, $noreg 409 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 410 411 bb.5.bb28: 412 successors: %bb.5(0x7c000000), %bb.6(0x04000000) 413 liveins: $r0, $r1, $r2, $r3, $r8, $lr 414 415 renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617) 416 renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg 417 renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418) 418 renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg 419 renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg 420 renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219) 421 renamable $lr = t2LoopDec killed renamable $lr, 1 422 renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg 423 tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219) 424 renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg 425 renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11) 426 renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14) 427 renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg 428 renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg 429 $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg 430 renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg 431 t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1) 432 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg 433 tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9) 434 renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12) 435 renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10) 436 renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg 437 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg 438 tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8) 439 renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5) 440 renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3) 441 renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg 442 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg 443 tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1) 444 t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr 445 tB %bb.6, 14, $noreg 446 447 bb.6.bb13: 448 successors: %bb.12(0x30000000), %bb.7(0x50000000) 449 liveins: $lr, $r0, $r1, $r2, $r8 450 451 renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0) 452 tCBZ $r5, %bb.12 453 454 bb.7.bb16: 455 successors: %bb.8(0x40000000), %bb.9(0x40000000) 456 liveins: $lr, $r0, $r1, $r2, $r5, $r8 457 458 renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17) 459 tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr 460 renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19) 461 renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg 462 renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22) 463 renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg 464 t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22) 465 tBcc %bb.9, 1, killed $cpsr 466 467 bb.8: 468 successors: %bb.12(0x80000000) 469 470 renamable $lr = t2MOVi 1, 14, $noreg, $noreg 471 tB %bb.12, 14, $noreg 472 473 bb.9.bb57: 474 successors: %bb.10(0x40000000), %bb.11(0x40000000) 475 liveins: $r0, $r1, $r2, $r5, $r8 476 477 renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg 478 tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr 479 renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58) 480 renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60) 481 renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg 482 renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63) 483 renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg 484 t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63) 485 tBcc %bb.11, 1, killed $cpsr 486 487 bb.10: 488 successors: %bb.12(0x80000000) 489 490 renamable $lr = t2MOVi 2, 14, $noreg, $noreg 491 tB %bb.12, 14, $noreg 492 493 bb.11.bb68: 494 successors: %bb.12(0x80000000) 495 liveins: $r0, $r1, $r2, $r8 496 497 renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg 498 renamable $lr = t2MOVi 3, 14, $noreg, $noreg 499 renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69) 500 renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71) 501 renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg 502 renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74) 503 renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg 504 t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74) 505 506 bb.12.bb27: 507 liveins: $lr 508 509 $r0 = tMOVr killed $lr, 14, $noreg 510 $sp = tADDspi $sp, 1, 14, $noreg 511 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0 512 513... 514