1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs -tail-predication=enabled -o - %s | FileCheck %s 3 4define arm_aapcs_vfpcc void @fabs(float* noalias nocapture readonly %pSrcA, float* noalias nocapture %pDst, i32 %blockSize) { 5; CHECK-LABEL: fabs: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: .save {r7, lr} 8; CHECK-NEXT: push {r7, lr} 9; CHECK-NEXT: cmp r2, #0 10; CHECK-NEXT: it eq 11; CHECK-NEXT: popeq {r7, pc} 12; CHECK-NEXT: .LBB0_1: @ %vector.ph 13; CHECK-NEXT: dlstp.32 lr, r2 14; CHECK-NEXT: .LBB0_2: @ %vector.body 15; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 16; CHECK-NEXT: vldrw.u32 q0, [r0], #16 17; CHECK-NEXT: vabs.f32 q0, q0 18; CHECK-NEXT: vstrw.32 q0, [r1], #16 19; CHECK-NEXT: letp lr, .LBB0_2 20; CHECK-NEXT: @ %bb.3: @ %while.end 21; CHECK-NEXT: pop {r7, pc} 22entry: 23 %cmp3 = icmp eq i32 %blockSize, 0 24 br i1 %cmp3, label %while.end, label %vector.ph 25 26vector.ph: ; preds = %entry 27 %n.rnd.up = add i32 %blockSize, 3 28 %n.vec = and i32 %n.rnd.up, -4 29 %trip.count.minus.1 = add i32 %blockSize, -1 30 br label %vector.body 31 32vector.body: ; preds = %vector.body, %vector.ph 33 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ] 34 %next.gep = getelementptr float, float* %pDst, i32 %index 35 %next.gep13 = getelementptr float, float* %pSrcA, i32 %index 36 %active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %blockSize) 37 %0 = bitcast float* %next.gep13 to <4 x float>* 38 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %0, i32 4, <4 x i1> %active.lane.mask, <4 x float> undef) 39 %1 = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> %wide.masked.load) 40 %2 = bitcast float* %next.gep to <4 x float>* 41 call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %1, <4 x float>* %2, i32 4, <4 x i1> %active.lane.mask) 42 %index.next = add i32 %index, 4 43 %3 = icmp eq i32 %index.next, %n.vec 44 br i1 %3, label %while.end, label %vector.body 45 46while.end: ; preds = %vector.body, %entry 47 ret void 48} 49 50declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32) 51 52declare <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>*, i32 immarg, <4 x i1>, <4 x float>) 53 54declare <4 x float> @llvm.fabs.v4f32(<4 x float>) 55 56declare void @llvm.masked.store.v4f32.p0v4f32(<4 x float>, <4 x float>*, i32 immarg, <4 x i1>) 57