1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -o - %s -run-pass=if-converter -simplify-mir | FileCheck %s 3 4--- | 5 ; ModuleID = 'ifcvt-dead-predicate.ll' 6 source_filename = "ifcvt-dead-predicate.ll" 7 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 8 target triple = "thumbv7-unknown-linux-android16" 9 10 ; Function Attrs: minsize nounwind optsize ssp uwtable 11 define hidden zeroext i1 @branch_entry(i32* %command_set, i8* %requested_filename, i8** %filename_to_use) local_unnamed_addr #0 { 12 entry: 13 %0 = load i32, i32* %command_set, align 4 14 %and.i.i = and i32 %0, 128 15 %tobool.i.i.not = icmp eq i32 %and.i.i, 0 16 br i1 %tobool.i.i.not, label %land.end, label %land.rhs 17 18 land.rhs: ; preds = %entry 19 %call1 = tail call zeroext i1 @branch_target(i8* %requested_filename, i8** %filename_to_use) 20 ret i1 %call1 21 22 land.end: ; preds = %entry 23 ret i1 false 24 } 25 26 ; Function Attrs: minsize optsize 27 declare zeroext i1 @branch_target(i8*, i8**) local_unnamed_addr #1 28 29 attributes #0 = { minsize nounwind optsize ssp uwtable } 30 attributes #1 = { minsize optsize } 31 32... 33--- 34name: branch_entry 35alignment: 2 36tracksRegLiveness: true 37liveins: 38 - { reg: '$r0' } 39 - { reg: '$r1' } 40 - { reg: '$r2' } 41frameInfo: 42 maxAlignment: 1 43 maxCallFrameSize: 0 44machineFunctionInfo: {} 45body: | 46 ; CHECK-LABEL: name: branch_entry 47 ; CHECK: bb.0.entry: 48 ; CHECK: successors: %bb.1 49 ; CHECK: liveins: $r0, $r1, $r2 50 ; CHECK: renamable $r0 = tLDRBi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 1 from %ir.command_set, align 4) 51 ; CHECK: dead renamable $r0, $cpsr = tLSLri killed renamable $r0, 24, 14 /* CC::al */, $noreg 52 ; CHECK: $r0, dead $noreg = tMOVi8 0, 5 /* CC::pl */, $cpsr 53 ; CHECK: tBX_RET 5 /* CC::pl */, killed $cpsr, implicit killed $r0 54 ; CHECK: bb.1.land.rhs: 55 ; CHECK: liveins: $r1, $r2 56 ; CHECK: $r0 = tMOVr killed $r1, 14 /* CC::al */, $noreg 57 ; CHECK: $r1 = tMOVr killed $r2, 14 /* CC::al */, $noreg 58 ; CHECK: tTAILJMPdND @branch_target, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit $r0, implicit $r1 59 bb.0.entry: 60 successors: %bb.1, %bb.2 61 liveins: $r0, $r1, $r2 62 63 renamable $r0 = tLDRBi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 1 from %ir.command_set, align 4) 64 dead renamable $r0, $cpsr = tLSLri killed renamable $r0, 24, 14 /* CC::al */, $noreg 65 t2Bcc %bb.2, 4 /* CC::mi */, killed $cpsr 66 67 bb.1.land.end: 68 $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 69 tBX_RET 14 /* CC::al */, $noreg, implicit $r0 70 71 bb.2.land.rhs: 72 liveins: $r1, $r2 73 74 $r0 = tMOVr killed $r1, 14 /* CC::al */, $noreg 75 $r1 = tMOVr killed $r2, 14 /* CC::al */, $noreg 76 tTAILJMPdND @branch_target, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit $r0, implicit $r1 77 78... 79