1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s
3
4define void @_Z4loopPxS_iS_i(i64* %d) {
5; CHECK-LABEL: _Z4loopPxS_iS_i:
6; CHECK:       @ %bb.0: @ %entry
7; CHECK-NEXT:    vldrw.u32 q0, [r0]
8; CHECK-NEXT:    vmov r1, s2
9; CHECK-NEXT:    vmov r2, s0
10; CHECK-NEXT:    rsbs r1, r1, #0
11; CHECK-NEXT:    rsbs r2, r2, #0
12; CHECK-NEXT:    sxth r1, r1
13; CHECK-NEXT:    sxth r2, r2
14; CHECK-NEXT:    asr.w r12, r1, #31
15; CHECK-NEXT:    asrs r3, r2, #31
16; CHECK-NEXT:    strd r2, r3, [r0]
17; CHECK-NEXT:    strd r1, r12, [r0, #8]
18; CHECK-NEXT:    bx lr
19entry:
20  %wide.load = load <2 x i64>, <2 x i64>* undef, align 8
21  %0 = trunc <2 x i64> %wide.load to <2 x i32>
22  %1 = shl <2 x i32> %0, <i32 16, i32 16>
23  %2 = ashr exact <2 x i32> %1, <i32 16, i32 16>
24  %3 = sub <2 x i32> %2, %0
25  %4 = and <2 x i32> %3, <i32 7, i32 7>
26  %5 = shl <2 x i32> %2, %4
27  %6 = extractelement <2 x i32> %5, i32 0
28  %7 = zext i32 %6 to i64
29  %8 = select i1 false, i64 %7, i64 undef
30  %9 = trunc i64 %8 to i16
31  %10 = sub i16 0, %9
32  %11 = sext i16 %10 to i64
33  %12 = getelementptr inbounds i64, i64* %d, i64 undef
34  store i64 %11, i64* %12, align 8
35  %13 = extractelement <2 x i32> %5, i32 1
36  %14 = zext i32 %13 to i64
37  %15 = select i1 false, i64 %14, i64 undef
38  %16 = trunc i64 %15 to i16
39  %17 = sub i16 0, %16
40  %18 = sext i16 %17 to i64
41  %19 = or i32 0, 1
42  %20 = sext i32 %19 to i64
43  %21 = getelementptr inbounds i64, i64* %d, i64 %20
44  store i64 %18, i64* %21, align 8
45  ret void
46}
47