1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s
3
4; Check some LSR loop postinc
5
6; fma loop with a destination that is the same as one of the sources
7define void @fma(float* noalias nocapture readonly %A, float* noalias nocapture readonly %B, float* noalias nocapture %C, i32 %n) {
8; CHECK-LABEL: fma:
9; CHECK:       @ %bb.0: @ %entry
10; CHECK-NEXT:    .save {r4, r5, r6, lr}
11; CHECK-NEXT:    push {r4, r5, r6, lr}
12; CHECK-NEXT:    cmp r3, #1
13; CHECK-NEXT:    blt .LBB0_8
14; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader
15; CHECK-NEXT:    cmp r3, #3
16; CHECK-NEXT:    bhi .LBB0_3
17; CHECK-NEXT:  @ %bb.2:
18; CHECK-NEXT:    mov.w r12, #0
19; CHECK-NEXT:    b .LBB0_6
20; CHECK-NEXT:  .LBB0_3: @ %vector.ph
21; CHECK-NEXT:    bic r12, r3, #3
22; CHECK-NEXT:    movs r5, #1
23; CHECK-NEXT:    sub.w r6, r12, #4
24; CHECK-NEXT:    mov r4, r0
25; CHECK-NEXT:    add.w lr, r5, r6, lsr #2
26; CHECK-NEXT:    mov r5, r1
27; CHECK-NEXT:    dls lr, lr
28; CHECK-NEXT:    mov r6, r2
29; CHECK-NEXT:  .LBB0_4: @ %vector.body
30; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
31; CHECK-NEXT:    vldrw.u32 q0, [r4], #16
32; CHECK-NEXT:    vldrw.u32 q1, [r5], #16
33; CHECK-NEXT:    vldrw.u32 q2, [r6]
34; CHECK-NEXT:    vfma.f32 q2, q1, q0
35; CHECK-NEXT:    vstrb.8 q2, [r6], #16
36; CHECK-NEXT:    le lr, .LBB0_4
37; CHECK-NEXT:  @ %bb.5: @ %middle.block
38; CHECK-NEXT:    cmp r12, r3
39; CHECK-NEXT:    it eq
40; CHECK-NEXT:    popeq {r4, r5, r6, pc}
41; CHECK-NEXT:  .LBB0_6: @ %for.body.preheader12
42; CHECK-NEXT:    sub.w lr, r3, r12
43; CHECK-NEXT:    add.w r0, r0, r12, lsl #2
44; CHECK-NEXT:    add.w r1, r1, r12, lsl #2
45; CHECK-NEXT:    add.w r2, r2, r12, lsl #2
46; CHECK-NEXT:    dls lr, lr
47; CHECK-NEXT:  .LBB0_7: @ %for.body
48; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
49; CHECK-NEXT:    vldr s0, [r0]
50; CHECK-NEXT:    adds r0, #4
51; CHECK-NEXT:    vldr s2, [r1]
52; CHECK-NEXT:    adds r1, #4
53; CHECK-NEXT:    vldr s4, [r2]
54; CHECK-NEXT:    vfma.f32 s4, s2, s0
55; CHECK-NEXT:    vstr s4, [r2]
56; CHECK-NEXT:    adds r2, #4
57; CHECK-NEXT:    le lr, .LBB0_7
58; CHECK-NEXT:  .LBB0_8: @ %for.cond.cleanup
59; CHECK-NEXT:    pop {r4, r5, r6, pc}
60entry:
61  %cmp8 = icmp sgt i32 %n, 0
62  br i1 %cmp8, label %for.body.preheader, label %for.cond.cleanup
63
64for.body.preheader:                               ; preds = %entry
65  %min.iters.check = icmp ult i32 %n, 4
66  br i1 %min.iters.check, label %for.body.preheader12, label %vector.ph
67
68for.body.preheader12:                             ; preds = %middle.block, %for.body.preheader
69  %i.09.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]
70  br label %for.body
71
72vector.ph:                                        ; preds = %for.body.preheader
73  %n.vec = and i32 %n, -4
74  br label %vector.body
75
76vector.body:                                      ; preds = %vector.body, %vector.ph
77  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
78  %0 = getelementptr inbounds float, float* %A, i32 %index
79  %1 = bitcast float* %0 to <4 x float>*
80  %wide.load = load <4 x float>, <4 x float>* %1, align 4
81  %2 = getelementptr inbounds float, float* %B, i32 %index
82  %3 = bitcast float* %2 to <4 x float>*
83  %wide.load10 = load <4 x float>, <4 x float>* %3, align 4
84  %4 = fmul fast <4 x float> %wide.load10, %wide.load
85  %5 = getelementptr inbounds float, float* %C, i32 %index
86  %6 = bitcast float* %5 to <4 x float>*
87  %wide.load11 = load <4 x float>, <4 x float>* %6, align 4
88  %7 = fadd fast <4 x float> %wide.load11, %4
89  %8 = bitcast float* %5 to <4 x float>*
90  store <4 x float> %7, <4 x float>* %8, align 4
91  %index.next = add i32 %index, 4
92  %9 = icmp eq i32 %index.next, %n.vec
93  br i1 %9, label %middle.block, label %vector.body
94
95middle.block:                                     ; preds = %vector.body
96  %cmp.n = icmp eq i32 %n.vec, %n
97  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader12
98
99for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry
100  ret void
101
102for.body:                                         ; preds = %for.body.preheader12, %for.body
103  %i.09 = phi i32 [ %inc, %for.body ], [ %i.09.ph, %for.body.preheader12 ]
104  %arrayidx = getelementptr inbounds float, float* %A, i32 %i.09
105  %10 = load float, float* %arrayidx, align 4
106  %arrayidx1 = getelementptr inbounds float, float* %B, i32 %i.09
107  %11 = load float, float* %arrayidx1, align 4
108  %mul = fmul fast float %11, %10
109  %arrayidx2 = getelementptr inbounds float, float* %C, i32 %i.09
110  %12 = load float, float* %arrayidx2, align 4
111  %add = fadd fast float %12, %mul
112  store float %add, float* %arrayidx2, align 4
113  %inc = add nuw nsw i32 %i.09, 1
114  %exitcond = icmp eq i32 %inc, %n
115  br i1 %exitcond, label %for.cond.cleanup, label %for.body
116}
117
118
119; Same as above but tail predicated
120; FIXME: The postinc here is put on the load, not the store. An extra mov is needed in the loop because of it.
121define void @fma_tailpred(float* noalias nocapture readonly %A, float* noalias nocapture readonly %B, float* noalias nocapture %C, i32 %n) {
122; CHECK-LABEL: fma_tailpred:
123; CHECK:       @ %bb.0: @ %entry
124; CHECK-NEXT:    .save {r4, lr}
125; CHECK-NEXT:    push {r4, lr}
126; CHECK-NEXT:    .vsave {d8, d9}
127; CHECK-NEXT:    vpush {d8, d9}
128; CHECK-NEXT:    cmp r3, #1
129; CHECK-NEXT:    blt .LBB1_3
130; CHECK-NEXT:  @ %bb.1: @ %vector.ph
131; CHECK-NEXT:    add.w r12, r3, #3
132; CHECK-NEXT:    mov.w lr, #1
133; CHECK-NEXT:    bic r12, r12, #3
134; CHECK-NEXT:    adr r4, .LCPI1_0
135; CHECK-NEXT:    sub.w r12, r12, #4
136; CHECK-NEXT:    vldrw.u32 q0, [r4]
137; CHECK-NEXT:    add.w lr, lr, r12, lsr #2
138; CHECK-NEXT:    sub.w r12, r3, #1
139; CHECK-NEXT:    dls lr, lr
140; CHECK-NEXT:    movs r3, #0
141; CHECK-NEXT:    vdup.32 q1, r12
142; CHECK-NEXT:  .LBB1_2: @ %vector.body
143; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
144; CHECK-NEXT:    vdup.32 q2, r3
145; CHECK-NEXT:    adds r3, #4
146; CHECK-NEXT:    vorr q2, q2, q0
147; CHECK-NEXT:    vpttt.u32 cs, q1, q2
148; CHECK-NEXT:    vldrwt.u32 q2, [r0], #16
149; CHECK-NEXT:    vldrwt.u32 q3, [r1], #16
150; CHECK-NEXT:    vldrwt.u32 q4, [r2]
151; CHECK-NEXT:    vfma.f32 q4, q3, q2
152; CHECK-NEXT:    vpst
153; CHECK-NEXT:    vstrwt.32 q4, [r2], #16
154; CHECK-NEXT:    le lr, .LBB1_2
155; CHECK-NEXT:  .LBB1_3: @ %for.cond.cleanup
156; CHECK-NEXT:    vpop {d8, d9}
157; CHECK-NEXT:    pop {r4, pc}
158; CHECK-NEXT:    .p2align 4
159; CHECK-NEXT:  @ %bb.4:
160; CHECK-NEXT:  .LCPI1_0:
161; CHECK-NEXT:    .long 0 @ 0x0
162; CHECK-NEXT:    .long 1 @ 0x1
163; CHECK-NEXT:    .long 2 @ 0x2
164; CHECK-NEXT:    .long 3 @ 0x3
165entry:
166  %cmp8 = icmp sgt i32 %n, 0
167  br i1 %cmp8, label %vector.ph, label %for.cond.cleanup
168
169vector.ph:                                        ; preds = %entry
170  %n.rnd.up = add i32 %n, 3
171  %n.vec = and i32 %n.rnd.up, -4
172  %trip.count.minus.1 = add i32 %n, -1
173  %broadcast.splatinsert10 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 0
174  %broadcast.splat11 = shufflevector <4 x i32> %broadcast.splatinsert10, <4 x i32> undef, <4 x i32> zeroinitializer
175  br label %vector.body
176
177vector.body:                                      ; preds = %vector.body, %vector.ph
178  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
179  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0
180  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
181  %induction = or <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>
182  %0 = getelementptr inbounds float, float* %A, i32 %index
183  %1 = icmp ule <4 x i32> %induction, %broadcast.splat11
184  %2 = bitcast float* %0 to <4 x float>*
185  %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %2, i32 4, <4 x i1> %1, <4 x float> undef)
186  %3 = getelementptr inbounds float, float* %B, i32 %index
187  %4 = bitcast float* %3 to <4 x float>*
188  %wide.masked.load12 = call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %4, i32 4, <4 x i1> %1, <4 x float> undef)
189  %5 = fmul fast <4 x float> %wide.masked.load12, %wide.masked.load
190  %6 = getelementptr inbounds float, float* %C, i32 %index
191  %7 = bitcast float* %6 to <4 x float>*
192  %wide.masked.load13 = call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %7, i32 4, <4 x i1> %1, <4 x float> undef)
193  %8 = fadd fast <4 x float> %wide.masked.load13, %5
194  %9 = bitcast float* %6 to <4 x float>*
195  call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %8, <4 x float>* %9, i32 4, <4 x i1> %1)
196  %index.next = add i32 %index, 4
197  %10 = icmp eq i32 %index.next, %n.vec
198  br i1 %10, label %for.cond.cleanup, label %vector.body
199
200for.cond.cleanup:                                 ; preds = %vector.body, %entry
201  ret void
202}
203
204
205; Multiple loads of the loop with a common base
206define i8* @test(i8* nocapture readonly %input_row, i8* nocapture readonly %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, i32 %col_offset, i16 signext %activation_min, i16 zeroext %row_len, i32* nocapture readonly %bias, i8* returned %out) {
207; CHECK-LABEL: test:
208; CHECK:       @ %bb.0: @ %entry
209; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
210; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
211; CHECK-NEXT:    .pad #20
212; CHECK-NEXT:    sub sp, #20
213; CHECK-NEXT:    cmp r3, #4
214; CHECK-NEXT:    strd r0, r1, [sp, #12] @ 8-byte Folded Spill
215; CHECK-NEXT:    bne .LBB2_8
216; CHECK-NEXT:  @ %bb.1: @ %entry
217; CHECK-NEXT:    cmp r2, #0
218; CHECK-NEXT:    beq .LBB2_8
219; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph
220; CHECK-NEXT:    ldr r3, [sp, #64]
221; CHECK-NEXT:    mov.w r9, #0
222; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
223; CHECK-NEXT:    ldr r4, [sp, #56]
224; CHECK-NEXT:    add.w r0, r1, r3, lsl #1
225; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill
226; CHECK-NEXT:    adds r0, r1, r3
227; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill
228; CHECK-NEXT:    add.w r0, r3, r3, lsl #1
229; CHECK-NEXT:    add r0, r1
230; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill
231; CHECK-NEXT:    adds r0, r3, #7
232; CHECK-NEXT:    lsr.w r11, r0, #3
233; CHECK-NEXT:    b .LBB2_5
234; CHECK-NEXT:  .LBB2_3: @ in Loop: Header=BB2_5 Depth=1
235; CHECK-NEXT:    mov r12, r10
236; CHECK-NEXT:    mov r8, r10
237; CHECK-NEXT:    mov r6, r10
238; CHECK-NEXT:  .LBB2_4: @ %for.cond.cleanup23
239; CHECK-NEXT:    @ in Loop: Header=BB2_5 Depth=1
240; CHECK-NEXT:    ldr r1, [sp, #72]
241; CHECK-NEXT:    add.w r0, r8, r12
242; CHECK-NEXT:    add r0, r6
243; CHECK-NEXT:    add r0, r10
244; CHECK-NEXT:    strb.w r0, [r1, r9]
245; CHECK-NEXT:    add.w r9, r9, #1
246; CHECK-NEXT:    cmp r9, r2
247; CHECK-NEXT:    beq .LBB2_8
248; CHECK-NEXT:  .LBB2_5: @ %for.body
249; CHECK-NEXT:    @ =>This Loop Header: Depth=1
250; CHECK-NEXT:    @ Child Loop BB2_7 Depth 2
251; CHECK-NEXT:    ldr r0, [sp, #68]
252; CHECK-NEXT:    ldr.w r10, [r0, r9, lsl #2]
253; CHECK-NEXT:    subs.w r0, r11, r11
254; CHECK-NEXT:    ble .LBB2_3
255; CHECK-NEXT:  @ %bb.6: @ %for.body24.preheader
256; CHECK-NEXT:    @ in Loop: Header=BB2_5 Depth=1
257; CHECK-NEXT:    ldr r3, [sp, #64]
258; CHECK-NEXT:    mov r6, r10
259; CHECK-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload
260; CHECK-NEXT:    dls lr, r0
261; CHECK-NEXT:    ldrd r5, r0, [sp] @ 8-byte Folded Reload
262; CHECK-NEXT:    mov r8, r10
263; CHECK-NEXT:    mla r7, r9, r3, r1
264; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
265; CHECK-NEXT:    ldr r3, [sp, #8] @ 4-byte Reload
266; CHECK-NEXT:    mov r12, r10
267; CHECK-NEXT:  .LBB2_7: @ %for.body24
268; CHECK-NEXT:    @ Parent Loop BB2_5 Depth=1
269; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2
270; CHECK-NEXT:    vldrb.s16 q0, [r5], #8
271; CHECK-NEXT:    vadd.i16 q1, q0, r4
272; CHECK-NEXT:    vldrb.s16 q0, [r7], #8
273; CHECK-NEXT:    vmlava.s16 r10, q0, q1
274; CHECK-NEXT:    vldrb.s16 q1, [r3], #8
275; CHECK-NEXT:    vadd.i16 q1, q1, r4
276; CHECK-NEXT:    vmlava.s16 r6, q0, q1
277; CHECK-NEXT:    vldrb.s16 q1, [r0], #8
278; CHECK-NEXT:    vadd.i16 q1, q1, r4
279; CHECK-NEXT:    vmlava.s16 r8, q0, q1
280; CHECK-NEXT:    vldrb.s16 q1, [r1], #8
281; CHECK-NEXT:    vadd.i16 q1, q1, r4
282; CHECK-NEXT:    vmlava.s16 r12, q0, q1
283; CHECK-NEXT:    le lr, .LBB2_7
284; CHECK-NEXT:    b .LBB2_4
285; CHECK-NEXT:  .LBB2_8: @ %if.end
286; CHECK-NEXT:    ldr r0, [sp, #72]
287; CHECK-NEXT:    add sp, #20
288; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
289entry:
290  %cmp = icmp eq i16 %num_cols, 4
291  br i1 %cmp, label %for.cond.preheader, label %if.end
292
293for.cond.preheader:                               ; preds = %entry
294  %conv2 = zext i16 %output_ch to i32
295  %cmp3114 = icmp eq i16 %output_ch, 0
296  br i1 %cmp3114, label %if.end, label %for.body.lr.ph
297
298for.body.lr.ph:                                   ; preds = %for.cond.preheader
299  %conv5 = zext i16 %row_len to i32
300  %add.ptr9 = getelementptr inbounds i8, i8* %input_col, i32 %conv5
301  %mul11 = shl nuw nsw i32 %conv5, 1
302  %add.ptr12 = getelementptr inbounds i8, i8* %input_col, i32 %mul11
303  %mul14 = mul nuw nsw i32 %conv5, 3
304  %add.ptr15 = getelementptr inbounds i8, i8* %input_col, i32 %mul14
305  %add = add nuw nsw i32 %conv5, 7
306  %div = lshr i32 %add, 3
307  %conv25 = trunc i32 %col_offset to i16
308  %.splatinsert = insertelement <8 x i16> undef, i16 %conv25, i32 0
309  %.splat = shufflevector <8 x i16> %.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer
310  br label %for.body
311
312for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph
313  %i_out_ch.0116 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]
314  %i_row_loop.0115 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]
315  %arrayidx = getelementptr inbounds i32, i32* %bias, i32 %i_out_ch.0116
316  %0 = load i32, i32* %arrayidx, align 4
317  %cmp2199 = icmp slt i32 %i_row_loop.0115, %div
318  br i1 %cmp2199, label %for.body24.preheader, label %for.cond.cleanup23
319
320for.body24.preheader:                             ; preds = %for.body
321  %mul = mul nuw nsw i32 %i_out_ch.0116, %conv5
322  %add.ptr = getelementptr inbounds i8, i8* %input_row, i32 %mul
323  br label %for.body24
324
325for.cond.cleanup23:                               ; preds = %for.body24, %for.body
326  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %20, %for.body24 ]
327  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]
328  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]
329  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]
330  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0115, %for.body ], [ %div, %for.body24 ]
331  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa
332  %add32 = add nsw i32 %add31, %acc_2.0.lcssa
333  %add33 = add nsw i32 %add32, %acc_3.0.lcssa
334  %conv34 = trunc i32 %add33 to i8
335  %arrayidx35 = getelementptr inbounds i8, i8* %out, i32 %i_out_ch.0116
336  store i8 %conv34, i8* %arrayidx35, align 1
337  %inc37 = add nuw nsw i32 %i_out_ch.0116, 1
338  %exitcond120 = icmp eq i32 %inc37, %conv2
339  br i1 %exitcond120, label %if.end, label %for.body
340
341for.body24:                                       ; preds = %for.body24, %for.body24.preheader
342  %ip_r0.0109 = phi i8* [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]
343  %ip_c0.0108 = phi i8* [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]
344  %ip_c1.0107 = phi i8* [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]
345  %ip_c2.0106 = phi i8* [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]
346  %i_row_loop.1105 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0115, %for.body24.preheader ]
347  %ip_c3.0104 = phi i8* [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]
348  %acc_3.0103 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]
349  %acc_2.0102 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]
350  %acc_1.0101 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]
351  %acc_0.0100 = phi i32 [ %20, %for.body24 ], [ %0, %for.body24.preheader ]
352  %1 = bitcast i8* %ip_r0.0109 to <8 x i8>*
353  %2 = load <8 x i8>, <8 x i8>* %1, align 1
354  %3 = sext <8 x i8> %2 to <8 x i16>
355  %add.ptr26 = getelementptr inbounds i8, i8* %ip_r0.0109, i32 8
356  %4 = bitcast i8* %ip_c0.0108 to <8 x i8>*
357  %5 = load <8 x i8>, <8 x i8>* %4, align 1
358  %6 = sext <8 x i8> %5 to <8 x i16>
359  %add.ptr27 = getelementptr inbounds i8, i8* %ip_c0.0108, i32 8
360  %7 = add <8 x i16> %.splat, %6
361  %8 = bitcast i8* %ip_c1.0107 to <8 x i8>*
362  %9 = load <8 x i8>, <8 x i8>* %8, align 1
363  %10 = sext <8 x i8> %9 to <8 x i16>
364  %add.ptr28 = getelementptr inbounds i8, i8* %ip_c1.0107, i32 8
365  %11 = add <8 x i16> %.splat, %10
366  %12 = bitcast i8* %ip_c2.0106 to <8 x i8>*
367  %13 = load <8 x i8>, <8 x i8>* %12, align 1
368  %14 = sext <8 x i8> %13 to <8 x i16>
369  %add.ptr29 = getelementptr inbounds i8, i8* %ip_c2.0106, i32 8
370  %15 = add <8 x i16> %.splat, %14
371  %16 = bitcast i8* %ip_c3.0104 to <8 x i8>*
372  %17 = load <8 x i8>, <8 x i8>* %16, align 1
373  %18 = sext <8 x i8> %17 to <8 x i16>
374  %add.ptr30 = getelementptr inbounds i8, i8* %ip_c3.0104, i32 8
375  %19 = add <8 x i16> %.splat, %18
376  %20 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_0.0100, <8 x i16> %3, <8 x i16> %7)
377  %21 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_1.0101, <8 x i16> %3, <8 x i16> %11)
378  %22 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_2.0102, <8 x i16> %3, <8 x i16> %15)
379  %23 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_3.0103, <8 x i16> %3, <8 x i16> %19)
380  %inc = add nsw i32 %i_row_loop.1105, 1
381  %exitcond = icmp eq i32 %inc, %div
382  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24
383
384if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry
385  ret i8* %out
386}
387
388; Same as above with optsize
389define i8* @test_optsize(i8* nocapture readonly %input_row, i8* nocapture readonly %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, i32 %col_offset, i16 signext %activation_min, i16 zeroext %row_len, i32* nocapture readonly %bias, i8* returned %out) optsize {
390; CHECK-LABEL: test_optsize:
391; CHECK:       @ %bb.0: @ %entry
392; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
393; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
394; CHECK-NEXT:    .pad #20
395; CHECK-NEXT:    sub sp, #20
396; CHECK-NEXT:    cmp r3, #4
397; CHECK-NEXT:    strd r0, r1, [sp, #12] @ 8-byte Folded Spill
398; CHECK-NEXT:    bne .LBB3_8
399; CHECK-NEXT:  @ %bb.1: @ %entry
400; CHECK-NEXT:    cmp r2, #0
401; CHECK-NEXT:    beq .LBB3_8
402; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph
403; CHECK-NEXT:    ldr r3, [sp, #64]
404; CHECK-NEXT:    mov.w r9, #0
405; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
406; CHECK-NEXT:    ldr r4, [sp, #56]
407; CHECK-NEXT:    add.w r0, r1, r3, lsl #1
408; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill
409; CHECK-NEXT:    adds r0, r1, r3
410; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill
411; CHECK-NEXT:    add.w r0, r3, r3, lsl #1
412; CHECK-NEXT:    add r0, r1
413; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill
414; CHECK-NEXT:    adds r0, r3, #7
415; CHECK-NEXT:    lsr.w r11, r0, #3
416; CHECK-NEXT:  .LBB3_3: @ %for.body
417; CHECK-NEXT:    @ =>This Loop Header: Depth=1
418; CHECK-NEXT:    @ Child Loop BB3_5 Depth 2
419; CHECK-NEXT:    ldr r0, [sp, #68]
420; CHECK-NEXT:    ldr.w r10, [r0, r9, lsl #2]
421; CHECK-NEXT:    subs.w r0, r11, r11
422; CHECK-NEXT:    ble .LBB3_6
423; CHECK-NEXT:  @ %bb.4: @ %for.body24.preheader
424; CHECK-NEXT:    @ in Loop: Header=BB3_3 Depth=1
425; CHECK-NEXT:    ldr r3, [sp, #64]
426; CHECK-NEXT:    mov r6, r10
427; CHECK-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload
428; CHECK-NEXT:    dls lr, r0
429; CHECK-NEXT:    ldrd r5, r0, [sp] @ 8-byte Folded Reload
430; CHECK-NEXT:    mov r8, r10
431; CHECK-NEXT:    mla r7, r9, r3, r1
432; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
433; CHECK-NEXT:    ldr r3, [sp, #8] @ 4-byte Reload
434; CHECK-NEXT:    mov r12, r10
435; CHECK-NEXT:  .LBB3_5: @ %for.body24
436; CHECK-NEXT:    @ Parent Loop BB3_3 Depth=1
437; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2
438; CHECK-NEXT:    vldrb.s16 q0, [r5], #8
439; CHECK-NEXT:    vadd.i16 q1, q0, r4
440; CHECK-NEXT:    vldrb.s16 q0, [r7], #8
441; CHECK-NEXT:    vmlava.s16 r10, q0, q1
442; CHECK-NEXT:    vldrb.s16 q1, [r3], #8
443; CHECK-NEXT:    vadd.i16 q1, q1, r4
444; CHECK-NEXT:    vmlava.s16 r6, q0, q1
445; CHECK-NEXT:    vldrb.s16 q1, [r0], #8
446; CHECK-NEXT:    vadd.i16 q1, q1, r4
447; CHECK-NEXT:    vmlava.s16 r8, q0, q1
448; CHECK-NEXT:    vldrb.s16 q1, [r1], #8
449; CHECK-NEXT:    vadd.i16 q1, q1, r4
450; CHECK-NEXT:    vmlava.s16 r12, q0, q1
451; CHECK-NEXT:    le lr, .LBB3_5
452; CHECK-NEXT:    b .LBB3_7
453; CHECK-NEXT:  .LBB3_6: @ in Loop: Header=BB3_3 Depth=1
454; CHECK-NEXT:    mov r12, r10
455; CHECK-NEXT:    mov r8, r10
456; CHECK-NEXT:    mov r6, r10
457; CHECK-NEXT:  .LBB3_7: @ %for.cond.cleanup23
458; CHECK-NEXT:    @ in Loop: Header=BB3_3 Depth=1
459; CHECK-NEXT:    ldr r1, [sp, #72]
460; CHECK-NEXT:    add.w r0, r8, r12
461; CHECK-NEXT:    add r0, r6
462; CHECK-NEXT:    add r0, r10
463; CHECK-NEXT:    strb.w r0, [r1, r9]
464; CHECK-NEXT:    add.w r9, r9, #1
465; CHECK-NEXT:    cmp r9, r2
466; CHECK-NEXT:    bne .LBB3_3
467; CHECK-NEXT:  .LBB3_8: @ %if.end
468; CHECK-NEXT:    ldr r0, [sp, #72]
469; CHECK-NEXT:    add sp, #20
470; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
471entry:
472  %cmp = icmp eq i16 %num_cols, 4
473  br i1 %cmp, label %for.cond.preheader, label %if.end
474
475for.cond.preheader:                               ; preds = %entry
476  %conv2 = zext i16 %output_ch to i32
477  %cmp3114 = icmp eq i16 %output_ch, 0
478  br i1 %cmp3114, label %if.end, label %for.body.lr.ph
479
480for.body.lr.ph:                                   ; preds = %for.cond.preheader
481  %conv5 = zext i16 %row_len to i32
482  %add.ptr9 = getelementptr inbounds i8, i8* %input_col, i32 %conv5
483  %mul11 = shl nuw nsw i32 %conv5, 1
484  %add.ptr12 = getelementptr inbounds i8, i8* %input_col, i32 %mul11
485  %mul14 = mul nuw nsw i32 %conv5, 3
486  %add.ptr15 = getelementptr inbounds i8, i8* %input_col, i32 %mul14
487  %add = add nuw nsw i32 %conv5, 7
488  %div = lshr i32 %add, 3
489  %conv25 = trunc i32 %col_offset to i16
490  %.splatinsert = insertelement <8 x i16> undef, i16 %conv25, i32 0
491  %.splat = shufflevector <8 x i16> %.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer
492  br label %for.body
493
494for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph
495  %i_out_ch.0116 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]
496  %i_row_loop.0115 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]
497  %arrayidx = getelementptr inbounds i32, i32* %bias, i32 %i_out_ch.0116
498  %0 = load i32, i32* %arrayidx, align 4
499  %cmp2199 = icmp slt i32 %i_row_loop.0115, %div
500  br i1 %cmp2199, label %for.body24.preheader, label %for.cond.cleanup23
501
502for.body24.preheader:                             ; preds = %for.body
503  %mul = mul nuw nsw i32 %i_out_ch.0116, %conv5
504  %add.ptr = getelementptr inbounds i8, i8* %input_row, i32 %mul
505  br label %for.body24
506
507for.cond.cleanup23:                               ; preds = %for.body24, %for.body
508  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %20, %for.body24 ]
509  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]
510  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]
511  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]
512  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0115, %for.body ], [ %div, %for.body24 ]
513  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa
514  %add32 = add nsw i32 %add31, %acc_2.0.lcssa
515  %add33 = add nsw i32 %add32, %acc_3.0.lcssa
516  %conv34 = trunc i32 %add33 to i8
517  %arrayidx35 = getelementptr inbounds i8, i8* %out, i32 %i_out_ch.0116
518  store i8 %conv34, i8* %arrayidx35, align 1
519  %inc37 = add nuw nsw i32 %i_out_ch.0116, 1
520  %exitcond120 = icmp eq i32 %inc37, %conv2
521  br i1 %exitcond120, label %if.end, label %for.body
522
523for.body24:                                       ; preds = %for.body24, %for.body24.preheader
524  %ip_r0.0109 = phi i8* [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]
525  %ip_c0.0108 = phi i8* [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]
526  %ip_c1.0107 = phi i8* [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]
527  %ip_c2.0106 = phi i8* [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]
528  %i_row_loop.1105 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0115, %for.body24.preheader ]
529  %ip_c3.0104 = phi i8* [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]
530  %acc_3.0103 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]
531  %acc_2.0102 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]
532  %acc_1.0101 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]
533  %acc_0.0100 = phi i32 [ %20, %for.body24 ], [ %0, %for.body24.preheader ]
534  %1 = bitcast i8* %ip_r0.0109 to <8 x i8>*
535  %2 = load <8 x i8>, <8 x i8>* %1, align 1
536  %3 = sext <8 x i8> %2 to <8 x i16>
537  %add.ptr26 = getelementptr inbounds i8, i8* %ip_r0.0109, i32 8
538  %4 = bitcast i8* %ip_c0.0108 to <8 x i8>*
539  %5 = load <8 x i8>, <8 x i8>* %4, align 1
540  %6 = sext <8 x i8> %5 to <8 x i16>
541  %add.ptr27 = getelementptr inbounds i8, i8* %ip_c0.0108, i32 8
542  %7 = add <8 x i16> %.splat, %6
543  %8 = bitcast i8* %ip_c1.0107 to <8 x i8>*
544  %9 = load <8 x i8>, <8 x i8>* %8, align 1
545  %10 = sext <8 x i8> %9 to <8 x i16>
546  %add.ptr28 = getelementptr inbounds i8, i8* %ip_c1.0107, i32 8
547  %11 = add <8 x i16> %.splat, %10
548  %12 = bitcast i8* %ip_c2.0106 to <8 x i8>*
549  %13 = load <8 x i8>, <8 x i8>* %12, align 1
550  %14 = sext <8 x i8> %13 to <8 x i16>
551  %add.ptr29 = getelementptr inbounds i8, i8* %ip_c2.0106, i32 8
552  %15 = add <8 x i16> %.splat, %14
553  %16 = bitcast i8* %ip_c3.0104 to <8 x i8>*
554  %17 = load <8 x i8>, <8 x i8>* %16, align 1
555  %18 = sext <8 x i8> %17 to <8 x i16>
556  %add.ptr30 = getelementptr inbounds i8, i8* %ip_c3.0104, i32 8
557  %19 = add <8 x i16> %.splat, %18
558  %20 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_0.0100, <8 x i16> %3, <8 x i16> %7)
559  %21 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_1.0101, <8 x i16> %3, <8 x i16> %11)
560  %22 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_2.0102, <8 x i16> %3, <8 x i16> %15)
561  %23 = tail call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 %acc_3.0103, <8 x i16> %3, <8 x i16> %19)
562  %inc = add nsw i32 %i_row_loop.1105, 1
563  %exitcond = icmp eq i32 %inc, %div
564  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24
565
566if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry
567  ret i8* %out
568}
569
570
571; Similar but predicated
572define i32 @arm_nn_mat_mul_core_4x_s8(i32 %row_elements, i32 %offset, i8* %row_base, i8* %col_base, i32* nocapture readnone %sum_col, i32* nocapture %output) {
573; CHECK-LABEL: arm_nn_mat_mul_core_4x_s8:
574; CHECK:       @ %bb.0: @ %entry
575; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r10, lr}
576; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r10, lr}
577; CHECK-NEXT:    ldr.w r12, [sp, #32]
578; CHECK-NEXT:    cmp r0, #1
579; CHECK-NEXT:    blt .LBB4_3
580; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader
581; CHECK-NEXT:    add.w r5, r2, r1, lsl #1
582; CHECK-NEXT:    mov.w r8, #0
583; CHECK-NEXT:    movs r4, #0
584; CHECK-NEXT:    mov.w r10, #0
585; CHECK-NEXT:    movs r6, #0
586; CHECK-NEXT:    adds r7, r2, r1
587; CHECK-NEXT:    add.w r1, r1, r1, lsl #1
588; CHECK-NEXT:    add r1, r2
589; CHECK-NEXT:    dlstp.8 lr, r0
590; CHECK-NEXT:  .LBB4_2: @ %for.body
591; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
592; CHECK-NEXT:    vldrb.u8 q0, [r3], #16
593; CHECK-NEXT:    vldrb.u8 q1, [r1], #16
594; CHECK-NEXT:    vmlava.s8 r10, q1, q0
595; CHECK-NEXT:    vldrb.u8 q1, [r5], #16
596; CHECK-NEXT:    vmlava.s8 r4, q1, q0
597; CHECK-NEXT:    vldrb.u8 q1, [r7], #16
598; CHECK-NEXT:    vmlava.s8 r6, q1, q0
599; CHECK-NEXT:    vldrb.u8 q1, [r2], #16
600; CHECK-NEXT:    vmlava.s8 r8, q1, q0
601; CHECK-NEXT:    letp lr, .LBB4_2
602; CHECK-NEXT:    b .LBB4_4
603; CHECK-NEXT:  .LBB4_3:
604; CHECK-NEXT:    mov.w r10, #0
605; CHECK-NEXT:    movs r4, #0
606; CHECK-NEXT:    movs r6, #0
607; CHECK-NEXT:    mov.w r8, #0
608; CHECK-NEXT:  .LBB4_4: @ %for.cond.cleanup
609; CHECK-NEXT:    movs r0, #0
610; CHECK-NEXT:    strd r8, r6, [r12]
611; CHECK-NEXT:    strd r4, r10, [r12, #8]
612; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r10, pc}
613entry:
614  %add = add nsw i32 %row_elements, 15
615  %div = sdiv i32 %add, 16
616  %cmp84 = icmp sgt i32 %row_elements, 0
617  br i1 %cmp84, label %for.body.preheader, label %for.cond.cleanup
618
619for.body.preheader:                               ; preds = %entry
620  %mul2 = mul nsw i32 %offset, 3
621  %add.ptr3 = getelementptr inbounds i8, i8* %row_base, i32 %mul2
622  %mul = shl nsw i32 %offset, 1
623  %add.ptr1 = getelementptr inbounds i8, i8* %row_base, i32 %mul
624  %add.ptr = getelementptr inbounds i8, i8* %row_base, i32 %offset
625  %0 = icmp sgt i32 %div, 1
626  %smax = select i1 %0, i32 %div, i32 1
627  br label %for.body
628
629for.cond.cleanup:                                 ; preds = %for.body, %entry
630  %acc_n.sroa.12.0.lcssa = phi i32 [ 0, %entry ], [ %15, %for.body ]
631  %acc_n.sroa.9.0.lcssa = phi i32 [ 0, %entry ], [ %12, %for.body ]
632  %acc_n.sroa.6.0.lcssa = phi i32 [ 0, %entry ], [ %9, %for.body ]
633  %acc_n.sroa.0.0.lcssa = phi i32 [ 0, %entry ], [ %6, %for.body ]
634  store i32 %acc_n.sroa.0.0.lcssa, i32* %output, align 4
635  %arrayidx19 = getelementptr inbounds i32, i32* %output, i32 1
636  store i32 %acc_n.sroa.6.0.lcssa, i32* %arrayidx19, align 4
637  %arrayidx21 = getelementptr inbounds i32, i32* %output, i32 2
638  store i32 %acc_n.sroa.9.0.lcssa, i32* %arrayidx21, align 4
639  %arrayidx23 = getelementptr inbounds i32, i32* %output, i32 3
640  store i32 %acc_n.sroa.12.0.lcssa, i32* %arrayidx23, align 4
641  ret i32 0
642
643for.body:                                         ; preds = %for.body, %for.body.preheader
644  %col_base.addr.095 = phi i8* [ %add.ptr4, %for.body ], [ %col_base, %for.body.preheader ]
645  %acc_n.sroa.0.094 = phi i32 [ %6, %for.body ], [ 0, %for.body.preheader ]
646  %acc_n.sroa.6.093 = phi i32 [ %9, %for.body ], [ 0, %for.body.preheader ]
647  %acc_n.sroa.9.092 = phi i32 [ %12, %for.body ], [ 0, %for.body.preheader ]
648  %i.091 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
649  %row_elem.090 = phi i32 [ %sub, %for.body ], [ %row_elements, %for.body.preheader ]
650  %acc_n.sroa.12.089 = phi i32 [ %15, %for.body ], [ 0, %for.body.preheader ]
651  %ip_row_3.088 = phi i8* [ %add.ptr15, %for.body ], [ %add.ptr3, %for.body.preheader ]
652  %ip_row_2.087 = phi i8* [ %add.ptr14, %for.body ], [ %add.ptr1, %for.body.preheader ]
653  %ip_row_1.086 = phi i8* [ %add.ptr13, %for.body ], [ %add.ptr, %for.body.preheader ]
654  %ip_row_0.085 = phi i8* [ %add.ptr12, %for.body ], [ %row_base, %for.body.preheader ]
655  %1 = tail call <16 x i1> @llvm.arm.mve.vctp8(i32 %row_elem.090)
656  %sub = add nsw i32 %row_elem.090, -16
657  %2 = bitcast i8* %col_base.addr.095 to <16 x i8>*
658  %3 = tail call <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>* %2, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)
659  %add.ptr4 = getelementptr inbounds i8, i8* %col_base.addr.095, i32 16
660  %4 = bitcast i8* %ip_row_0.085 to <16 x i8>*
661  %5 = tail call <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>* %4, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)
662  %6 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.0.094, <16 x i8> %5, <16 x i8> %3, <16 x i1> %1)
663  %7 = bitcast i8* %ip_row_1.086 to <16 x i8>*
664  %8 = tail call <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>* %7, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)
665  %9 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.6.093, <16 x i8> %8, <16 x i8> %3, <16 x i1> %1)
666  %10 = bitcast i8* %ip_row_2.087 to <16 x i8>*
667  %11 = tail call <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>* %10, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)
668  %12 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.9.092, <16 x i8> %11, <16 x i8> %3, <16 x i1> %1)
669  %13 = bitcast i8* %ip_row_3.088 to <16 x i8>*
670  %14 = tail call <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>* %13, i32 1, <16 x i1> %1, <16 x i8> zeroinitializer)
671  %15 = tail call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 %acc_n.sroa.12.089, <16 x i8> %14, <16 x i8> %3, <16 x i1> %1)
672  %add.ptr12 = getelementptr inbounds i8, i8* %ip_row_0.085, i32 16
673  %add.ptr13 = getelementptr inbounds i8, i8* %ip_row_1.086, i32 16
674  %add.ptr14 = getelementptr inbounds i8, i8* %ip_row_2.087, i32 16
675  %add.ptr15 = getelementptr inbounds i8, i8* %ip_row_3.088, i32 16
676  %inc = add nuw nsw i32 %i.091, 1
677  %exitcond = icmp eq i32 %inc, %smax
678  br i1 %exitcond, label %for.cond.cleanup, label %for.body
679}
680
681define i8* @signext(i8* %input_row, i8* %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, i32* nocapture readnone %output_shift, i32* nocapture readnone %output_mult, i32 %out_offset, i32 %col_offset, i32 %row_offset, i16 signext %activation_min, i16 signext %activation_max, i16 zeroext %row_len, i32* nocapture readonly %bias, i8* returned %out) {
682; CHECK-LABEL: signext:
683; CHECK:       @ %bb.0: @ %entry
684; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
685; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
686; CHECK-NEXT:    .pad #24
687; CHECK-NEXT:    sub sp, #24
688; CHECK-NEXT:    add.w r12, sp, #12
689; CHECK-NEXT:    cmp r3, #4
690; CHECK-NEXT:    stm.w r12, {r0, r1, r2} @ 12-byte Folded Spill
691; CHECK-NEXT:    bne .LBB5_8
692; CHECK-NEXT:  @ %bb.1: @ %entry
693; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload
694; CHECK-NEXT:    cmp r0, #0
695; CHECK-NEXT:    beq .LBB5_8
696; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph
697; CHECK-NEXT:    ldr r2, [sp, #88]
698; CHECK-NEXT:    mov.w r9, #0
699; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
700; CHECK-NEXT:    ldr.w r10, [sp, #72]
701; CHECK-NEXT:    add.w r0, r1, r2, lsl #1
702; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill
703; CHECK-NEXT:    adds r0, r1, r2
704; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill
705; CHECK-NEXT:    add.w r0, r2, r2, lsl #1
706; CHECK-NEXT:    add r0, r1
707; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill
708; CHECK-NEXT:    adds r0, r2, #7
709; CHECK-NEXT:    lsrs r2, r0, #3
710; CHECK-NEXT:    b .LBB5_5
711; CHECK-NEXT:  .LBB5_3: @ in Loop: Header=BB5_5 Depth=1
712; CHECK-NEXT:    mov r8, r0
713; CHECK-NEXT:    mov r12, r0
714; CHECK-NEXT:    mov r6, r0
715; CHECK-NEXT:  .LBB5_4: @ %for.cond.cleanup23
716; CHECK-NEXT:    @ in Loop: Header=BB5_5 Depth=1
717; CHECK-NEXT:    add.w r1, r12, r8
718; CHECK-NEXT:    add r1, r6
719; CHECK-NEXT:    add r0, r1
720; CHECK-NEXT:    ldr r1, [sp, #96]
721; CHECK-NEXT:    strb.w r0, [r1, r9]
722; CHECK-NEXT:    add.w r9, r9, #1
723; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload
724; CHECK-NEXT:    cmp r9, r0
725; CHECK-NEXT:    beq .LBB5_8
726; CHECK-NEXT:  .LBB5_5: @ %for.body
727; CHECK-NEXT:    @ =>This Loop Header: Depth=1
728; CHECK-NEXT:    @ Child Loop BB5_7 Depth 2
729; CHECK-NEXT:    ldr r0, [sp, #92]
730; CHECK-NEXT:    cmp r2, r2
731; CHECK-NEXT:    ldr.w r0, [r0, r9, lsl #2]
732; CHECK-NEXT:    bge .LBB5_3
733; CHECK-NEXT:  @ %bb.6: @ %for.body24.preheader
734; CHECK-NEXT:    @ in Loop: Header=BB5_5 Depth=1
735; CHECK-NEXT:    ldr.w r11, [sp, #88]
736; CHECK-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload
737; CHECK-NEXT:    mov r6, r0
738; CHECK-NEXT:    dlstp.16 lr, r11
739; CHECK-NEXT:    ldm.w sp, {r4, r5, r7} @ 12-byte Folded Reload
740; CHECK-NEXT:    mov r12, r0
741; CHECK-NEXT:    mla r3, r9, r11, r1
742; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
743; CHECK-NEXT:    mov r8, r0
744; CHECK-NEXT:  .LBB5_7: @ %for.body24
745; CHECK-NEXT:    @ Parent Loop BB5_5 Depth=1
746; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2
747; CHECK-NEXT:    vldrb.s16 q0, [r4], #8
748; CHECK-NEXT:    vadd.i16 q1, q0, r10
749; CHECK-NEXT:    vldrb.s16 q0, [r3], #8
750; CHECK-NEXT:    vmlava.s16 r0, q0, q1
751; CHECK-NEXT:    vldrb.s16 q1, [r7], #8
752; CHECK-NEXT:    vadd.i16 q1, q1, r10
753; CHECK-NEXT:    vmlava.s16 r6, q0, q1
754; CHECK-NEXT:    vldrb.s16 q1, [r5], #8
755; CHECK-NEXT:    vadd.i16 q1, q1, r10
756; CHECK-NEXT:    vmlava.s16 r12, q0, q1
757; CHECK-NEXT:    vldrb.s16 q1, [r1], #8
758; CHECK-NEXT:    vadd.i16 q1, q1, r10
759; CHECK-NEXT:    vmlava.s16 r8, q0, q1
760; CHECK-NEXT:    letp lr, .LBB5_7
761; CHECK-NEXT:    b .LBB5_4
762; CHECK-NEXT:  .LBB5_8: @ %if.end
763; CHECK-NEXT:    ldr r0, [sp, #96]
764; CHECK-NEXT:    add sp, #24
765; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
766entry:
767  %cmp = icmp eq i16 %num_cols, 4
768  br i1 %cmp, label %for.cond.preheader, label %if.end
769
770for.cond.preheader:                               ; preds = %entry
771  %conv2 = zext i16 %output_ch to i32
772  %cmp3127 = icmp eq i16 %output_ch, 0
773  br i1 %cmp3127, label %if.end, label %for.body.lr.ph
774
775for.body.lr.ph:                                   ; preds = %for.cond.preheader
776  %conv5 = zext i16 %row_len to i32
777  %add.ptr9 = getelementptr inbounds i8, i8* %input_col, i32 %conv5
778  %mul11 = shl nuw nsw i32 %conv5, 1
779  %add.ptr12 = getelementptr inbounds i8, i8* %input_col, i32 %mul11
780  %mul14 = mul nuw nsw i32 %conv5, 3
781  %add.ptr15 = getelementptr inbounds i8, i8* %input_col, i32 %mul14
782  %add = add nuw nsw i32 %conv5, 7
783  %div = lshr i32 %add, 3
784  %conv25 = trunc i32 %col_offset to i16
785  %.splatinsert.i = insertelement <8 x i16> undef, i16 %conv25, i32 0
786  %.splat.i = shufflevector <8 x i16> %.splatinsert.i, <8 x i16> undef, <8 x i32> zeroinitializer
787  br label %for.body
788
789for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph
790  %i_out_ch.0129 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]
791  %i_row_loop.0128 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]
792  %arrayidx = getelementptr inbounds i32, i32* %bias, i32 %i_out_ch.0129
793  %0 = load i32, i32* %arrayidx, align 4
794  %cmp21111 = icmp slt i32 %i_row_loop.0128, %div
795  br i1 %cmp21111, label %for.body24.preheader, label %for.cond.cleanup23
796
797for.body24.preheader:                             ; preds = %for.body
798  %mul = mul nuw nsw i32 %i_out_ch.0129, %conv5
799  %add.ptr = getelementptr inbounds i8, i8* %input_row, i32 %mul
800  br label %for.body24
801
802for.cond.cleanup23:                               ; preds = %for.body24, %for.body
803  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]
804  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]
805  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]
806  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %24, %for.body24 ]
807  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0128, %for.body ], [ %div, %for.body24 ]
808  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa
809  %add32 = add nsw i32 %add31, %acc_2.0.lcssa
810  %add33 = add nsw i32 %add32, %acc_3.0.lcssa
811  %conv34 = trunc i32 %add33 to i8
812  %arrayidx35 = getelementptr inbounds i8, i8* %out, i32 %i_out_ch.0129
813  store i8 %conv34, i8* %arrayidx35, align 1
814  %inc37 = add nuw nsw i32 %i_out_ch.0129, 1
815  %exitcond133 = icmp eq i32 %inc37, %conv2
816  br i1 %exitcond133, label %if.end, label %for.body
817
818for.body24:                                       ; preds = %for.body24, %for.body24.preheader
819  %row_len_tmp.0122 = phi i32 [ %sub, %for.body24 ], [ %conv5, %for.body24.preheader ]
820  %ip_r0.0121 = phi i8* [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]
821  %ip_c0.0120 = phi i8* [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]
822  %ip_c1.0119 = phi i8* [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]
823  %ip_c2.0118 = phi i8* [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]
824  %i_row_loop.1117 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0128, %for.body24.preheader ]
825  %ip_c3.0116 = phi i8* [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]
826  %acc_3.0115 = phi i32 [ %24, %for.body24 ], [ %0, %for.body24.preheader ]
827  %acc_2.0114 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]
828  %acc_1.0113 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]
829  %acc_0.0112 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]
830  %1 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %row_len_tmp.0122)
831  %sub = add nsw i32 %row_len_tmp.0122, -8
832  %2 = bitcast i8* %ip_r0.0121 to <8 x i8>*
833  %3 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %2, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
834  %4 = sext <8 x i8> %3 to <8 x i16>
835  %add.ptr26 = getelementptr inbounds i8, i8* %ip_r0.0121, i32 8
836  %5 = bitcast i8* %ip_c0.0120 to <8 x i8>*
837  %6 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %5, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
838  %7 = sext <8 x i8> %6 to <8 x i16>
839  %add.ptr27 = getelementptr inbounds i8, i8* %ip_c0.0120, i32 8
840  %8 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %7, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
841  %9 = bitcast i8* %ip_c1.0119 to <8 x i8>*
842  %10 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %9, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
843  %11 = sext <8 x i8> %10 to <8 x i16>
844  %add.ptr28 = getelementptr inbounds i8, i8* %ip_c1.0119, i32 8
845  %12 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %11, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
846  %13 = bitcast i8* %ip_c2.0118 to <8 x i8>*
847  %14 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %13, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
848  %15 = sext <8 x i8> %14 to <8 x i16>
849  %add.ptr29 = getelementptr inbounds i8, i8* %ip_c2.0118, i32 8
850  %16 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %15, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
851  %17 = bitcast i8* %ip_c3.0116 to <8 x i8>*
852  %18 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %17, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
853  %19 = sext <8 x i8> %18 to <8 x i16>
854  %add.ptr30 = getelementptr inbounds i8, i8* %ip_c3.0116, i32 8
855  %20 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %19, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
856  %21 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_0.0112, <8 x i16> %4, <8 x i16> %8, <8 x i1> %1)
857  %22 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_1.0113, <8 x i16> %4, <8 x i16> %12, <8 x i1> %1)
858  %23 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_2.0114, <8 x i16> %4, <8 x i16> %16, <8 x i1> %1)
859  %24 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_3.0115, <8 x i16> %4, <8 x i16> %20, <8 x i1> %1)
860  %inc = add nsw i32 %i_row_loop.1117, 1
861  %exitcond = icmp eq i32 %inc, %div
862  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24
863
864if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry
865  ret i8* %out
866}
867
868define i8* @signext_optsize(i8* %input_row, i8* %input_col, i16 zeroext %output_ch, i16 zeroext %num_cols, i32* nocapture readnone %output_shift, i32* nocapture readnone %output_mult, i32 %out_offset, i32 %col_offset, i32 %row_offset, i16 signext %activation_min, i16 signext %activation_max, i16 zeroext %row_len, i32* nocapture readonly %bias, i8* returned %out) optsize {
869; CHECK-LABEL: signext_optsize:
870; CHECK:       @ %bb.0: @ %entry
871; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
872; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
873; CHECK-NEXT:    .pad #24
874; CHECK-NEXT:    sub sp, #24
875; CHECK-NEXT:    add.w r12, sp, #12
876; CHECK-NEXT:    cmp r3, #4
877; CHECK-NEXT:    stm.w r12, {r0, r1, r2} @ 12-byte Folded Spill
878; CHECK-NEXT:    bne .LBB6_8
879; CHECK-NEXT:  @ %bb.1: @ %entry
880; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload
881; CHECK-NEXT:    cmp r0, #0
882; CHECK-NEXT:    beq .LBB6_8
883; CHECK-NEXT:  @ %bb.2: @ %for.body.lr.ph
884; CHECK-NEXT:    ldr r2, [sp, #88]
885; CHECK-NEXT:    mov.w r9, #0
886; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
887; CHECK-NEXT:    ldr.w r10, [sp, #72]
888; CHECK-NEXT:    add.w r0, r1, r2, lsl #1
889; CHECK-NEXT:    str r0, [sp, #8] @ 4-byte Spill
890; CHECK-NEXT:    adds r0, r1, r2
891; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill
892; CHECK-NEXT:    add.w r0, r2, r2, lsl #1
893; CHECK-NEXT:    add r0, r1
894; CHECK-NEXT:    str r0, [sp] @ 4-byte Spill
895; CHECK-NEXT:    adds r0, r2, #7
896; CHECK-NEXT:    lsrs r2, r0, #3
897; CHECK-NEXT:  .LBB6_3: @ %for.body
898; CHECK-NEXT:    @ =>This Loop Header: Depth=1
899; CHECK-NEXT:    @ Child Loop BB6_5 Depth 2
900; CHECK-NEXT:    ldr r0, [sp, #92]
901; CHECK-NEXT:    cmp r2, r2
902; CHECK-NEXT:    ldr.w r0, [r0, r9, lsl #2]
903; CHECK-NEXT:    bge .LBB6_6
904; CHECK-NEXT:  @ %bb.4: @ %for.body24.preheader
905; CHECK-NEXT:    @ in Loop: Header=BB6_3 Depth=1
906; CHECK-NEXT:    ldr.w r11, [sp, #88]
907; CHECK-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload
908; CHECK-NEXT:    mov r6, r0
909; CHECK-NEXT:    dlstp.16 lr, r11
910; CHECK-NEXT:    ldm.w sp, {r4, r5, r7} @ 12-byte Folded Reload
911; CHECK-NEXT:    mov r12, r0
912; CHECK-NEXT:    mla r3, r9, r11, r1
913; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
914; CHECK-NEXT:    mov r8, r0
915; CHECK-NEXT:  .LBB6_5: @ %for.body24
916; CHECK-NEXT:    @ Parent Loop BB6_3 Depth=1
917; CHECK-NEXT:    @ => This Inner Loop Header: Depth=2
918; CHECK-NEXT:    vldrb.s16 q0, [r4], #8
919; CHECK-NEXT:    vadd.i16 q1, q0, r10
920; CHECK-NEXT:    vldrb.s16 q0, [r3], #8
921; CHECK-NEXT:    vmlava.s16 r0, q0, q1
922; CHECK-NEXT:    vldrb.s16 q1, [r7], #8
923; CHECK-NEXT:    vadd.i16 q1, q1, r10
924; CHECK-NEXT:    vmlava.s16 r6, q0, q1
925; CHECK-NEXT:    vldrb.s16 q1, [r5], #8
926; CHECK-NEXT:    vadd.i16 q1, q1, r10
927; CHECK-NEXT:    vmlava.s16 r12, q0, q1
928; CHECK-NEXT:    vldrb.s16 q1, [r1], #8
929; CHECK-NEXT:    vadd.i16 q1, q1, r10
930; CHECK-NEXT:    vmlava.s16 r8, q0, q1
931; CHECK-NEXT:    letp lr, .LBB6_5
932; CHECK-NEXT:    b .LBB6_7
933; CHECK-NEXT:  .LBB6_6: @ in Loop: Header=BB6_3 Depth=1
934; CHECK-NEXT:    mov r8, r0
935; CHECK-NEXT:    mov r12, r0
936; CHECK-NEXT:    mov r6, r0
937; CHECK-NEXT:  .LBB6_7: @ %for.cond.cleanup23
938; CHECK-NEXT:    @ in Loop: Header=BB6_3 Depth=1
939; CHECK-NEXT:    add.w r1, r12, r8
940; CHECK-NEXT:    add r1, r6
941; CHECK-NEXT:    add r0, r1
942; CHECK-NEXT:    ldr r1, [sp, #96]
943; CHECK-NEXT:    strb.w r0, [r1, r9]
944; CHECK-NEXT:    add.w r9, r9, #1
945; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload
946; CHECK-NEXT:    cmp r9, r0
947; CHECK-NEXT:    bne .LBB6_3
948; CHECK-NEXT:  .LBB6_8: @ %if.end
949; CHECK-NEXT:    ldr r0, [sp, #96]
950; CHECK-NEXT:    add sp, #24
951; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
952entry:
953  %cmp = icmp eq i16 %num_cols, 4
954  br i1 %cmp, label %for.cond.preheader, label %if.end
955
956for.cond.preheader:                               ; preds = %entry
957  %conv2 = zext i16 %output_ch to i32
958  %cmp3127 = icmp eq i16 %output_ch, 0
959  br i1 %cmp3127, label %if.end, label %for.body.lr.ph
960
961for.body.lr.ph:                                   ; preds = %for.cond.preheader
962  %conv5 = zext i16 %row_len to i32
963  %add.ptr9 = getelementptr inbounds i8, i8* %input_col, i32 %conv5
964  %mul11 = shl nuw nsw i32 %conv5, 1
965  %add.ptr12 = getelementptr inbounds i8, i8* %input_col, i32 %mul11
966  %mul14 = mul nuw nsw i32 %conv5, 3
967  %add.ptr15 = getelementptr inbounds i8, i8* %input_col, i32 %mul14
968  %add = add nuw nsw i32 %conv5, 7
969  %div = lshr i32 %add, 3
970  %conv25 = trunc i32 %col_offset to i16
971  %.splatinsert.i = insertelement <8 x i16> undef, i16 %conv25, i32 0
972  %.splat.i = shufflevector <8 x i16> %.splatinsert.i, <8 x i16> undef, <8 x i32> zeroinitializer
973  br label %for.body
974
975for.body:                                         ; preds = %for.cond.cleanup23, %for.body.lr.ph
976  %i_out_ch.0129 = phi i32 [ 0, %for.body.lr.ph ], [ %inc37, %for.cond.cleanup23 ]
977  %i_row_loop.0128 = phi i32 [ undef, %for.body.lr.ph ], [ %i_row_loop.1.lcssa, %for.cond.cleanup23 ]
978  %arrayidx = getelementptr inbounds i32, i32* %bias, i32 %i_out_ch.0129
979  %0 = load i32, i32* %arrayidx, align 4
980  %cmp21111 = icmp slt i32 %i_row_loop.0128, %div
981  br i1 %cmp21111, label %for.body24.preheader, label %for.cond.cleanup23
982
983for.body24.preheader:                             ; preds = %for.body
984  %mul = mul nuw nsw i32 %i_out_ch.0129, %conv5
985  %add.ptr = getelementptr inbounds i8, i8* %input_row, i32 %mul
986  br label %for.body24
987
988for.cond.cleanup23:                               ; preds = %for.body24, %for.body
989  %acc_0.0.lcssa = phi i32 [ %0, %for.body ], [ %21, %for.body24 ]
990  %acc_1.0.lcssa = phi i32 [ %0, %for.body ], [ %22, %for.body24 ]
991  %acc_2.0.lcssa = phi i32 [ %0, %for.body ], [ %23, %for.body24 ]
992  %acc_3.0.lcssa = phi i32 [ %0, %for.body ], [ %24, %for.body24 ]
993  %i_row_loop.1.lcssa = phi i32 [ %i_row_loop.0128, %for.body ], [ %div, %for.body24 ]
994  %add31 = add nsw i32 %acc_1.0.lcssa, %acc_0.0.lcssa
995  %add32 = add nsw i32 %add31, %acc_2.0.lcssa
996  %add33 = add nsw i32 %add32, %acc_3.0.lcssa
997  %conv34 = trunc i32 %add33 to i8
998  %arrayidx35 = getelementptr inbounds i8, i8* %out, i32 %i_out_ch.0129
999  store i8 %conv34, i8* %arrayidx35, align 1
1000  %inc37 = add nuw nsw i32 %i_out_ch.0129, 1
1001  %exitcond133 = icmp eq i32 %inc37, %conv2
1002  br i1 %exitcond133, label %if.end, label %for.body
1003
1004for.body24:                                       ; preds = %for.body24, %for.body24.preheader
1005  %row_len_tmp.0122 = phi i32 [ %sub, %for.body24 ], [ %conv5, %for.body24.preheader ]
1006  %ip_r0.0121 = phi i8* [ %add.ptr26, %for.body24 ], [ %add.ptr, %for.body24.preheader ]
1007  %ip_c0.0120 = phi i8* [ %add.ptr27, %for.body24 ], [ %input_col, %for.body24.preheader ]
1008  %ip_c1.0119 = phi i8* [ %add.ptr28, %for.body24 ], [ %add.ptr9, %for.body24.preheader ]
1009  %ip_c2.0118 = phi i8* [ %add.ptr29, %for.body24 ], [ %add.ptr12, %for.body24.preheader ]
1010  %i_row_loop.1117 = phi i32 [ %inc, %for.body24 ], [ %i_row_loop.0128, %for.body24.preheader ]
1011  %ip_c3.0116 = phi i8* [ %add.ptr30, %for.body24 ], [ %add.ptr15, %for.body24.preheader ]
1012  %acc_3.0115 = phi i32 [ %24, %for.body24 ], [ %0, %for.body24.preheader ]
1013  %acc_2.0114 = phi i32 [ %23, %for.body24 ], [ %0, %for.body24.preheader ]
1014  %acc_1.0113 = phi i32 [ %22, %for.body24 ], [ %0, %for.body24.preheader ]
1015  %acc_0.0112 = phi i32 [ %21, %for.body24 ], [ %0, %for.body24.preheader ]
1016  %1 = tail call <8 x i1> @llvm.arm.mve.vctp16(i32 %row_len_tmp.0122)
1017  %sub = add nsw i32 %row_len_tmp.0122, -8
1018  %2 = bitcast i8* %ip_r0.0121 to <8 x i8>*
1019  %3 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %2, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
1020  %4 = sext <8 x i8> %3 to <8 x i16>
1021  %add.ptr26 = getelementptr inbounds i8, i8* %ip_r0.0121, i32 8
1022  %5 = bitcast i8* %ip_c0.0120 to <8 x i8>*
1023  %6 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %5, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
1024  %7 = sext <8 x i8> %6 to <8 x i16>
1025  %add.ptr27 = getelementptr inbounds i8, i8* %ip_c0.0120, i32 8
1026  %8 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %7, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
1027  %9 = bitcast i8* %ip_c1.0119 to <8 x i8>*
1028  %10 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %9, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
1029  %11 = sext <8 x i8> %10 to <8 x i16>
1030  %add.ptr28 = getelementptr inbounds i8, i8* %ip_c1.0119, i32 8
1031  %12 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %11, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
1032  %13 = bitcast i8* %ip_c2.0118 to <8 x i8>*
1033  %14 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %13, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
1034  %15 = sext <8 x i8> %14 to <8 x i16>
1035  %add.ptr29 = getelementptr inbounds i8, i8* %ip_c2.0118, i32 8
1036  %16 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %15, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
1037  %17 = bitcast i8* %ip_c3.0116 to <8 x i8>*
1038  %18 = tail call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %17, i32 1, <8 x i1> %1, <8 x i8> zeroinitializer)
1039  %19 = sext <8 x i8> %18 to <8 x i16>
1040  %add.ptr30 = getelementptr inbounds i8, i8* %ip_c3.0116, i32 8
1041  %20 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %19, <8 x i16> %.splat.i, <8 x i1> %1, <8 x i16> undef)
1042  %21 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_0.0112, <8 x i16> %4, <8 x i16> %8, <8 x i1> %1)
1043  %22 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_1.0113, <8 x i16> %4, <8 x i16> %12, <8 x i1> %1)
1044  %23 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_2.0114, <8 x i16> %4, <8 x i16> %16, <8 x i1> %1)
1045  %24 = tail call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 %acc_3.0115, <8 x i16> %4, <8 x i16> %20, <8 x i1> %1)
1046  %inc = add nsw i32 %i_row_loop.1117, 1
1047  %exitcond = icmp eq i32 %inc, %div
1048  br i1 %exitcond, label %for.cond.cleanup23, label %for.body24
1049
1050if.end:                                           ; preds = %for.cond.cleanup23, %for.cond.preheader, %entry
1051  ret i8* %out
1052}
1053
1054%struct.arm_cfft_instance_f32 = type { i16, float*, i16*, i16, i32*, i32*, i32*, float*, float*, float* }
1055define arm_aapcs_vfpcc void @_Z37_arm_radix4_butterfly_inverse_f32_mvePK21arm_cfft_instance_f32Pfjf(%struct.arm_cfft_instance_f32* nocapture readonly %0, float* %1, i32 %2, float %3) {
1056; CHECK-LABEL: _Z37_arm_radix4_butterfly_inverse_f32_mvePK21arm_cfft_instance_f32Pfjf:
1057; CHECK:       @ %bb.0:
1058; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
1059; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
1060; CHECK-NEXT:    .pad #4
1061; CHECK-NEXT:    sub sp, #4
1062; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}
1063; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}
1064; CHECK-NEXT:    .pad #56
1065; CHECK-NEXT:    sub sp, #56
1066; CHECK-NEXT:    cmp r2, #8
1067; CHECK-NEXT:    str r1, [sp, #20] @ 4-byte Spill
1068; CHECK-NEXT:    vstr s0, [sp, #4] @ 4-byte Spill
1069; CHECK-NEXT:    mov r1, r2
1070; CHECK-NEXT:    str r2, [sp, #8] @ 4-byte Spill
1071; CHECK-NEXT:    blo.w .LBB7_9
1072; CHECK-NEXT:  @ %bb.1:
1073; CHECK-NEXT:    ldr r2, [sp, #8] @ 4-byte Reload
1074; CHECK-NEXT:    movs r3, #1
1075; CHECK-NEXT:    mov.w r10, #0
1076; CHECK-NEXT:    str r2, [sp, #16] @ 4-byte Spill
1077; CHECK-NEXT:    lsrs r1, r2, #2
1078; CHECK-NEXT:    b .LBB7_3
1079; CHECK-NEXT:  .LBB7_2: @ in Loop: Header=BB7_3 Depth=1
1080; CHECK-NEXT:    ldr r2, [sp, #12] @ 4-byte Reload
1081; CHECK-NEXT:    add.w r10, r10, #1
1082; CHECK-NEXT:    lsls r3, r3, #2
1083; CHECK-NEXT:    cmp r2, #7
1084; CHECK-NEXT:    asr.w r1, r2, #2
1085; CHECK-NEXT:    ble .LBB7_9
1086; CHECK-NEXT:  .LBB7_3: @ =>This Loop Header: Depth=1
1087; CHECK-NEXT:    @ Child Loop BB7_6 Depth 2
1088; CHECK-NEXT:    @ Child Loop BB7_7 Depth 3
1089; CHECK-NEXT:    str r1, [sp, #12] @ 4-byte Spill
1090; CHECK-NEXT:    cmp r3, #1
1091; CHECK-NEXT:    ldr r1, [sp, #16] @ 4-byte Reload
1092; CHECK-NEXT:    lsr.w r2, r1, #2
1093; CHECK-NEXT:    str r2, [sp, #16] @ 4-byte Spill
1094; CHECK-NEXT:    blt .LBB7_2
1095; CHECK-NEXT:  @ %bb.4: @ in Loop: Header=BB7_3 Depth=1
1096; CHECK-NEXT:    movs r2, #0
1097; CHECK-NEXT:    cmp.w r2, r1, lsr #3
1098; CHECK-NEXT:    beq .LBB7_2
1099; CHECK-NEXT:  @ %bb.5: @ %.preheader
1100; CHECK-NEXT:    @ in Loop: Header=BB7_3 Depth=1
1101; CHECK-NEXT:    lsrs r2, r1, #3
1102; CHECK-NEXT:    lsls r1, r1, #1
1103; CHECK-NEXT:    str r2, [sp, #28] @ 4-byte Spill
1104; CHECK-NEXT:    movs r6, #0
1105; CHECK-NEXT:    ldr r2, [sp, #16] @ 4-byte Reload
1106; CHECK-NEXT:    str r1, [sp, #24] @ 4-byte Spill
1107; CHECK-NEXT:    str r3, [sp, #32] @ 4-byte Spill
1108; CHECK-NEXT:    lsl.w r11, r2, #1
1109; CHECK-NEXT:  .LBB7_6: @ Parent Loop BB7_3 Depth=1
1110; CHECK-NEXT:    @ => This Loop Header: Depth=2
1111; CHECK-NEXT:    @ Child Loop BB7_7 Depth 3
1112; CHECK-NEXT:    ldrd r3, lr, [r0, #24]
1113; CHECK-NEXT:    ldr r1, [sp, #24] @ 4-byte Reload
1114; CHECK-NEXT:    ldrd r12, r2, [r0, #16]
1115; CHECK-NEXT:    ldr.w r3, [r3, r10, lsl #2]
1116; CHECK-NEXT:    muls r1, r6, r1
1117; CHECK-NEXT:    ldr.w r2, [r2, r10, lsl #2]
1118; CHECK-NEXT:    ldrd r7, r5, [r0, #32]
1119; CHECK-NEXT:    add.w r5, r5, r3, lsl #2
1120; CHECK-NEXT:    ldr.w r4, [r12, r10, lsl #2]
1121; CHECK-NEXT:    add.w r3, r7, r2, lsl #2
1122; CHECK-NEXT:    ldr r2, [sp, #20] @ 4-byte Reload
1123; CHECK-NEXT:    ldr r7, [sp, #28] @ 4-byte Reload
1124; CHECK-NEXT:    add.w r2, r2, r1, lsl #2
1125; CHECK-NEXT:    add.w r12, lr, r4, lsl #2
1126; CHECK-NEXT:    add.w r1, r2, r11, lsl #2
1127; CHECK-NEXT:    dls lr, r7
1128; CHECK-NEXT:    add.w r8, r1, r11, lsl #2
1129; CHECK-NEXT:    add.w r9, r8, r11, lsl #2
1130; CHECK-NEXT:  .LBB7_7: @ Parent Loop BB7_3 Depth=1
1131; CHECK-NEXT:    @ Parent Loop BB7_6 Depth=2
1132; CHECK-NEXT:    @ => This Inner Loop Header: Depth=3
1133; CHECK-NEXT:    vldrw.u32 q3, [r9]
1134; CHECK-NEXT:    vldrw.u32 q4, [r1]
1135; CHECK-NEXT:    vldrw.u32 q6, [r8]
1136; CHECK-NEXT:    vldrw.u32 q7, [r2]
1137; CHECK-NEXT:    vsub.f32 q5, q4, q3
1138; CHECK-NEXT:    vsub.f32 q0, q7, q6
1139; CHECK-NEXT:    vcadd.f32 q1, q0, q5, #270
1140; CHECK-NEXT:    vcadd.f32 q2, q0, q5, #90
1141; CHECK-NEXT:    vadd.f32 q0, q4, q3
1142; CHECK-NEXT:    vadd.f32 q3, q6, q7
1143; CHECK-NEXT:    vsub.f32 q4, q3, q0
1144; CHECK-NEXT:    vadd.f32 q0, q3, q0
1145; CHECK-NEXT:    vstrb.8 q0, [r2], #16
1146; CHECK-NEXT:    vldrw.u32 q0, [r3], #16
1147; CHECK-NEXT:    vcmul.f32 q3, q0, q4, #0
1148; CHECK-NEXT:    vcmla.f32 q3, q0, q4, #90
1149; CHECK-NEXT:    vstrb.8 q3, [r1], #16
1150; CHECK-NEXT:    vldrw.u32 q0, [r12], #16
1151; CHECK-NEXT:    vcmul.f32 q3, q0, q2, #0
1152; CHECK-NEXT:    vcmla.f32 q3, q0, q2, #90
1153; CHECK-NEXT:    vstrb.8 q3, [r8], #16
1154; CHECK-NEXT:    vldrw.u32 q0, [r5], #16
1155; CHECK-NEXT:    vcmul.f32 q2, q0, q1, #0
1156; CHECK-NEXT:    vcmla.f32 q2, q0, q1, #90
1157; CHECK-NEXT:    vstrb.8 q2, [r9], #16
1158; CHECK-NEXT:    le lr, .LBB7_7
1159; CHECK-NEXT:  @ %bb.8: @ in Loop: Header=BB7_6 Depth=2
1160; CHECK-NEXT:    ldr r3, [sp, #32] @ 4-byte Reload
1161; CHECK-NEXT:    adds r6, #1
1162; CHECK-NEXT:    cmp r6, r3
1163; CHECK-NEXT:    bne .LBB7_6
1164; CHECK-NEXT:    b .LBB7_2
1165; CHECK-NEXT:  .LBB7_9:
1166; CHECK-NEXT:    adr r0, .LCPI7_0
1167; CHECK-NEXT:    vldrw.u32 q1, [r0]
1168; CHECK-NEXT:    ldr r0, [sp, #20] @ 4-byte Reload
1169; CHECK-NEXT:    vadd.i32 q1, q1, r0
1170; CHECK-NEXT:    vldrw.u32 q2, [q1, #64]!
1171; CHECK-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload
1172; CHECK-NEXT:    lsr.w lr, r0, #3
1173; CHECK-NEXT:    wls lr, lr, .LBB7_12
1174; CHECK-NEXT:  @ %bb.10:
1175; CHECK-NEXT:    vldr s0, [sp, #4] @ 4-byte Reload
1176; CHECK-NEXT:    vmov r0, s0
1177; CHECK-NEXT:    vldrw.u32 q0, [q1, #16]
1178; CHECK-NEXT:  .LBB7_11: @ =>This Inner Loop Header: Depth=1
1179; CHECK-NEXT:    vldrw.u32 q3, [q1, #24]
1180; CHECK-NEXT:    vldrw.u32 q4, [q1, #8]
1181; CHECK-NEXT:    vsub.f32 q6, q2, q0
1182; CHECK-NEXT:    vadd.f32 q0, q2, q0
1183; CHECK-NEXT:    vsub.f32 q5, q4, q3
1184; CHECK-NEXT:    vadd.f32 q3, q4, q3
1185; CHECK-NEXT:    vcadd.f32 q7, q6, q5, #270
1186; CHECK-NEXT:    vsub.f32 q2, q0, q3
1187; CHECK-NEXT:    vmul.f32 q7, q7, r0
1188; CHECK-NEXT:    vadd.f32 q3, q0, q3
1189; CHECK-NEXT:    vstrw.32 q7, [sp, #32] @ 16-byte Spill
1190; CHECK-NEXT:    vcadd.f32 q7, q6, q5, #90
1191; CHECK-NEXT:    vmul.f32 q4, q2, r0
1192; CHECK-NEXT:    vldrw.u32 q2, [q1, #64]!
1193; CHECK-NEXT:    vmul.f32 q5, q7, r0
1194; CHECK-NEXT:    vmul.f32 q3, q3, r0
1195; CHECK-NEXT:    vldrw.u32 q0, [q1, #16]
1196; CHECK-NEXT:    vstrw.32 q3, [q1, #-64]
1197; CHECK-NEXT:    vstrw.32 q4, [q1, #-56]
1198; CHECK-NEXT:    vstrw.32 q5, [q1, #-48]
1199; CHECK-NEXT:    vldrw.u32 q3, [sp, #32] @ 16-byte Reload
1200; CHECK-NEXT:    vstrw.32 q3, [q1, #-40]
1201; CHECK-NEXT:    le lr, .LBB7_11
1202; CHECK-NEXT:  .LBB7_12:
1203; CHECK-NEXT:    add sp, #56
1204; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}
1205; CHECK-NEXT:    add sp, #4
1206; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
1207; CHECK-NEXT:    .p2align 4
1208; CHECK-NEXT:  @ %bb.13:
1209; CHECK-NEXT:  .LCPI7_0:
1210; CHECK-NEXT:    .long 4294967232 @ 0xffffffc0
1211; CHECK-NEXT:    .long 4294967236 @ 0xffffffc4
1212; CHECK-NEXT:    .long 4294967264 @ 0xffffffe0
1213; CHECK-NEXT:    .long 4294967268 @ 0xffffffe4
1214  %5 = icmp ugt i32 %2, 7
1215  br i1 %5, label %6, label %26
1216
12176: ; preds = %4
1218  %7 = lshr i32 %2, 2
1219  %8 = getelementptr inbounds %struct.arm_cfft_instance_f32, %struct.arm_cfft_instance_f32* %0, i32 0, i32 7
1220  %9 = getelementptr inbounds %struct.arm_cfft_instance_f32, %struct.arm_cfft_instance_f32* %0, i32 0, i32 4
1221  %10 = getelementptr inbounds %struct.arm_cfft_instance_f32, %struct.arm_cfft_instance_f32* %0, i32 0, i32 8
1222  %11 = getelementptr inbounds %struct.arm_cfft_instance_f32, %struct.arm_cfft_instance_f32* %0, i32 0, i32 5
1223  %12 = getelementptr inbounds %struct.arm_cfft_instance_f32, %struct.arm_cfft_instance_f32* %0, i32 0, i32 9
1224  %13 = getelementptr inbounds %struct.arm_cfft_instance_f32, %struct.arm_cfft_instance_f32* %0, i32 0, i32 6
1225  br label %14
1226
122714: ; preds = %6, %40
1228  %15 = phi i32 [ %2, %6 ], [ %19, %40 ]
1229  %16 = phi i32 [ %7, %6 ], [ %43, %40 ]
1230  %17 = phi i32 [ 1, %6 ], [ %41, %40 ]
1231  %18 = phi i32 [ 0, %6 ], [ %42, %40 ]
1232  %19 = lshr i32 %15, 2
1233  %20 = icmp sgt i32 %17, 0
1234  br i1 %20, label %21, label %40
1235
123621: ; preds = %14
1237  %22 = shl i32 %15, 1
1238  %23 = shl nuw nsw i32 %19, 1
1239  %24 = lshr i32 %15, 3
1240  %25 = icmp eq i32 %24, 0
1241  br i1 %25, label %40, label %45
1242
124326: ; preds = %40, %4
1244  %27 = ptrtoint float* %1 to i32
1245  %28 = insertelement <4 x i32> undef, i32 %27, i32 0
1246  %29 = shufflevector <4 x i32> %28, <4 x i32> undef, <4 x i32> zeroinitializer
1247  %30 = add <4 x i32> %29, <i32 -64, i32 -60, i32 -32, i32 -28>
1248  %31 = tail call { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32> %30, i32 64)
1249  %32 = extractvalue { <4 x float>, <4 x i32> } %31, 1
1250  %33 = lshr i32 %2, 3
1251  %34 = icmp eq i32 %33, 0
1252  br i1 %34, label %141, label %35
1253
125435: ; preds = %26
1255  %36 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %32, i32 16)
1256  %37 = extractvalue { <4 x float>, <4 x i32> } %31, 0
1257  %38 = insertelement <4 x float> undef, float %3, i32 0
1258  %39 = shufflevector <4 x float> %38, <4 x float> undef, <4 x i32> zeroinitializer
1259  br label %116
1260
126140: ; preds = %113, %21, %14
1262  %41 = shl i32 %17, 2
1263  %42 = add nuw nsw i32 %18, 1
1264  %43 = ashr i32 %16, 2
1265  %44 = icmp sgt i32 %16, 7
1266  br i1 %44, label %14, label %26
1267
126845: ; preds = %21, %113
1269  %46 = phi i32 [ %114, %113 ], [ 0, %21 ]
1270  %47 = load float*, float** %8, align 4
1271  %48 = load i32*, i32** %9, align 4
1272  %49 = getelementptr inbounds i32, i32* %48, i32 %18
1273  %50 = load i32, i32* %49, align 4
1274  %51 = getelementptr inbounds float, float* %47, i32 %50
1275  %52 = load float*, float** %10, align 4
1276  %53 = load i32*, i32** %11, align 4
1277  %54 = getelementptr inbounds i32, i32* %53, i32 %18
1278  %55 = load i32, i32* %54, align 4
1279  %56 = getelementptr inbounds float, float* %52, i32 %55
1280  %57 = load float*, float** %12, align 4
1281  %58 = load i32*, i32** %13, align 4
1282  %59 = getelementptr inbounds i32, i32* %58, i32 %18
1283  %60 = load i32, i32* %59, align 4
1284  %61 = getelementptr inbounds float, float* %57, i32 %60
1285  %62 = mul i32 %22, %46
1286  %63 = getelementptr inbounds float, float* %1, i32 %62
1287  %64 = getelementptr inbounds float, float* %63, i32 %23
1288  %65 = getelementptr inbounds float, float* %64, i32 %23
1289  %66 = getelementptr inbounds float, float* %65, i32 %23
1290  br label %67
1291
129267: ; preds = %45, %67
1293  %68 = phi float* [ %63, %45 ], [ %89, %67 ]
1294  %69 = phi float* [ %65, %45 ], [ %103, %67 ]
1295  %70 = phi float* [ %66, %45 ], [ %110, %67 ]
1296  %71 = phi float* [ %64, %45 ], [ %96, %67 ]
1297  %72 = phi float* [ %61, %45 ], [ %107, %67 ]
1298  %73 = phi float* [ %56, %45 ], [ %93, %67 ]
1299  %74 = phi float* [ %51, %45 ], [ %100, %67 ]
1300  %75 = phi i32 [ %24, %45 ], [ %111, %67 ]
1301  %76 = bitcast float* %69 to <4 x float>*
1302  %77 = bitcast float* %68 to <4 x float>*
1303  %78 = load <4 x float>, <4 x float>* %76, align 4
1304  %79 = load <4 x float>, <4 x float>* %77, align 4
1305  %80 = bitcast float* %71 to <4 x float>*
1306  %81 = load <4 x float>, <4 x float>* %80, align 4
1307  %82 = bitcast float* %70 to <4 x float>*
1308  %83 = load <4 x float>, <4 x float>* %82, align 4
1309  %84 = fadd <4 x float> %78, %79
1310  %85 = fsub <4 x float> %79, %78
1311  %86 = fadd <4 x float> %81, %83
1312  %87 = fsub <4 x float> %81, %83
1313  %88 = fadd <4 x float> %84, %86
1314  store <4 x float> %88, <4 x float>* %77, align 4
1315  %89 = getelementptr inbounds float, float* %68, i32 4
1316  %90 = fsub <4 x float> %84, %86
1317  %91 = bitcast float* %73 to <4 x float>*
1318  %92 = load <4 x float>, <4 x float>* %91, align 4
1319  %93 = getelementptr inbounds float, float* %73, i32 4
1320  %94 = tail call <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32 0, <4 x float> %92, <4 x float> %90)
1321  %95 = tail call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> %94, <4 x float> %92, <4 x float> %90)
1322  store <4 x float> %95, <4 x float>* %80, align 4
1323  %96 = getelementptr inbounds float, float* %71, i32 4
1324  %97 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 0, <4 x float> %85, <4 x float> %87)
1325  %98 = bitcast float* %74 to <4 x float>*
1326  %99 = load <4 x float>, <4 x float>* %98, align 4
1327  %100 = getelementptr inbounds float, float* %74, i32 4
1328  %101 = tail call <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32 0, <4 x float> %99, <4 x float> %97)
1329  %102 = tail call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> %101, <4 x float> %99, <4 x float> %97)
1330  store <4 x float> %102, <4 x float>* %76, align 4
1331  %103 = getelementptr inbounds float, float* %69, i32 4
1332  %104 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 1, <4 x float> %85, <4 x float> %87)
1333  %105 = bitcast float* %72 to <4 x float>*
1334  %106 = load <4 x float>, <4 x float>* %105, align 4
1335  %107 = getelementptr inbounds float, float* %72, i32 4
1336  %108 = tail call <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32 0, <4 x float> %106, <4 x float> %104)
1337  %109 = tail call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> %108, <4 x float> %106, <4 x float> %104)
1338  store <4 x float> %109, <4 x float>* %82, align 4
1339  %110 = getelementptr inbounds float, float* %70, i32 4
1340  %111 = add nsw i32 %75, -1
1341  %112 = icmp eq i32 %111, 0
1342  br i1 %112, label %113, label %67
1343
1344113: ; preds = %67
1345  %114 = add nuw nsw i32 %46, 1
1346  %115 = icmp eq i32 %114, %17
1347  br i1 %115, label %40, label %45
1348
1349116: ; preds = %35, %116
1350  %117 = phi <4 x i32> [ %32, %35 ], [ %128, %116 ]
1351  %118 = phi i32 [ %33, %35 ], [ %139, %116 ]
1352  %119 = phi <4 x float> [ %36, %35 ], [ %130, %116 ]
1353  %120 = phi <4 x float> [ %37, %35 ], [ %129, %116 ]
1354  %121 = fadd <4 x float> %120, %119
1355  %122 = fsub <4 x float> %120, %119
1356  %123 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %117, i32 8)
1357  %124 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %117, i32 24)
1358  %125 = fadd <4 x float> %123, %124
1359  %126 = fsub <4 x float> %123, %124
1360  %127 = tail call { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32> %117, i32 64)
1361  %128 = extractvalue { <4 x float>, <4 x i32> } %127, 1
1362  %129 = extractvalue { <4 x float>, <4 x i32> } %127, 0
1363  %130 = tail call <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32> %128, i32 16)
1364  %131 = fadd <4 x float> %121, %125
1365  %132 = fmul <4 x float> %39, %131
1366  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -64, <4 x float> %132)
1367  %133 = fsub <4 x float> %121, %125
1368  %134 = fmul <4 x float> %39, %133
1369  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -56, <4 x float> %134)
1370  %135 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 0, <4 x float> %122, <4 x float> %126)
1371  %136 = fmul <4 x float> %39, %135
1372  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -48, <4 x float> %136)
1373  %137 = tail call <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32 1, i32 1, <4 x float> %122, <4 x float> %126)
1374  %138 = fmul <4 x float> %39, %137
1375  tail call void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32> %128, i32 -40, <4 x float> %138)
1376  %139 = add nsw i32 %118, -1
1377  %140 = icmp eq i32 %139, 0
1378  br i1 %140, label %141, label %116
1379
1380141: ; preds = %116, %26
1381  ret void
1382}
1383
1384declare <16 x i1> @llvm.arm.mve.vctp8(i32)
1385declare <8 x i1> @llvm.arm.mve.vctp16(i32)
1386declare i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1>)
1387declare <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>*, i32 immarg, <4 x i1>, <4 x float>)
1388declare <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>*, i32, <8 x i1>, <8 x i8>)
1389declare <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>*, i32 immarg, <16 x i1>, <16 x i8>)
1390declare void @llvm.masked.store.v4f32.p0v4f32(<4 x float>, <4 x float>*, i32 immarg, <4 x i1>)
1391declare i32 @llvm.vector.reduce.add.v16i8(<16 x i32> %ext4)
1392declare i32 @llvm.arm.mve.vmldava.v8i16(i32, i32, i32, i32, <8 x i16>, <8 x i16>)
1393declare i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32, i32, i32, i32, <16 x i8>, <16 x i8>, <16 x i1>)
1394declare i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32, i32, i32, i32, <8 x i16>, <8 x i16>, <8 x i1>)
1395declare <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, <8 x i1>, <8 x i16>)
1396
1397declare <4 x float> @llvm.arm.mve.vcmulq.v4f32(i32, <4 x float>, <4 x float>)
1398declare <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32, <4 x float>, <4 x float>, <4 x float>)
1399declare <4 x float> @llvm.arm.mve.vcaddq.v4f32(i32, i32, <4 x float>, <4 x float>)
1400declare { <4 x float>, <4 x i32> } @llvm.arm.mve.vldr.gather.base.wb.v4f32.v4i32(<4 x i32>, i32)
1401declare <4 x float> @llvm.arm.mve.vldr.gather.base.v4f32.v4i32(<4 x i32>, i32)
1402declare void @llvm.arm.mve.vstr.scatter.base.v4i32.v4f32(<4 x i32>, i32, <4 x float>)
1403