1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -run-pass arm-mve-vpt %s -o - | FileCheck %s
3
4--- |
5  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
6  target triple = "thumbv8.1m.main-none-none-eabi"
7
8  define hidden arm_aapcs_vfpcc <4 x float> @vpt_block_4_ins(<4 x float> %inactive1, <4 x float> %inactive2, <4 x float> %a, <4 x float> %b, i16 zeroext %p) local_unnamed_addr #0 {
9  entry:
10    %conv.i = zext i16 %p to i32
11    %0 = tail call nnan ninf nsz <4 x float> @llvm.arm.mve.vminnm.m.v4f32.v4f32.v4f32.v4f32.i32(<4 x float> undef, <4 x float> %a, <4 x float> %b, i32 %conv.i) #2
12    %1 = tail call nnan ninf nsz <4 x float> @llvm.arm.mve.vminnm.m.v4f32.v4f32.v4f32.v4f32.i32(<4 x float> undef, <4 x float> %0, <4 x float> %0, i32 %conv.i) #2
13    %2 = tail call nnan ninf nsz <4 x float> @llvm.arm.mve.vminnm.m.v4f32.v4f32.v4f32.v4f32.i32(<4 x float> %inactive1, <4 x float> %1, <4 x float> %b, i32 %conv.i) #2
14    %3 = tail call nnan ninf nsz <4 x float> @llvm.arm.mve.vminnm.m.v4f32.v4f32.v4f32.v4f32.i32(<4 x float> %inactive2, <4 x float> %2, <4 x float> %b, i32 %conv.i) #2
15    ret <4 x float> %3
16  }
17
18  declare <4 x float> @llvm.arm.mve.vminnm.m.v4f32.v4f32.v4f32.v4f32.i32(<4 x float>, <4 x float>, <4 x float>, i32) #1
19
20  attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="preserve-sign" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="128" "frame-pointer"="none" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+hwdiv,+mve.fp,+ras,+thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" }
21  attributes #1 = { nounwind readnone }
22  attributes #2 = { nounwind }
23
24...
25---
26name:            vpt_block_4_ins
27alignment:       4
28exposesReturnsTwice: false
29legalized:       false
30regBankSelected: false
31selected:        false
32failedISel:      false
33tracksRegLiveness: true
34hasWinCFI:       false
35registers:       []
36liveins:
37  - { reg: '$q0', virtual-reg: '' }
38  - { reg: '$q1', virtual-reg: '' }
39  - { reg: '$q2', virtual-reg: '' }
40  - { reg: '$q3', virtual-reg: '' }
41  - { reg: '$r0', virtual-reg: '' }
42frameInfo:
43  isFrameAddressTaken: false
44  isReturnAddressTaken: false
45  hasStackMap:     false
46  hasPatchPoint:   false
47  stackSize:       0
48  offsetAdjustment: 0
49  maxAlignment:    0
50  adjustsStack:    false
51  hasCalls:        false
52  stackProtector:  ''
53  maxCallFrameSize: 0
54  cvBytesOfCalleeSavedRegisters: 0
55  hasOpaqueSPAdjustment: false
56  hasVAStart:      false
57  hasMustTailInVarArgFunc: false
58  localFrameSize:  0
59  savePoint:       ''
60  restorePoint:    ''
61fixedStack:      []
62stack:           []
63constants:       []
64body:             |
65  bb.0.entry:
66    liveins: $q0, $q1, $q2, $q3, $r0
67
68    ; CHECK-LABEL: name: vpt_block_4_ins
69    ; CHECK: liveins: $q0, $q1, $q2, $q3, $r0
70    ; CHECK: $vpr = VMSR_P0 killed $r0, 14 /* CC::al */, $noreg
71    ; CHECK: BUNDLE implicit-def dead $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit-def $q1, implicit-def $d2, implicit-def $s4, implicit-def $s5, implicit-def $d3, implicit-def $s6, implicit-def $s7, implicit killed $vpr, implicit killed $q2, implicit killed $q3, implicit killed $q0, implicit killed $q1 {
72    ; CHECK:   MVE_VPST 1, implicit $vpr
73    ; CHECK:   renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
74    ; CHECK:   renamable $q2 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, internal renamable $q2, 1, renamable $vpr, internal undef renamable $q2
75    ; CHECK:   renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
76    ; CHECK:   renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
77    ; CHECK: }
78    ; CHECK: $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
79    ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $q0
80    $vpr = VMSR_P0 killed $r0, 14, $noreg
81    renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, undef renamable $q2
82    renamable $q2 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q2, 1, renamable $vpr, undef renamable $q2
83    renamable $q0 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q2, renamable $q3, 1, renamable $vpr, killed renamable $q0
84    renamable $q1 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q0, killed renamable $q3, 1, killed renamable $vpr, killed renamable $q1
85    $q0 = MVE_VORR killed $q1, killed $q1, 0, $noreg, undef $q0
86    tBX_RET 14, $noreg, implicit $q0
87
88...
89