1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -run-pass arm-mve-vpt %s -o - | FileCheck %s 3 4--- | 5 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 6 target triple = "thumbv8.1m.main-arm-unknown-eabihf" 7 define dso_local <4 x i32> @foo(<4 x i32>* %src, <4 x i32>* %src2, <4 x i32>* %src3, <4 x i32>* %dest, <4 x i32>* %dest2, <4 x i32>* %dest3, <4 x float> %a1) local_unnamed_addr #0 { 8 entry: 9 %c = fcmp one <4 x float> %a1, zeroinitializer 10 %w = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %src, i32 4, <4 x i1> %c, <4 x i32> undef) 11 tail call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %w, <4 x i32>* %dest, i32 4, <4 x i1> %c) 12 %w2 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %src2, i32 4, <4 x i1> %c, <4 x i32> undef) 13 tail call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %w2, <4 x i32>* %dest2, i32 4, <4 x i1> %c) 14 %w3 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %src3, i32 4, <4 x i1> %c, <4 x i32> undef) 15 tail call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %w3, <4 x i32>* %dest3, i32 4, <4 x i1> %c) 16 ret <4 x i32> %w3 17 } 18 declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32 immarg, <4 x i1>, <4 x i32>) #2 19 declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32 immarg, <4 x i1>) #3 20 21 attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="128" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="false" "use-soft-float"="false" } 22 attributes #1 = { nounwind readnone } 23 attributes #2 = { argmemonly nounwind readonly willreturn } 24 attributes #3 = { argmemonly nounwind willreturn } 25 attributes #4 = { noduplicate nounwind } 26 attributes #5 = { nounwind } 27 28 !llvm.module.flags = !{!0, !1} 29 !llvm.ident = !{!2} 30 31 !0 = !{i32 1, !"wchar_size", i32 4} 32 !1 = !{i32 1, !"min_enum_size", i32 4} 33 !2 = !{!"clang version 10.0.0 (http://github.com/llvm/llvm-project 90450197deaf91160a22825e6746d998aad05704)"} 34 35... 36--- 37name: foo 38alignment: 2 39exposesReturnsTwice: false 40legalized: false 41regBankSelected: false 42selected: false 43failedISel: false 44tracksRegLiveness: true 45hasWinCFI: false 46registers: [] 47liveins: 48 - { reg: '$r0', virtual-reg: '' } 49 - { reg: '$r1', virtual-reg: '' } 50 - { reg: '$r2', virtual-reg: '' } 51 - { reg: '$q0', virtual-reg: '' } 52frameInfo: 53 isFrameAddressTaken: false 54 isReturnAddressTaken: false 55 hasStackMap: false 56 hasPatchPoint: false 57 stackSize: 8 58 offsetAdjustment: 0 59 maxAlignment: 4 60 adjustsStack: false 61 hasCalls: false 62 stackProtector: '' 63 maxCallFrameSize: 0 64 cvBytesOfCalleeSavedRegisters: 0 65 hasOpaqueSPAdjustment: false 66 hasVAStart: false 67 hasMustTailInVarArgFunc: false 68 localFrameSize: 0 69 savePoint: '' 70 restorePoint: '' 71fixedStack: 72 - { id: 0, type: default, offset: 12, size: 4, alignment: 4, stack-id: default, 73 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 74 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 75 - { id: 1, type: default, offset: 8, size: 4, alignment: 8, stack-id: default, 76 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 77 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 78 - { id: 2, type: default, offset: 4, size: 4, alignment: 4, stack-id: default, 79 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 80 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 81 - { id: 3, type: default, offset: 0, size: 4, alignment: 8, stack-id: default, 82 isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 83 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 84stack: 85 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 86 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 87 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 88 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 89 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 90 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 91callSites: [] 92constants: [] 93machineFunctionInfo: {} 94body: | 95 bb.0.entry: 96 liveins: $q0, $r0, $r1, $r2, $lr 97 98 99 ; CHECK-LABEL: name: foo 100 ; CHECK: liveins: $q0, $r0, $r1, $r2, $lr 101 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr 102 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 103 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 104 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 105 ; CHECK: $r7 = frame-setup tMOVr killed $sp, 14 /* CC::al */, $noreg 106 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_register $r7 107 ; CHECK: renamable $r12 = t2LDRi12 $r7, 16, 14 /* CC::al */, $noreg :: (load 4 from %fixed-stack.2) 108 ; CHECK: renamable $lr = t2LDRi12 $r7, 12, 14 /* CC::al */, $noreg :: (load 4 from %fixed-stack.1) 109 ; CHECK: renamable $r3 = t2LDRi12 $r7, 8, 14 /* CC::al */, $noreg :: (load 4 from %fixed-stack.0) 110 ; CHECK: BUNDLE implicit-def $vpr, implicit-def dead $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit $q0, implicit $zr, implicit killed $r0, implicit killed $r3, implicit killed $r1, implicit killed $lr { 111 ; CHECK: MVE_VPTv4f32r 1, renamable $q0, $zr, 10, implicit-def $vpr 112 ; CHECK: renamable $q0 = MVE_VLDRWU32 killed renamable $r0, 0, 1, internal renamable $vpr :: (load 16 from %ir.src, align 4) 113 ; CHECK: MVE_VSTRWU32 internal killed renamable $q0, killed renamable $r3, 0, 1, internal renamable $vpr :: (store 16 into %ir.dest, align 4) 114 ; CHECK: renamable $q0 = MVE_VLDRWU32 killed renamable $r1, 0, 1, internal renamable $vpr :: (load 16 from %ir.src2, align 4) 115 ; CHECK: MVE_VSTRWU32 internal killed renamable $q0, killed renamable $lr, 0, 1, internal renamable $vpr :: (store 16 into %ir.dest2, align 4) 116 ; CHECK: } 117 ; CHECK: BUNDLE implicit-def $q0, implicit-def $d0, implicit-def $s0, implicit-def $s1, implicit-def $d1, implicit-def $s2, implicit-def $s3, implicit killed $vpr, implicit killed $r2, implicit killed $r12 { 118 ; CHECK: MVE_VPST 4, implicit $vpr 119 ; CHECK: renamable $q0 = MVE_VLDRWU32 killed renamable $r2, 0, 1, renamable $vpr :: (load 16 from %ir.src3, align 4) 120 ; CHECK: MVE_VSTRWU32 internal renamable $q0, killed renamable $r12, 0, 1, killed renamable $vpr :: (store 16 into %ir.dest3, align 4) 121 ; CHECK: } 122 ; CHECK: $sp = t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc, implicit $q0 123 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr 124 frame-setup CFI_INSTRUCTION def_cfa_offset 8 125 frame-setup CFI_INSTRUCTION offset $lr, -4 126 frame-setup CFI_INSTRUCTION offset $r7, -8 127 $r7 = frame-setup tMOVr killed $sp, 14, $noreg 128 frame-setup CFI_INSTRUCTION def_cfa_register $r7 129 renamable $r12 = t2LDRi12 $r7, 16, 14, $noreg :: (load 4 from %fixed-stack.1) 130 renamable $lr = t2LDRi12 $r7, 12, 14, $noreg :: (load 4 from %fixed-stack.2) 131 renamable $r3 = t2LDRi12 $r7, 8, 14, $noreg :: (load 4 from %fixed-stack.3) 132 renamable $vpr = MVE_VCMPf32r renamable $q0, $zr, 10, 0, $noreg 133 renamable $q0 = MVE_VLDRWU32 killed renamable $r0, 0, 1, renamable $vpr :: (load 16 from %ir.src, align 4) 134 MVE_VSTRWU32 killed renamable $q0, killed renamable $r3, 0, 1, renamable $vpr :: (store 16 into %ir.dest, align 4) 135 renamable $q0 = MVE_VLDRWU32 killed renamable $r1, 0, 1, renamable $vpr :: (load 16 from %ir.src2, align 4) 136 MVE_VSTRWU32 killed renamable $q0, killed renamable $lr, 0, 1, renamable $vpr :: (store 16 into %ir.dest2, align 4) 137 renamable $q0 = MVE_VLDRWU32 killed renamable $r2, 0, 1, renamable $vpr :: (load 16 from %ir.src3, align 4) 138 MVE_VSTRWU32 renamable $q0, killed renamable $r12, 0, 1, killed renamable $vpr :: (store 16 into %ir.dest3, align 4) 139 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r7, def $pc, implicit $q0 140 141... 142