1; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
2
3; Function Attrs: norecurse nounwind readnone
4define i128 @remi128(i128 %a, i128 %b) {
5; CHECK-LABEL: remi128:
6; CHECK:       .LBB{{[0-9]+}}_2:
7; CHECK-NEXT:    lea %s4, __modti3@lo
8; CHECK-NEXT:    and %s4, %s4, (32)0
9; CHECK-NEXT:    lea.sl %s12, __modti3@hi(, %s4)
10; CHECK-NEXT:    bsic %s10, (, %s12)
11; CHECK-NEXT:    or %s11, 0, %s9
12  %r = srem i128 %a, %b
13  ret i128 %r
14}
15
16; Function Attrs: norecurse nounwind readnone
17define i64 @remi64(i64 %a, i64 %b) {
18; CHECK-LABEL: remi64:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    divs.l %s2, %s0, %s1
21; CHECK-NEXT:    muls.l %s1, %s2, %s1
22; CHECK-NEXT:    subs.l %s0, %s0, %s1
23; CHECK-NEXT:    b.l.t (, %s10)
24  %r = srem i64 %a, %b
25  ret i64 %r
26}
27
28; Function Attrs: norecurse nounwind readnone
29define signext i32 @remi32(i32 signext %a, i32 signext %b) {
30; CHECK-LABEL: remi32:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
33; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
34; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
35; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
36; CHECK-NEXT:    b.l.t (, %s10)
37  %r = srem i32 %a, %b
38  ret i32 %r
39}
40
41; Function Attrs: norecurse nounwind readnone
42define i128 @remu128(i128 %a, i128 %b) {
43; CHECK-LABEL: remu128:
44; CHECK:       .LBB{{[0-9]+}}_2:
45; CHECK-NEXT:    lea %s4, __umodti3@lo
46; CHECK-NEXT:    and %s4, %s4, (32)0
47; CHECK-NEXT:    lea.sl %s12, __umodti3@hi(, %s4)
48; CHECK-NEXT:    bsic %s10, (, %s12)
49; CHECK-NEXT:    or %s11, 0, %s9
50  %r = urem i128 %a, %b
51  ret i128 %r
52}
53
54; Function Attrs: norecurse nounwind readnone
55define i64 @remu64(i64 %a, i64 %b) {
56; CHECK-LABEL: remu64:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    divu.l %s2, %s0, %s1
59; CHECK-NEXT:    muls.l %s1, %s2, %s1
60; CHECK-NEXT:    subs.l %s0, %s0, %s1
61; CHECK-NEXT:    b.l.t (, %s10)
62  %r = urem i64 %a, %b
63  ret i64 %r
64}
65
66; Function Attrs: norecurse nounwind readnone
67define zeroext i32 @remu32(i32 zeroext %a, i32 zeroext %b) {
68; CHECK-LABEL: remu32:
69; CHECK:       # %bb.0:
70; CHECK-NEXT:    divu.w %s2, %s0, %s1
71; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
72; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
73; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
74; CHECK-NEXT:    b.l.t (, %s10)
75  %r = urem i32 %a, %b
76  ret i32 %r
77}
78
79; Function Attrs: norecurse nounwind readnone
80define signext i16 @remi16(i16 signext %a, i16 signext %b) {
81; CHECK-LABEL: remi16:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
84; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
85; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
86; CHECK-NEXT:    sll %s0, %s0, 48
87; CHECK-NEXT:    sra.l %s0, %s0, 48
88; CHECK-NEXT:    b.l.t (, %s10)
89  %a32 = sext i16 %a to i32
90  %b32 = sext i16 %b to i32
91  %r32 = srem i32 %a32, %b32
92  %r = trunc i32 %r32 to i16
93  ret i16 %r
94}
95
96; Function Attrs: norecurse nounwind readnone
97define zeroext i16 @remu16(i16 zeroext %a, i16 zeroext %b) {
98; CHECK-LABEL: remu16:
99; CHECK:       # %bb.0:
100; CHECK-NEXT:    divu.w %s2, %s0, %s1
101; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
102; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
103; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
104; CHECK-NEXT:    b.l.t (, %s10)
105  %r = urem i16 %a, %b
106  ret i16 %r
107}
108
109; Function Attrs: norecurse nounwind readnone
110define signext i8 @remi8(i8 signext %a, i8 signext %b) {
111; CHECK-LABEL: remi8:
112; CHECK:       # %bb.0:
113; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
114; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
115; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
116; CHECK-NEXT:    sll %s0, %s0, 56
117; CHECK-NEXT:    sra.l %s0, %s0, 56
118; CHECK-NEXT:    b.l.t (, %s10)
119  %a32 = sext i8 %a to i32
120  %b32 = sext i8 %b to i32
121  %r32 = srem i32 %a32, %b32
122  %r = trunc i32 %r32 to i8
123  ret i8 %r
124}
125
126; Function Attrs: norecurse nounwind readnone
127define zeroext i8 @remu8(i8 zeroext %a, i8 zeroext %b) {
128; CHECK-LABEL: remu8:
129; CHECK:       # %bb.0:
130; CHECK-NEXT:    divu.w %s2, %s0, %s1
131; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
132; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
133; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
134; CHECK-NEXT:    b.l.t (, %s10)
135  %r = urem i8 %a, %b
136  ret i8 %r
137}
138
139; Function Attrs: norecurse nounwind readnone
140define i128 @remi128ri(i128 %a) {
141; CHECK-LABEL: remi128ri:
142; CHECK:       .LBB{{[0-9]+}}_2:
143; CHECK-NEXT:    lea %s2, __modti3@lo
144; CHECK-NEXT:    and %s2, %s2, (32)0
145; CHECK-NEXT:    lea.sl %s12, __modti3@hi(, %s2)
146; CHECK-NEXT:    or %s2, 3, (0)1
147; CHECK-NEXT:    or %s3, 0, (0)1
148; CHECK-NEXT:    bsic %s10, (, %s12)
149; CHECK-NEXT:    or %s11, 0, %s9
150  %r = srem i128 %a, 3
151  ret i128 %r
152}
153
154; Function Attrs: norecurse nounwind readnone
155define i64 @remi64ri(i64 %a) {
156; CHECK-LABEL: remi64ri:
157; CHECK:       # %bb.0:
158; CHECK-NEXT:    divs.l %s1, %s0, (62)0
159; CHECK-NEXT:    muls.l %s1, 3, %s1
160; CHECK-NEXT:    subs.l %s0, %s0, %s1
161; CHECK-NEXT:    b.l.t (, %s10)
162  %r = srem i64 %a, 3
163  ret i64 %r
164}
165
166; Function Attrs: norecurse nounwind readnone
167define signext i32 @remi32ri(i32 signext %a) {
168; CHECK-LABEL: remi32ri:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    divs.w.sx %s1, %s0, (62)0
171; CHECK-NEXT:    muls.w.sx %s1, 3, %s1
172; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
173; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
174; CHECK-NEXT:    b.l.t (, %s10)
175  %r = srem i32 %a, 3
176  ret i32 %r
177}
178
179; Function Attrs: norecurse nounwind readnone
180define i128 @remu128ri(i128 %a) {
181; CHECK-LABEL: remu128ri:
182; CHECK:       .LBB{{[0-9]+}}_2:
183; CHECK-NEXT:    lea %s2, __umodti3@lo
184; CHECK-NEXT:    and %s2, %s2, (32)0
185; CHECK-NEXT:    lea.sl %s12, __umodti3@hi(, %s2)
186; CHECK-NEXT:    or %s2, 3, (0)1
187; CHECK-NEXT:    or %s3, 0, (0)1
188; CHECK-NEXT:    bsic %s10, (, %s12)
189; CHECK-NEXT:    or %s11, 0, %s9
190  %r = urem i128 %a, 3
191  ret i128 %r
192}
193
194; Function Attrs: norecurse nounwind readnone
195define i64 @remu64ri(i64 %a) {
196; CHECK-LABEL: remu64ri:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    divu.l %s1, %s0, (62)0
199; CHECK-NEXT:    muls.l %s1, 3, %s1
200; CHECK-NEXT:    subs.l %s0, %s0, %s1
201; CHECK-NEXT:    b.l.t (, %s10)
202  %r = urem i64 %a, 3
203  ret i64 %r
204}
205
206; Function Attrs: norecurse nounwind readnone
207define zeroext i32 @remu32ri(i32 zeroext %a) {
208; CHECK-LABEL: remu32ri:
209; CHECK:       # %bb.0:
210; CHECK-NEXT:    divu.w %s1, %s0, (62)0
211; CHECK-NEXT:    muls.w.sx %s1, 3, %s1
212; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
213; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
214; CHECK-NEXT:    b.l.t (, %s10)
215  %r = urem i32 %a, 3
216  ret i32 %r
217}
218
219; Function Attrs: norecurse nounwind readnone
220define i128 @remi128li(i128 %a) {
221; CHECK-LABEL: remi128li:
222; CHECK:       .LBB{{[0-9]+}}_2:
223; CHECK-NEXT:    or %s3, 0, %s1
224; CHECK-NEXT:    or %s2, 0, %s0
225; CHECK-NEXT:    lea %s0, __modti3@lo
226; CHECK-NEXT:    and %s0, %s0, (32)0
227; CHECK-NEXT:    lea.sl %s12, __modti3@hi(, %s0)
228; CHECK-NEXT:    or %s0, 3, (0)1
229; CHECK-NEXT:    or %s1, 0, (0)1
230; CHECK-NEXT:    bsic %s10, (, %s12)
231; CHECK-NEXT:    or %s11, 0, %s9
232  %r = srem i128 3, %a
233  ret i128 %r
234}
235
236; Function Attrs: norecurse nounwind readnone
237define i64 @remi64li(i64 %a, i64 %b) {
238; CHECK-LABEL: remi64li:
239; CHECK:       # %bb.0:
240; CHECK-NEXT:    divs.l %s0, 3, %s1
241; CHECK-NEXT:    muls.l %s0, %s0, %s1
242; CHECK-NEXT:    subs.l %s0, 3, %s0
243; CHECK-NEXT:    b.l.t (, %s10)
244  %r = srem i64 3, %b
245  ret i64 %r
246}
247
248; Function Attrs: norecurse nounwind readnone
249define signext i32 @remi32li(i32 signext %a, i32 signext %b) {
250; CHECK-LABEL: remi32li:
251; CHECK:       # %bb.0:
252; CHECK-NEXT:    divs.w.sx %s0, 3, %s1
253; CHECK-NEXT:    muls.w.sx %s0, %s0, %s1
254; CHECK-NEXT:    subs.w.sx %s0, 3, %s0
255; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
256; CHECK-NEXT:    b.l.t (, %s10)
257  %r = srem i32 3, %b
258  ret i32 %r
259}
260
261; Function Attrs: norecurse nounwind readnone
262define i128 @remu128li(i128) {
263; CHECK-LABEL: remu128li:
264; CHECK:       .LBB{{[0-9]+}}_2:
265; CHECK-NEXT:    or %s3, 0, %s1
266; CHECK-NEXT:    or %s2, 0, %s0
267; CHECK-NEXT:    lea %s0, __umodti3@lo
268; CHECK-NEXT:    and %s0, %s0, (32)0
269; CHECK-NEXT:    lea.sl %s12, __umodti3@hi(, %s0)
270; CHECK-NEXT:    or %s0, 3, (0)1
271; CHECK-NEXT:    or %s1, 0, (0)1
272; CHECK-NEXT:    bsic %s10, (, %s12)
273; CHECK-NEXT:    or %s11, 0, %s9
274  %2 = urem i128 3, %0
275  ret i128 %2
276}
277
278; Function Attrs: norecurse nounwind readnone
279define i64 @remu64li(i64 %a, i64 %b) {
280; CHECK-LABEL: remu64li:
281; CHECK:       # %bb.0:
282; CHECK-NEXT:    divu.l %s0, 3, %s1
283; CHECK-NEXT:    muls.l %s0, %s0, %s1
284; CHECK-NEXT:    subs.l %s0, 3, %s0
285; CHECK-NEXT:    b.l.t (, %s10)
286  %r = urem i64 3, %b
287  ret i64 %r
288}
289
290; Function Attrs: norecurse nounwind readnone
291define zeroext i32 @remu32li(i32 zeroext %a, i32 zeroext %b) {
292; CHECK-LABEL: remu32li:
293; CHECK:       # %bb.0:
294; CHECK-NEXT:    divu.w %s0, 3, %s1
295; CHECK-NEXT:    muls.w.sx %s0, %s0, %s1
296; CHECK-NEXT:    subs.w.sx %s0, 3, %s0
297; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
298; CHECK-NEXT:    b.l.t (, %s10)
299  %r = urem i32 3, %b
300  ret i32 %r
301}
302