1; RUN: llc < %s -mtriple=ve | FileCheck %s
2
3;;; Test ‘select’ instruction
4;;;
5;;; Syntax:
6;;;   <result> = select [fast-math flags] selty <cond>, <ty> <val1>, <ty> <val2>
7;;;                                             ; yields ty
8;;;
9;;;   selty is either i1 or {<N x i1>}
10;;;
11;;; Overview:
12;;;   The ‘select’ instruction is used to choose one value based on a condition,
13;;;   without IR-level branching.
14;;;
15;;; Arguments:
16;;;   The ‘select’ instruction requires an ‘i1’ value or a vector of ‘i1’ values
17;;;   indicating the condition, and two values of the same first class type.
18;;;
19;;;   The optional fast-math flags marker indicates that the select has one or
20;;;   more fast-math flags. These are optimization hints to enable otherwise
21;;;   unsafe floating-point optimizations. Fast-math flags are only valid for
22;;;   selects that return a floating-point scalar or vector type, or an array
23;;;   (nested to any depth) of floating-point scalar or vector types.
24;;;
25;;; Semantics:
26;;;   If the condition is an i1 and it evaluates to 1, the instruction returns
27;;;   the first value argument; otherwise, it returns the second value argument.
28;;;
29;;;   If the condition is a vector of i1, then the value arguments must be
30;;;   vectors of the same size, and the selection is done element by element.
31;;;
32;;;   If the condition is an i1 and the value arguments are vectors of the same
33;;;   size, then an entire vector is selected.
34;;;
35;;; Example:
36;;;   %X = select i1 true, i8 17, i8 42 ; yields i8:17
37;;;
38;;; Note:
39;;;   We test only i1/i8/u8/i16/u16/i32/u32/i64/u64/i128/u128/float/double/fp128
40
41; Function Attrs: norecurse nounwind readnone
42define zeroext i1 @select_i1_var(i1 zeroext %0, i1 zeroext %1, i1 zeroext %2) {
43; CHECK-LABEL: select_i1_var:
44; CHECK:       # %bb.0:
45; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
46; CHECK-NEXT:    adds.w.zx %s0, %s2, (0)1
47; CHECK-NEXT:    b.l.t (, %s10)
48  %4 = select i1 %0, i1 %1, i1 %2
49  ret i1 %4
50}
51
52; Function Attrs: norecurse nounwind readnone
53define signext i8 @select_i8_var(i1 zeroext %0, i8 signext %1, i8 signext %2) {
54; CHECK-LABEL: select_i8_var:
55; CHECK:       # %bb.0:
56; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
57; CHECK-NEXT:    adds.w.sx %s0, %s2, (0)1
58; CHECK-NEXT:    b.l.t (, %s10)
59  %4 = select i1 %0, i8 %1, i8 %2
60  ret i8 %4
61}
62
63; Function Attrs: norecurse nounwind readnone
64define zeroext i8 @select_u8_var(i1 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
65; CHECK-LABEL: select_u8_var:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
68; CHECK-NEXT:    adds.w.zx %s0, %s2, (0)1
69; CHECK-NEXT:    b.l.t (, %s10)
70  %4 = select i1 %0, i8 %1, i8 %2
71  ret i8 %4
72}
73
74; Function Attrs: norecurse nounwind readnone
75define signext i16 @select_i16_var(i1 zeroext %0, i16 signext %1, i16 signext %2) {
76; CHECK-LABEL: select_i16_var:
77; CHECK:       # %bb.0:
78; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
79; CHECK-NEXT:    adds.w.sx %s0, %s2, (0)1
80; CHECK-NEXT:    b.l.t (, %s10)
81  %4 = select i1 %0, i16 %1, i16 %2
82  ret i16 %4
83}
84
85; Function Attrs: norecurse nounwind readnone
86define zeroext i16 @select_u16_var(i1 zeroext %0, i16 zeroext %1, i16 zeroext %2) {
87; CHECK-LABEL: select_u16_var:
88; CHECK:       # %bb.0:
89; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
90; CHECK-NEXT:    adds.w.zx %s0, %s2, (0)1
91; CHECK-NEXT:    b.l.t (, %s10)
92  %4 = select i1 %0, i16 %1, i16 %2
93  ret i16 %4
94}
95
96; Function Attrs: norecurse nounwind readnone
97define signext i32 @select_i32_var(i1 zeroext %0, i32 signext %1, i32 signext %2) {
98; CHECK-LABEL: select_i32_var:
99; CHECK:       # %bb.0:
100; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
101; CHECK-NEXT:    adds.w.sx %s0, %s2, (0)1
102; CHECK-NEXT:    b.l.t (, %s10)
103  %4 = select i1 %0, i32 %1, i32 %2
104  ret i32 %4
105}
106
107; Function Attrs: norecurse nounwind readnone
108define zeroext i32 @select_u32_var(i1 zeroext %0, i32 zeroext %1, i32 zeroext %2) {
109; CHECK-LABEL: select_u32_var:
110; CHECK:       # %bb.0:
111; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
112; CHECK-NEXT:    adds.w.zx %s0, %s2, (0)1
113; CHECK-NEXT:    b.l.t (, %s10)
114  %4 = select i1 %0, i32 %1, i32 %2
115  ret i32 %4
116}
117
118; Function Attrs: norecurse nounwind readnone
119define i64 @select_i64_var(i1 zeroext %0, i64 %1, i64 %2) {
120; CHECK-LABEL: select_i64_var:
121; CHECK:       # %bb.0:
122; CHECK-NEXT:    and %s0, %s0, (32)0
123; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
124; CHECK-NEXT:    or %s0, 0, %s2
125; CHECK-NEXT:    b.l.t (, %s10)
126  %4 = select i1 %0, i64 %1, i64 %2
127  ret i64 %4
128}
129
130; Function Attrs: norecurse nounwind readnone
131define i64 @select_u64_var(i1 zeroext %0, i64 %1, i64 %2) {
132; CHECK-LABEL: select_u64_var:
133; CHECK:       # %bb.0:
134; CHECK-NEXT:    and %s0, %s0, (32)0
135; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
136; CHECK-NEXT:    or %s0, 0, %s2
137; CHECK-NEXT:    b.l.t (, %s10)
138  %4 = select i1 %0, i64 %1, i64 %2
139  ret i64 %4
140}
141
142; Function Attrs: norecurse nounwind readnone
143define i128 @select_i128_var(i1 zeroext %0, i128 %1, i128 %2) {
144; CHECK-LABEL: select_i128_var:
145; CHECK:       # %bb.0:
146; CHECK-NEXT:    and %s0, %s0, (32)0
147; CHECK-NEXT:    cmov.w.ne %s3, %s1, %s0
148; CHECK-NEXT:    cmov.w.ne %s4, %s2, %s0
149; CHECK-NEXT:    or %s0, 0, %s3
150; CHECK-NEXT:    or %s1, 0, %s4
151; CHECK-NEXT:    b.l.t (, %s10)
152  %4 = select i1 %0, i128 %1, i128 %2
153  ret i128 %4
154}
155
156; Function Attrs: norecurse nounwind readnone
157define i128 @select_u128_var(i1 zeroext %0, i128 %1, i128 %2) {
158; CHECK-LABEL: select_u128_var:
159; CHECK:       # %bb.0:
160; CHECK-NEXT:    and %s0, %s0, (32)0
161; CHECK-NEXT:    cmov.w.ne %s3, %s1, %s0
162; CHECK-NEXT:    cmov.w.ne %s4, %s2, %s0
163; CHECK-NEXT:    or %s0, 0, %s3
164; CHECK-NEXT:    or %s1, 0, %s4
165; CHECK-NEXT:    b.l.t (, %s10)
166  %4 = select i1 %0, i128 %1, i128 %2
167  ret i128 %4
168}
169
170; Function Attrs: norecurse nounwind readnone
171define float @select_float_var(i1 zeroext %0, float %1, float %2) {
172; CHECK-LABEL: select_float_var:
173; CHECK:       # %bb.0:
174; CHECK-NEXT:    and %s0, %s0, (32)0
175; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
176; CHECK-NEXT:    or %s0, 0, %s2
177; CHECK-NEXT:    b.l.t (, %s10)
178  %4 = select fast i1 %0, float %1, float %2
179  ret float %4
180}
181
182; Function Attrs: norecurse nounwind readnone
183define double @select_double_var(i1 zeroext %0, double %1, double %2) {
184; CHECK-LABEL: select_double_var:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    and %s0, %s0, (32)0
187; CHECK-NEXT:    cmov.w.ne %s2, %s1, %s0
188; CHECK-NEXT:    or %s0, 0, %s2
189; CHECK-NEXT:    b.l.t (, %s10)
190  %4 = select fast i1 %0, double %1, double %2
191  ret double %4
192}
193
194; Function Attrs: norecurse nounwind readnone
195define fp128 @select_quad_var(i1 zeroext %0, fp128 %1, fp128 %2) {
196; CHECK-LABEL: select_quad_var:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    and %s0, %s0, (32)0
199; CHECK-NEXT:    cmov.w.ne %s4, %s2, %s0
200; CHECK-NEXT:    cmov.w.ne %s5, %s3, %s0
201; CHECK-NEXT:    or %s0, 0, %s4
202; CHECK-NEXT:    or %s1, 0, %s5
203; CHECK-NEXT:    b.l.t (, %s10)
204  %4 = select fast i1 %0, fp128 %1, fp128 %2
205  ret fp128 %4
206}
207
208; Function Attrs: norecurse nounwind readnone
209define zeroext i1 @select_i1_mimm(i1 zeroext %0, i1 zeroext %1) {
210; CHECK-LABEL: select_i1_mimm:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    or %s0, %s0, %s1
213; CHECK-NEXT:    b.l.t (, %s10)
214  %3 = or i1 %0, %1
215  ret i1 %3
216}
217
218; Function Attrs: norecurse nounwind readnone
219define signext i8 @select_i8_mimm(i1 zeroext %0, i8 signext %1) {
220; CHECK-LABEL: select_i8_mimm:
221; CHECK:       # %bb.0:
222; CHECK-NEXT:    cmov.w.ne %s1, (57)1, %s0
223; CHECK-NEXT:    adds.w.sx %s0, %s1, (0)1
224; CHECK-NEXT:    b.l.t (, %s10)
225  %3 = select i1 %0, i8 -128, i8 %1
226  ret i8 %3
227}
228
229; Function Attrs: norecurse nounwind readnone
230define zeroext i8 @select_u8_mimm(i1 zeroext %0, i8 zeroext %1) {
231; CHECK-LABEL: select_u8_mimm:
232; CHECK:       # %bb.0:
233; CHECK-NEXT:    cmov.w.ne %s1, (57)0, %s0
234; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
235; CHECK-NEXT:    b.l.t (, %s10)
236  %3 = select i1 %0, i8 127, i8 %1
237  ret i8 %3
238}
239
240; Function Attrs: norecurse nounwind readnone
241define signext i16 @select_i16_mimm(i1 zeroext %0, i16 signext %1) {
242; CHECK-LABEL: select_i16_mimm:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    cmov.w.ne %s1, (49)1, %s0
245; CHECK-NEXT:    adds.w.sx %s0, %s1, (0)1
246; CHECK-NEXT:    b.l.t (, %s10)
247  %3 = select i1 %0, i16 -32768, i16 %1
248  ret i16 %3
249}
250
251; Function Attrs: norecurse nounwind readnone
252define zeroext i16 @select_u16_mimm(i1 zeroext %0, i16 zeroext %1) {
253; CHECK-LABEL: select_u16_mimm:
254; CHECK:       # %bb.0:
255; CHECK-NEXT:    cmov.w.ne %s1, (49)0, %s0
256; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
257; CHECK-NEXT:    b.l.t (, %s10)
258  %3 = select i1 %0, i16 32767, i16 %1
259  ret i16 %3
260}
261
262; Function Attrs: norecurse nounwind readnone
263define signext i32 @select_i32_mimm(i1 zeroext %0, i32 signext %1) {
264; CHECK-LABEL: select_i32_mimm:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    cmov.w.ne %s1, (48)0, %s0
267; CHECK-NEXT:    adds.w.sx %s0, %s1, (0)1
268; CHECK-NEXT:    b.l.t (, %s10)
269  %3 = select i1 %0, i32 65535, i32 %1
270  ret i32 %3
271}
272
273; Function Attrs: norecurse nounwind readnone
274define zeroext i32 @select_u32_mimm(i1 zeroext %0, i32 zeroext %1) {
275; CHECK-LABEL: select_u32_mimm:
276; CHECK:       # %bb.0:
277; CHECK-NEXT:    cmov.w.ne %s1, (48)0, %s0
278; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
279; CHECK-NEXT:    b.l.t (, %s10)
280  %3 = select i1 %0, i32 65535, i32 %1
281  ret i32 %3
282}
283
284; Function Attrs: norecurse nounwind readnone
285define i64 @select_i64_mimm(i1 zeroext %0, i64 %1) {
286; CHECK-LABEL: select_i64_mimm:
287; CHECK:       # %bb.0:
288; CHECK-NEXT:    and %s0, %s0, (32)0
289; CHECK-NEXT:    cmov.w.ne %s1, (48)0, %s0
290; CHECK-NEXT:    or %s0, 0, %s1
291; CHECK-NEXT:    b.l.t (, %s10)
292  %3 = select i1 %0, i64 65535, i64 %1
293  ret i64 %3
294}
295
296; Function Attrs: norecurse nounwind readnone
297define i64 @select_u64_mimm(i1 zeroext %0, i64 %1) {
298; CHECK-LABEL: select_u64_mimm:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    and %s0, %s0, (32)0
301; CHECK-NEXT:    cmov.w.ne %s1, (48)0, %s0
302; CHECK-NEXT:    or %s0, 0, %s1
303; CHECK-NEXT:    b.l.t (, %s10)
304  %3 = select i1 %0, i64 65535, i64 %1
305  ret i64 %3
306}
307
308; Function Attrs: norecurse nounwind readnone
309define i128 @select_i128_mimm(i1 zeroext %0, i128 %1) {
310; CHECK-LABEL: select_i128_mimm:
311; CHECK:       # %bb.0:
312; CHECK-NEXT:    and %s0, %s0, (32)0
313; CHECK-NEXT:    cmov.w.ne %s1, (48)0, %s0
314; CHECK-NEXT:    cmov.w.ne %s2, (0)1, %s0
315; CHECK-NEXT:    or %s0, 0, %s1
316; CHECK-NEXT:    or %s1, 0, %s2
317; CHECK-NEXT:    b.l.t (, %s10)
318  %3 = select i1 %0, i128 65535, i128 %1
319  ret i128 %3
320}
321
322; Function Attrs: norecurse nounwind readnone
323define i128 @select_u128_mimm(i1 zeroext %0, i128 %1) {
324; CHECK-LABEL: select_u128_mimm:
325; CHECK:       # %bb.0:
326; CHECK-NEXT:    and %s0, %s0, (32)0
327; CHECK-NEXT:    cmov.w.ne %s1, (48)0, %s0
328; CHECK-NEXT:    cmov.w.ne %s2, (0)1, %s0
329; CHECK-NEXT:    or %s0, 0, %s1
330; CHECK-NEXT:    or %s1, 0, %s2
331; CHECK-NEXT:    b.l.t (, %s10)
332  %3 = select i1 %0, i128 65535, i128 %1
333  ret i128 %3
334}
335
336; Function Attrs: norecurse nounwind readnone
337define float @select_float_mimm(i1 zeroext %0, float %1) {
338; CHECK-LABEL: select_float_mimm:
339; CHECK:       # %bb.0:
340; CHECK-NEXT:    and %s0, %s0, (32)0
341; CHECK-NEXT:    cmov.w.ne %s1, (2)1, %s0
342; CHECK-NEXT:    or %s0, 0, %s1
343; CHECK-NEXT:    b.l.t (, %s10)
344  %3 = select i1 %0, float -2.000000e+00, float %1
345  ret float %3
346}
347
348; Function Attrs: norecurse nounwind readnone
349define double @select_double_mimm(i1 zeroext %0, double %1) {
350; CHECK-LABEL: select_double_mimm:
351; CHECK:       # %bb.0:
352; CHECK-NEXT:    and %s0, %s0, (32)0
353; CHECK-NEXT:    cmov.w.ne %s1, (2)1, %s0
354; CHECK-NEXT:    or %s0, 0, %s1
355; CHECK-NEXT:    b.l.t (, %s10)
356  %3 = select fast i1 %0, double -2.000000e+00, double %1
357  ret double %3
358}
359
360; Function Attrs: norecurse nounwind readnone
361define fp128 @select_quad_mimm(i1 zeroext %0, fp128 %1) {
362; CHECK-LABEL: select_quad_mimm:
363; CHECK:       # %bb.0:
364; CHECK-NEXT:    lea %s1, .LCPI{{[0-9]+}}_0@lo
365; CHECK-NEXT:    and %s1, %s1, (32)0
366; CHECK-NEXT:    lea.sl %s1, .LCPI{{[0-9]+}}_0@hi(, %s1)
367; CHECK-NEXT:    ld %s4, 8(, %s1)
368; CHECK-NEXT:    ld %s5, (, %s1)
369; CHECK-NEXT:    and %s0, %s0, (32)0
370; CHECK-NEXT:    cmov.w.ne %s2, %s4, %s0
371; CHECK-NEXT:    cmov.w.ne %s3, %s5, %s0
372; CHECK-NEXT:    or %s0, 0, %s2
373; CHECK-NEXT:    or %s1, 0, %s3
374; CHECK-NEXT:    b.l.t (, %s10)
375  %3 = select fast i1 %0, fp128 0xL0000000000000000C000000000000000, fp128 %1
376  ret fp128 %3
377}
378
379; Function Attrs: norecurse nounwind readnone
380define zeroext i1 @select_mimm_i1(i1 zeroext %0, i1 zeroext %1) {
381; CHECK-LABEL: select_mimm_i1:
382; CHECK:       # %bb.0:
383; CHECK-NEXT:    xor %s0, 1, %s0
384; CHECK-NEXT:    or %s0, %s0, %s1
385; CHECK-NEXT:    b.l.t (, %s10)
386  %3 = xor i1 %0, true
387  %4 = or i1 %3, %1
388  ret i1 %4
389}
390
391; Function Attrs: norecurse nounwind readnone
392define signext i8 @select_mimm_i8(i1 zeroext %0, i8 signext %1) {
393; CHECK-LABEL: select_mimm_i8:
394; CHECK:       # %bb.0:
395; CHECK-NEXT:    cmov.w.eq %s1, (57)1, %s0
396; CHECK-NEXT:    adds.w.sx %s0, %s1, (0)1
397; CHECK-NEXT:    b.l.t (, %s10)
398  %3 = select i1 %0, i8 %1, i8 -128
399  ret i8 %3
400}
401
402; Function Attrs: norecurse nounwind readnone
403define zeroext i8 @select_mimm_u8(i1 zeroext %0, i8 zeroext %1) {
404; CHECK-LABEL: select_mimm_u8:
405; CHECK:       # %bb.0:
406; CHECK-NEXT:    cmov.w.eq %s1, (57)0, %s0
407; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
408; CHECK-NEXT:    b.l.t (, %s10)
409  %3 = select i1 %0, i8 %1, i8 127
410  ret i8 %3
411}
412
413; Function Attrs: norecurse nounwind readnone
414define signext i16 @select_mimm_i16(i1 zeroext %0, i16 signext %1) {
415; CHECK-LABEL: select_mimm_i16:
416; CHECK:       # %bb.0:
417; CHECK-NEXT:    cmov.w.eq %s1, (49)1, %s0
418; CHECK-NEXT:    adds.w.sx %s0, %s1, (0)1
419; CHECK-NEXT:    b.l.t (, %s10)
420  %3 = select i1 %0, i16 %1, i16 -32768
421  ret i16 %3
422}
423
424; Function Attrs: norecurse nounwind readnone
425define zeroext i16 @select_mimm_u16(i1 zeroext %0, i16 zeroext %1) {
426; CHECK-LABEL: select_mimm_u16:
427; CHECK:       # %bb.0:
428; CHECK-NEXT:    cmov.w.eq %s1, (49)0, %s0
429; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
430; CHECK-NEXT:    b.l.t (, %s10)
431  %3 = select i1 %0, i16 %1, i16 32767
432  ret i16 %3
433}
434
435; Function Attrs: norecurse nounwind readnone
436define signext i32 @select_mimm_i32(i1 zeroext %0, i32 signext %1) {
437; CHECK-LABEL: select_mimm_i32:
438; CHECK:       # %bb.0:
439; CHECK-NEXT:    cmov.w.eq %s1, (48)0, %s0
440; CHECK-NEXT:    adds.w.sx %s0, %s1, (0)1
441; CHECK-NEXT:    b.l.t (, %s10)
442  %3 = select i1 %0, i32 %1, i32 65535
443  ret i32 %3
444}
445
446; Function Attrs: norecurse nounwind readnone
447define zeroext i32 @select_mimm_u32(i1 zeroext %0, i32 zeroext %1) {
448; CHECK-LABEL: select_mimm_u32:
449; CHECK:       # %bb.0:
450; CHECK-NEXT:    cmov.w.eq %s1, (48)0, %s0
451; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
452; CHECK-NEXT:    b.l.t (, %s10)
453  %3 = select i1 %0, i32 %1, i32 65535
454  ret i32 %3
455}
456
457; Function Attrs: norecurse nounwind readnone
458define i64 @select_mimm_i64(i1 zeroext %0, i64 %1) {
459; CHECK-LABEL: select_mimm_i64:
460; CHECK:       # %bb.0:
461; CHECK-NEXT:    and %s0, %s0, (32)0
462; CHECK-NEXT:    cmov.w.eq %s1, (48)0, %s0
463; CHECK-NEXT:    or %s0, 0, %s1
464; CHECK-NEXT:    b.l.t (, %s10)
465  %3 = select i1 %0, i64 %1, i64 65535
466  ret i64 %3
467}
468
469; Function Attrs: norecurse nounwind readnone
470define i64 @select_mimm_u64(i1 zeroext %0, i64 %1) {
471; CHECK-LABEL: select_mimm_u64:
472; CHECK:       # %bb.0:
473; CHECK-NEXT:    and %s0, %s0, (32)0
474; CHECK-NEXT:    cmov.w.eq %s1, (48)0, %s0
475; CHECK-NEXT:    or %s0, 0, %s1
476; CHECK-NEXT:    b.l.t (, %s10)
477  %3 = select i1 %0, i64 %1, i64 65535
478  ret i64 %3
479}
480
481; Function Attrs: norecurse nounwind readnone
482define i128 @select_mimm_i128(i1 zeroext %0, i128 %1) {
483; CHECK-LABEL: select_mimm_i128:
484; CHECK:       # %bb.0:
485; CHECK-NEXT:    and %s0, %s0, (32)0
486; CHECK-NEXT:    cmov.w.eq %s1, (48)0, %s0
487; CHECK-NEXT:    cmov.w.eq %s2, (0)1, %s0
488; CHECK-NEXT:    or %s0, 0, %s1
489; CHECK-NEXT:    or %s1, 0, %s2
490; CHECK-NEXT:    b.l.t (, %s10)
491  %3 = select i1 %0, i128 %1, i128 65535
492  ret i128 %3
493}
494
495; Function Attrs: norecurse nounwind readnone
496define i128 @select_mimm_u128(i1 zeroext %0, i128 %1) {
497; CHECK-LABEL: select_mimm_u128:
498; CHECK:       # %bb.0:
499; CHECK-NEXT:    and %s0, %s0, (32)0
500; CHECK-NEXT:    cmov.w.eq %s1, (48)0, %s0
501; CHECK-NEXT:    cmov.w.eq %s2, (0)1, %s0
502; CHECK-NEXT:    or %s0, 0, %s1
503; CHECK-NEXT:    or %s1, 0, %s2
504; CHECK-NEXT:    b.l.t (, %s10)
505  %3 = select i1 %0, i128 %1, i128 65535
506  ret i128 %3
507}
508
509; Function Attrs: norecurse nounwind readnone
510define float @select_mimm_float(i1 zeroext %0, float %1) {
511; CHECK-LABEL: select_mimm_float:
512; CHECK:       # %bb.0:
513; CHECK-NEXT:    and %s0, %s0, (32)0
514; CHECK-NEXT:    cmov.w.eq %s1, (2)1, %s0
515; CHECK-NEXT:    or %s0, 0, %s1
516; CHECK-NEXT:    b.l.t (, %s10)
517  %3 = select i1 %0, float %1, float -2.000000e+00
518  ret float %3
519}
520
521; Function Attrs: norecurse nounwind readnone
522define double @select_mimm_double(i1 zeroext %0, double %1) {
523; CHECK-LABEL: select_mimm_double:
524; CHECK:       # %bb.0:
525; CHECK-NEXT:    and %s0, %s0, (32)0
526; CHECK-NEXT:    cmov.w.eq %s1, (2)1, %s0
527; CHECK-NEXT:    or %s0, 0, %s1
528; CHECK-NEXT:    b.l.t (, %s10)
529  %3 = select fast i1 %0, double %1, double -2.000000e+00
530  ret double %3
531}
532
533; Function Attrs: norecurse nounwind readnone
534define fp128 @select_mimm_quad(i1 zeroext %0, fp128 %1) {
535; CHECK-LABEL: select_mimm_quad:
536; CHECK:       # %bb.0:
537; CHECK-NEXT:    lea %s1, .LCPI{{[0-9]+}}_0@lo
538; CHECK-NEXT:    and %s1, %s1, (32)0
539; CHECK-NEXT:    lea.sl %s1, .LCPI{{[0-9]+}}_0@hi(, %s1)
540; CHECK-NEXT:    ld %s4, 8(, %s1)
541; CHECK-NEXT:    ld %s5, (, %s1)
542; CHECK-NEXT:    and %s0, %s0, (32)0
543; CHECK-NEXT:    cmov.w.ne %s4, %s2, %s0
544; CHECK-NEXT:    cmov.w.ne %s5, %s3, %s0
545; CHECK-NEXT:    or %s0, 0, %s4
546; CHECK-NEXT:    or %s1, 0, %s5
547; CHECK-NEXT:    b.l.t (, %s10)
548  %3 = select fast i1 %0, fp128 %1, fp128 0xL0000000000000000C000000000000000
549  ret fp128 %3
550}
551