1; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
2
3define zeroext i1 @setccaf(float, float) {
4; CHECK-LABEL: setccaf:
5; CHECK:       # %bb.0:
6; CHECK-NEXT:    or %s0, 0, (0)1
7; CHECK-NEXT:    b.l.t (, %s10)
8  %3 = fcmp false float %0, %1
9  ret i1 %3
10}
11
12define zeroext i1 @setccat(float, float) {
13; CHECK-LABEL: setccat:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    or %s0, 1, (0)1
16; CHECK-NEXT:    b.l.t (, %s10)
17  %3 = fcmp true float %0, %1
18  ret i1 %3
19}
20
21define zeroext i1 @setccoeq(float, float) {
22; CHECK-LABEL: setccoeq:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
25; CHECK-NEXT:    or %s1, 0, (0)1
26; CHECK-NEXT:    cmov.s.eq %s1, (63)0, %s0
27; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
28; CHECK-NEXT:    b.l.t (, %s10)
29  %3 = fcmp oeq float %0, %1
30  ret i1 %3
31}
32
33define zeroext i1 @setccone(float, float) {
34; CHECK-LABEL: setccone:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
37; CHECK-NEXT:    or %s1, 0, (0)1
38; CHECK-NEXT:    cmov.s.ne %s1, (63)0, %s0
39; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
40; CHECK-NEXT:    b.l.t (, %s10)
41  %3 = fcmp one float %0, %1
42  ret i1 %3
43}
44
45define zeroext i1 @setccogt(float, float) {
46; CHECK-LABEL: setccogt:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
49; CHECK-NEXT:    or %s1, 0, (0)1
50; CHECK-NEXT:    cmov.s.gt %s1, (63)0, %s0
51; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
52; CHECK-NEXT:    b.l.t (, %s10)
53  %3 = fcmp ogt float %0, %1
54  ret i1 %3
55}
56
57define zeroext i1 @setccoge(float, float) {
58; CHECK-LABEL: setccoge:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
61; CHECK-NEXT:    or %s1, 0, (0)1
62; CHECK-NEXT:    cmov.s.ge %s1, (63)0, %s0
63; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
64; CHECK-NEXT:    b.l.t (, %s10)
65  %3 = fcmp oge float %0, %1
66  ret i1 %3
67}
68
69define zeroext i1 @setccolt(float, float) {
70; CHECK-LABEL: setccolt:
71; CHECK:       # %bb.0:
72; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
73; CHECK-NEXT:    or %s1, 0, (0)1
74; CHECK-NEXT:    cmov.s.lt %s1, (63)0, %s0
75; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
76; CHECK-NEXT:    b.l.t (, %s10)
77  %3 = fcmp olt float %0, %1
78  ret i1 %3
79}
80
81define zeroext i1 @setccole(float, float) {
82; CHECK-LABEL: setccole:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
85; CHECK-NEXT:    or %s1, 0, (0)1
86; CHECK-NEXT:    cmov.s.le %s1, (63)0, %s0
87; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
88; CHECK-NEXT:    b.l.t (, %s10)
89  %3 = fcmp ole float %0, %1
90  ret i1 %3
91}
92
93define zeroext i1 @setccord(float, float) {
94; CHECK-LABEL: setccord:
95; CHECK:       # %bb.0:
96; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
97; CHECK-NEXT:    or %s1, 0, (0)1
98; CHECK-NEXT:    cmov.s.num %s1, (63)0, %s0
99; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
100; CHECK-NEXT:    b.l.t (, %s10)
101  %3 = fcmp ord float %0, %1
102  ret i1 %3
103}
104
105define zeroext i1 @setccuno(float, float) {
106; CHECK-LABEL: setccuno:
107; CHECK:       # %bb.0:
108; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
109; CHECK-NEXT:    or %s1, 0, (0)1
110; CHECK-NEXT:    cmov.s.nan %s1, (63)0, %s0
111; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
112; CHECK-NEXT:    b.l.t (, %s10)
113  %3 = fcmp uno float %0, %1
114  ret i1 %3
115}
116
117define zeroext i1 @setccueq(float, float) {
118; CHECK-LABEL: setccueq:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
121; CHECK-NEXT:    or %s1, 0, (0)1
122; CHECK-NEXT:    cmov.s.eqnan %s1, (63)0, %s0
123; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
124; CHECK-NEXT:    b.l.t (, %s10)
125  %3 = fcmp ueq float %0, %1
126  ret i1 %3
127}
128
129define zeroext i1 @setccune(float, float) {
130; CHECK-LABEL: setccune:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
133; CHECK-NEXT:    or %s1, 0, (0)1
134; CHECK-NEXT:    cmov.s.nenan %s1, (63)0, %s0
135; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
136; CHECK-NEXT:    b.l.t (, %s10)
137  %3 = fcmp une float %0, %1
138  ret i1 %3
139}
140
141define zeroext i1 @setccugt(float, float) {
142; CHECK-LABEL: setccugt:
143; CHECK:       # %bb.0:
144; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
145; CHECK-NEXT:    or %s1, 0, (0)1
146; CHECK-NEXT:    cmov.s.gtnan %s1, (63)0, %s0
147; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
148; CHECK-NEXT:    b.l.t (, %s10)
149  %3 = fcmp ugt float %0, %1
150  ret i1 %3
151}
152
153define zeroext i1 @setccuge(float, float) {
154; CHECK-LABEL: setccuge:
155; CHECK:       # %bb.0:
156; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
157; CHECK-NEXT:    or %s1, 0, (0)1
158; CHECK-NEXT:    cmov.s.genan %s1, (63)0, %s0
159; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
160; CHECK-NEXT:    b.l.t (, %s10)
161  %3 = fcmp uge float %0, %1
162  ret i1 %3
163}
164
165define zeroext i1 @setccult(float, float) {
166; CHECK-LABEL: setccult:
167; CHECK:       # %bb.0:
168; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
169; CHECK-NEXT:    or %s1, 0, (0)1
170; CHECK-NEXT:    cmov.s.ltnan %s1, (63)0, %s0
171; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
172; CHECK-NEXT:    b.l.t (, %s10)
173  %3 = fcmp ult float %0, %1
174  ret i1 %3
175}
176
177define zeroext i1 @setccule(float, float) {
178; CHECK-LABEL: setccule:
179; CHECK:       # %bb.0:
180; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
181; CHECK-NEXT:    or %s1, 0, (0)1
182; CHECK-NEXT:    cmov.s.lenan %s1, (63)0, %s0
183; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
184; CHECK-NEXT:    b.l.t (, %s10)
185  %3 = fcmp ule float %0, %1
186  ret i1 %3
187}
188