1; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
2
3define zeroext i1 @setccaf(float, float) {
4; CHECK-LABEL: setccaf:
5; CHECK:       # %bb.0:
6; CHECK-NEXT:    or %s0, 0, (0)1
7; CHECK-NEXT:    b.l.t (, %s10)
8  %3 = fcmp false float %0, 0.0
9  ret i1 %3
10}
11
12define zeroext i1 @setccat(float, float) {
13; CHECK-LABEL: setccat:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    or %s0, 1, (0)1
16; CHECK-NEXT:    b.l.t (, %s10)
17  %3 = fcmp true float %0, 0.0
18  ret i1 %3
19}
20
21define zeroext i1 @setccoeq(float, float) {
22; CHECK-LABEL: setccoeq:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    lea.sl %s1, 0
25; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
26; CHECK-NEXT:    or %s1, 0, (0)1
27; CHECK-NEXT:    cmov.s.eq %s1, (63)0, %s0
28; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
29; CHECK-NEXT:    b.l.t (, %s10)
30  %3 = fcmp oeq float %0, 0.0
31  ret i1 %3
32}
33
34define zeroext i1 @setccone(float, float) {
35; CHECK-LABEL: setccone:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    lea.sl %s1, 0
38; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
39; CHECK-NEXT:    or %s1, 0, (0)1
40; CHECK-NEXT:    cmov.s.ne %s1, (63)0, %s0
41; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
42; CHECK-NEXT:    b.l.t (, %s10)
43  %3 = fcmp one float %0, 0.0
44  ret i1 %3
45}
46
47define zeroext i1 @setccogt(float, float) {
48; CHECK-LABEL: setccogt:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    lea.sl %s1, 0
51; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
52; CHECK-NEXT:    or %s1, 0, (0)1
53; CHECK-NEXT:    cmov.s.gt %s1, (63)0, %s0
54; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
55; CHECK-NEXT:    b.l.t (, %s10)
56  %3 = fcmp ogt float %0, 0.0
57  ret i1 %3
58}
59
60define zeroext i1 @setccoge(float, float) {
61; CHECK-LABEL: setccoge:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    lea.sl %s1, 0
64; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
65; CHECK-NEXT:    or %s1, 0, (0)1
66; CHECK-NEXT:    cmov.s.ge %s1, (63)0, %s0
67; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
68; CHECK-NEXT:    b.l.t (, %s10)
69  %3 = fcmp oge float %0, 0.0
70  ret i1 %3
71}
72
73define zeroext i1 @setccolt(float, float) {
74; CHECK-LABEL: setccolt:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    lea.sl %s1, 0
77; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
78; CHECK-NEXT:    or %s1, 0, (0)1
79; CHECK-NEXT:    cmov.s.lt %s1, (63)0, %s0
80; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
81; CHECK-NEXT:    b.l.t (, %s10)
82  %3 = fcmp olt float %0, 0.0
83  ret i1 %3
84}
85
86define zeroext i1 @setccole(float, float) {
87; CHECK-LABEL: setccole:
88; CHECK:       # %bb.0:
89; CHECK-NEXT:    lea.sl %s1, 0
90; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
91; CHECK-NEXT:    or %s1, 0, (0)1
92; CHECK-NEXT:    cmov.s.le %s1, (63)0, %s0
93; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
94; CHECK-NEXT:    b.l.t (, %s10)
95  %3 = fcmp ole float %0, 0.0
96  ret i1 %3
97}
98
99define zeroext i1 @setccord(float, float) {
100; CHECK-LABEL: setccord:
101; CHECK:       # %bb.0:
102; CHECK-NEXT:    fcmp.s %s0, %s0, %s0
103; CHECK-NEXT:    or %s1, 0, (0)1
104; CHECK-NEXT:    cmov.s.num %s1, (63)0, %s0
105; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
106; CHECK-NEXT:    b.l.t (, %s10)
107  %3 = fcmp ord float %0, 0.0
108  ret i1 %3
109}
110
111define zeroext i1 @setccuno(float, float) {
112; CHECK-LABEL: setccuno:
113; CHECK:       # %bb.0:
114; CHECK-NEXT:    fcmp.s %s0, %s0, %s0
115; CHECK-NEXT:    or %s1, 0, (0)1
116; CHECK-NEXT:    cmov.s.nan %s1, (63)0, %s0
117; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
118; CHECK-NEXT:    b.l.t (, %s10)
119  %3 = fcmp uno float %0, 0.0
120  ret i1 %3
121}
122
123define zeroext i1 @setccueq(float, float) {
124; CHECK-LABEL: setccueq:
125; CHECK:       # %bb.0:
126; CHECK-NEXT:    lea.sl %s1, 0
127; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
128; CHECK-NEXT:    or %s1, 0, (0)1
129; CHECK-NEXT:    cmov.s.eqnan %s1, (63)0, %s0
130; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
131; CHECK-NEXT:    b.l.t (, %s10)
132  %3 = fcmp ueq float %0, 0.0
133  ret i1 %3
134}
135
136define zeroext i1 @setccune(float, float) {
137; CHECK-LABEL: setccune:
138; CHECK:       # %bb.0:
139; CHECK-NEXT:    lea.sl %s1, 0
140; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
141; CHECK-NEXT:    or %s1, 0, (0)1
142; CHECK-NEXT:    cmov.s.nenan %s1, (63)0, %s0
143; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
144; CHECK-NEXT:    b.l.t (, %s10)
145  %3 = fcmp une float %0, 0.0
146  ret i1 %3
147}
148
149define zeroext i1 @setccugt(float, float) {
150; CHECK-LABEL: setccugt:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    lea.sl %s1, 0
153; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
154; CHECK-NEXT:    or %s1, 0, (0)1
155; CHECK-NEXT:    cmov.s.gtnan %s1, (63)0, %s0
156; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
157; CHECK-NEXT:    b.l.t (, %s10)
158  %3 = fcmp ugt float %0, 0.0
159  ret i1 %3
160}
161
162define zeroext i1 @setccuge(float, float) {
163; CHECK-LABEL: setccuge:
164; CHECK:       # %bb.0:
165; CHECK-NEXT:    lea.sl %s1, 0
166; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
167; CHECK-NEXT:    or %s1, 0, (0)1
168; CHECK-NEXT:    cmov.s.genan %s1, (63)0, %s0
169; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
170; CHECK-NEXT:    b.l.t (, %s10)
171  %3 = fcmp uge float %0, 0.0
172  ret i1 %3
173}
174
175define zeroext i1 @setccult(float, float) {
176; CHECK-LABEL: setccult:
177; CHECK:       # %bb.0:
178; CHECK-NEXT:    lea.sl %s1, 0
179; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
180; CHECK-NEXT:    or %s1, 0, (0)1
181; CHECK-NEXT:    cmov.s.ltnan %s1, (63)0, %s0
182; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
183; CHECK-NEXT:    b.l.t (, %s10)
184  %3 = fcmp ult float %0, 0.0
185  ret i1 %3
186}
187
188define zeroext i1 @setccule(float, float) {
189; CHECK-LABEL: setccule:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    lea.sl %s1, 0
192; CHECK-NEXT:    fcmp.s %s0, %s0, %s1
193; CHECK-NEXT:    or %s1, 0, (0)1
194; CHECK-NEXT:    cmov.s.lenan %s1, (63)0, %s0
195; CHECK-NEXT:    adds.w.zx %s0, %s1, (0)1
196; CHECK-NEXT:    b.l.t (, %s10)
197  %3 = fcmp ule float %0, 0.0
198  ret i1 %3
199}
200