1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+unimplemented-simd128 | FileCheck %s --check-prefixes CHECK,SIMD128 2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128-VM 3; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128 4 5; Test that vector float-to-int and int-to-float instructions lower correctly 6 7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 8target triple = "wasm32-unknown-unknown" 9 10; CHECK-LABEL: convert_s_v4f32: 11; NO-SIMD128-NOT: i32x4 12; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}} 13; SIMD128-NEXT: f32x4.convert_i32x4_s $push[[R:[0-9]+]]=, $0 14; SIMD128-NEXT: return $pop[[R]] 15define <4 x float> @convert_s_v4f32(<4 x i32> %x) { 16 %a = sitofp <4 x i32> %x to <4 x float> 17 ret <4 x float> %a 18} 19 20; CHECK-LABEL: convert_u_v4f32: 21; NO-SIMD128-NOT: i32x4 22; SIMD128-NEXT: .functype convert_u_v4f32 (v128) -> (v128){{$}} 23; SIMD128-NEXT: f32x4.convert_i32x4_u $push[[R:[0-9]+]]=, $0 24; SIMD128-NEXT: return $pop[[R]] 25define <4 x float> @convert_u_v4f32(<4 x i32> %x) { 26 %a = uitofp <4 x i32> %x to <4 x float> 27 ret <4 x float> %a 28} 29 30; CHECK-LABEL: convert_s_v2f64: 31; NO-SIMD128-NOT: i64x2 32; SIMD128-VM-NOT: f64x2.convert_i64x2_s 33; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}} 34define <2 x double> @convert_s_v2f64(<2 x i64> %x) { 35 %a = sitofp <2 x i64> %x to <2 x double> 36 ret <2 x double> %a 37} 38 39; CHECK-LABEL: convert_u_v2f64: 40; NO-SIMD128-NOT: i64x2 41; SIMD128-VM-NOT: f64x2.convert_i64x2_u 42; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}} 43define <2 x double> @convert_u_v2f64(<2 x i64> %x) { 44 %a = uitofp <2 x i64> %x to <2 x double> 45 ret <2 x double> %a 46} 47 48; CHECK-LABEL: trunc_sat_s_v4i32: 49; NO-SIMD128-NOT: f32x4 50; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}} 51; SIMD128-NEXT: i32x4.trunc_sat_f32x4_s $push[[R:[0-9]+]]=, $0 52; SIMD128-NEXT: return $pop[[R]] 53define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) { 54 %a = fptosi <4 x float> %x to <4 x i32> 55 ret <4 x i32> %a 56} 57 58; CHECK-LABEL: trunc_sat_u_v4i32: 59; NO-SIMD128-NOT: f32x4 60; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}} 61; SIMD128-NEXT: i32x4.trunc_sat_f32x4_u $push[[R:[0-9]+]]=, $0 62; SIMD128-NEXT: return $pop[[R]] 63define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) { 64 %a = fptoui <4 x float> %x to <4 x i32> 65 ret <4 x i32> %a 66} 67 68; CHECK-LABEL: trunc_sat_s_v2i64: 69; NO-SIMD128-NOT: f64x2 70; SIMD128-VM-NOT: i64x2.trunc_sat_f64x2_s 71; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}} 72define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) { 73 %a = fptosi <2 x double> %x to <2 x i64> 74 ret <2 x i64> %a 75} 76 77; CHECK-LABEL: trunc_sat_u_v2i64: 78; NO-SIMD128-NOT: f64x2 79; SIMD128-VM-NOT: i64x2.trunc_sat_f64x2_u 80; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}} 81define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) { 82 %a = fptoui <2 x double> %x to <2 x i64> 83 ret <2 x i64> %a 84} 85