1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s 3 4--- | 5 define i32 @test_cmp_i8(i8 %a, i8 %b) { 6 %r = icmp ult i8 %a, %b 7 %res = zext i1 %r to i32 8 ret i32 %res 9 } 10 11 define i32 @test_cmp_i16(i16 %a, i16 %b) { 12 %r = icmp ult i16 %a, %b 13 %res = zext i1 %r to i32 14 ret i32 %res 15 } 16 17 define i32 @test_cmp_i32(i32 %a, i32 %b) { 18 %r = icmp ult i32 %a, %b 19 %res = zext i1 %r to i32 20 ret i32 %res 21 } 22 23 define i32 @test_cmp_i64(i64 %a, i64 %b) { 24 %r = icmp ult i64 %a, %b 25 %res = zext i1 %r to i32 26 ret i32 %res 27 } 28 29 define i32 @test_cmp_p0(i32* %a, i32* %b) { 30 %r = icmp ult i32* %a, %b 31 %res = zext i1 %r to i32 32 ret i32 %res 33 } 34 35... 36--- 37name: test_cmp_i8 38alignment: 16 39legalized: false 40regBankSelected: false 41registers: 42 - { id: 0, class: _ } 43 - { id: 1, class: _ } 44 - { id: 2, class: _ } 45 - { id: 3, class: _ } 46body: | 47 bb.1 (%ir-block.0): 48 liveins: $edi, $esi 49 50 ; CHECK-LABEL: name: test_cmp_i8 51 ; CHECK: [[COPY:%[0-9]+]]:_(s8) = COPY $dil 52 ; CHECK: [[COPY1:%[0-9]+]]:_(s8) = COPY $sil 53 ; CHECK: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s8), [[COPY1]] 54 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 55 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8) 56 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 57 ; CHECK: $eax = COPY [[AND]](s32) 58 ; CHECK: RET 0, implicit $eax 59 %0(s8) = COPY $dil 60 %1(s8) = COPY $sil 61 %2(s1) = G_ICMP intpred(ult), %0(s8), %1 62 %3(s32) = G_ZEXT %2(s1) 63 $eax = COPY %3(s32) 64 RET 0, implicit $eax 65 66... 67--- 68name: test_cmp_i16 69alignment: 16 70legalized: false 71regBankSelected: false 72registers: 73 - { id: 0, class: _ } 74 - { id: 1, class: _ } 75 - { id: 2, class: _ } 76 - { id: 3, class: _ } 77body: | 78 bb.1 (%ir-block.0): 79 liveins: $edi, $esi 80 81 ; CHECK-LABEL: name: test_cmp_i16 82 ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $di 83 ; CHECK: [[COPY1:%[0-9]+]]:_(s16) = COPY $si 84 ; CHECK: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s16), [[COPY1]] 85 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 86 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8) 87 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 88 ; CHECK: $eax = COPY [[AND]](s32) 89 ; CHECK: RET 0, implicit $eax 90 %0(s16) = COPY $di 91 %1(s16) = COPY $si 92 %2(s1) = G_ICMP intpred(ult), %0(s16), %1 93 %3(s32) = G_ZEXT %2(s1) 94 $eax = COPY %3(s32) 95 RET 0, implicit $eax 96 97... 98--- 99name: test_cmp_i32 100alignment: 16 101legalized: false 102regBankSelected: false 103registers: 104 - { id: 0, class: _ } 105 - { id: 1, class: _ } 106 - { id: 2, class: _ } 107 - { id: 3, class: _ } 108body: | 109 bb.1 (%ir-block.0): 110 liveins: $edi, $esi 111 112 ; CHECK-LABEL: name: test_cmp_i32 113 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi 114 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi 115 ; CHECK: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]] 116 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 117 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8) 118 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 119 ; CHECK: $eax = COPY [[AND]](s32) 120 ; CHECK: RET 0, implicit $eax 121 %0(s32) = COPY $edi 122 %1(s32) = COPY $esi 123 %2(s1) = G_ICMP intpred(ult), %0(s32), %1 124 %3(s32) = G_ZEXT %2(s1) 125 $eax = COPY %3(s32) 126 RET 0, implicit $eax 127 128... 129--- 130name: test_cmp_i64 131alignment: 16 132legalized: false 133regBankSelected: false 134registers: 135 - { id: 0, class: _ } 136 - { id: 1, class: _ } 137 - { id: 2, class: _ } 138 - { id: 3, class: _ } 139body: | 140 bb.1 (%ir-block.0): 141 liveins: $rdi, $rsi 142 143 ; CHECK-LABEL: name: test_cmp_i64 144 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi 145 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi 146 ; CHECK: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]] 147 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 148 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8) 149 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 150 ; CHECK: $eax = COPY [[AND]](s32) 151 ; CHECK: RET 0, implicit $eax 152 %0(s64) = COPY $rdi 153 %1(s64) = COPY $rsi 154 %2(s1) = G_ICMP intpred(ult), %0(s64), %1 155 %3(s32) = G_ZEXT %2(s1) 156 $eax = COPY %3(s32) 157 RET 0, implicit $eax 158 159... 160--- 161name: test_cmp_p0 162alignment: 16 163legalized: false 164regBankSelected: false 165registers: 166 - { id: 0, class: _ } 167 - { id: 1, class: _ } 168 - { id: 2, class: _ } 169 - { id: 3, class: _ } 170body: | 171 bb.1 (%ir-block.0): 172 liveins: $rdi, $rsi 173 174 ; CHECK-LABEL: name: test_cmp_p0 175 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $rdi 176 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $rsi 177 ; CHECK: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](p0), [[COPY1]] 178 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 179 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8) 180 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]] 181 ; CHECK: $eax = COPY [[AND]](s32) 182 ; CHECK: RET 0, implicit $eax 183 %0(p0) = COPY $rdi 184 %1(p0) = COPY $rsi 185 %2(s1) = G_ICMP intpred(ult), %0(p0), %1 186 %3(s32) = G_ZEXT %2(s1) 187 $eax = COPY %3(s32) 188 RET 0, implicit $eax 189 190... 191