1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4--- |
5  ; ModuleID = 'sdiv.ll'
6  source_filename = "sdiv.ll"
7  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
8
9  define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) {
10    %res = sdiv i8 %arg1, %arg2
11    ret i8 %res
12  }
13
14  define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) {
15    %res = sdiv i16 %arg1, %arg2
16    ret i16 %res
17  }
18
19  define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) {
20    %res = sdiv i32 %arg1, %arg2
21    ret i32 %res
22  }
23
24  define i64 @test_sdiv_i64(i64 %arg1, i64 %arg2) {
25    %res = sdiv i64 %arg1, %arg2
26    ret i64 %res
27  }
28
29...
30---
31name:            test_sdiv_i8
32alignment:       16
33legalized:       true
34regBankSelected: true
35tracksRegLiveness: true
36registers:
37  - { id: 0, class: gpr }
38  - { id: 1, class: gpr }
39  - { id: 2, class: gpr }
40  - { id: 3, class: gpr }
41  - { id: 4, class: gpr }
42body:             |
43  bb.1 (%ir-block.0):
44    liveins: $edi, $esi
45
46    ; CHECK-LABEL: name: test_sdiv_i8
47    ; CHECK: liveins: $edi, $esi
48    ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
49    ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
50    ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
51    ; CHECK: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit
52    ; CHECK: $ax = MOVSX16rr8 [[COPY1]]
53    ; CHECK: IDIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
54    ; CHECK: [[COPY4:%[0-9]+]]:gr8 = COPY $al
55    ; CHECK: $al = COPY [[COPY4]]
56    ; CHECK: RET 0, implicit $al
57    %2:gpr(s32) = COPY $edi
58    %0:gpr(s8) = G_TRUNC %2(s32)
59    %3:gpr(s32) = COPY $esi
60    %1:gpr(s8) = G_TRUNC %3(s32)
61    %4:gpr(s8) = G_SDIV %0, %1
62    $al = COPY %4(s8)
63    RET 0, implicit $al
64
65...
66---
67name:            test_sdiv_i16
68alignment:       16
69legalized:       true
70regBankSelected: true
71tracksRegLiveness: true
72registers:
73  - { id: 0, class: gpr }
74  - { id: 1, class: gpr }
75  - { id: 2, class: gpr }
76  - { id: 3, class: gpr }
77  - { id: 4, class: gpr }
78body:             |
79  bb.1 (%ir-block.0):
80    liveins: $edi, $esi
81
82    ; CHECK-LABEL: name: test_sdiv_i16
83    ; CHECK: liveins: $edi, $esi
84    ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
85    ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
86    ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
87    ; CHECK: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
88    ; CHECK: $ax = COPY [[COPY1]]
89    ; CHECK: CWD implicit-def $ax, implicit-def $dx, implicit $ax
90    ; CHECK: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
91    ; CHECK: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
92    ; CHECK: $ax = COPY [[COPY4]]
93    ; CHECK: RET 0, implicit $ax
94    %2:gpr(s32) = COPY $edi
95    %0:gpr(s16) = G_TRUNC %2(s32)
96    %3:gpr(s32) = COPY $esi
97    %1:gpr(s16) = G_TRUNC %3(s32)
98    %4:gpr(s16) = G_SDIV %0, %1
99    $ax = COPY %4(s16)
100    RET 0, implicit $ax
101
102...
103---
104name:            test_sdiv_i32
105alignment:       16
106legalized:       true
107regBankSelected: true
108tracksRegLiveness: true
109registers:
110  - { id: 0, class: gpr }
111  - { id: 1, class: gpr }
112  - { id: 2, class: gpr }
113body:             |
114  bb.1 (%ir-block.0):
115    liveins: $edi, $esi
116
117    ; CHECK-LABEL: name: test_sdiv_i32
118    ; CHECK: liveins: $edi, $esi
119    ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
120    ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
121    ; CHECK: $eax = COPY [[COPY]]
122    ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
123    ; CHECK: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
124    ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $eax
125    ; CHECK: $eax = COPY [[COPY2]]
126    ; CHECK: RET 0, implicit $eax
127    %0:gpr(s32) = COPY $edi
128    %1:gpr(s32) = COPY $esi
129    %2:gpr(s32) = G_SDIV %0, %1
130    $eax = COPY %2(s32)
131    RET 0, implicit $eax
132
133...
134---
135name:            test_sdiv_i64
136alignment:       16
137legalized:       true
138regBankSelected: true
139tracksRegLiveness: true
140registers:
141  - { id: 0, class: gpr }
142  - { id: 1, class: gpr }
143  - { id: 2, class: gpr }
144body:             |
145  bb.1 (%ir-block.0):
146    liveins: $rdi, $rsi
147
148    ; CHECK-LABEL: name: test_sdiv_i64
149    ; CHECK: liveins: $rdi, $rsi
150    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
151    ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
152    ; CHECK: $rax = COPY [[COPY]]
153    ; CHECK: CQO implicit-def $rax, implicit-def $rdx, implicit $rax
154    ; CHECK: IDIV64r [[COPY1]], implicit-def $rax, implicit-def $rdx, implicit-def $eflags, implicit $rax, implicit $rdx
155    ; CHECK: [[COPY2:%[0-9]+]]:gr64 = COPY $rax
156    ; CHECK: $rax = COPY [[COPY2]]
157    ; CHECK: RET 0, implicit $rax
158    %0:gpr(s64) = COPY $rdi
159    %1:gpr(s64) = COPY $rsi
160    %2:gpr(s64) = G_SDIV %0, %1
161    $rax = COPY %2(s64)
162    RET 0, implicit $rax
163
164...
165